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NVTFS5811NL Power MOSFET
Features
40 V, 6.7 mW, 40 A, Single N-Channel
* * * * *
Small Footprint (3.3 x 3.3 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NV Prefix for Automotive and Other Applications Requiring AEC-Q101 Qualified Site and Change Controls These are Pb-Free Devices
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V(BR)DSS 40 V RDS(on) MAX 6.7 mW @ 10 V 10 mW @ 4.5 V ID MAX 40 A
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RYJ-mb (Notes 1, 2, 3, 4) Power Dissipation RYJ-mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1 & 3, 4) Power Dissipation RqJA (Notes 1, 3) Pulsed Drain Current Tmb = 25C Steady State Tmb = 100C Tmb = 25C Tmb = 100C TA = 25C Steady State TA = 100C TA = 25C TA = 100C TA = 25C, tp = 10 ms IDM TJ, Tstg IS EAS PD ID PD Symbol VDSS VGS ID Value 40 20 40 28 21 10 16 11 3.2 1.6 354 -55 to +175 17 65 A C A mJ W A W Unit V V A
N-Channel MOSFET D (5-8)
G (4) S (1,2,3)
MARKING DIAGRAM
1
Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL(pk) = 36 A, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8 from case for 10 s)
WDFN8 (m8FL) CASE 511AB 5811 A Y WW G
1 S S S G
5811 AYWWG G
D D D D
= Specific Device Code = Assembly Location = Year = Work Week = Pb-Free Package
TL
260
C
(Note: Microdot may be in either location)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device NVTFS5811NLTAG Package WDFN8 (Pb-Free) WDFN8 (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter Junction-to-Mounting Board (top) - Steady State (Note 2 and 3) Junction-to-Ambient - Steady State (Note 3) Symbol RYJ-mb RqJA Value 7.2 47 Unit C/W
NVTFS5811NLTWG
1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51-12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface-mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2011
January, 2011 - Rev. 0
1
Publication Order Number: NVTFS5811NL/D
NVTFS5811NL
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Zero Gate Voltage Drain Current V(BR)DSS IDSS IGSS VGS(TH) RDS(on) gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) td(on) tr td(off) tf VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 20 A VGS = 0 V, IS = 20 A TJ = 25C TJ = 125C VGS = 4.5 V, VDS = 32 V, ID = 20 A, RG = 2.5 W VGS = 10 V, VDS = 32 V, ID = 20 A VGS = 4.5 V, VDS = 32 V, ID = 20 A, RG = 2.5 W VGS = 0 V, ID = 250 mA VGS = 0 V, VDS = 40 V TJ = 25C TJ = 125C 40 1.0 10 "100 nA V mA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Drain-to-Source On Resistance
VDS = 0 V, VGS = "20 V VGS = VDS, ID = 250 mA VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 20 A VDS = 5 V, ID = 10 A VGS = 0 V, f = 1.0 MHz, VDS = 25 V 1.5 5.8 8.8 24.6
2.2 6.7 10
V mW
Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge
S
1570 215 157 17 1 5 9 30
pF
nC nC
nC
SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 11 55 20 40 ns
DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage 0.83 0.70 22 12 10 17 nC ns 1.2 V
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge
5. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 6. Switching characteristics are independent of operating junction temperatures.
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NVTFS5811NL
TYPICAL CHARACTERISTICS
100 90 ID, DRAIN CURRENT (A) 80 70 60 50 40 30 20 10 0 0 10 V 80 70 ID, DRAIN CURRENT (A) 60 50 40 30 20 10 5 0 1 TJ = 125C TJ = 25C TJ = -55C VDS 10 V
4.6 V VGS = 5 V
TJ = 25C 4.2 V 4.0 V 3.8 V 3.6 V 3.4 V 3.2 V 3.0 V
1 2 3 4 VDS, DRAIN-TO-SOURCE VOLTAGE (V)
2 3 4 VGS, GATE-TO-SOURCE VOLTAGE (V)
5
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.016 0.014 0.012 0.010 0.008 0.006 0.004 ID = 20 A TJ = 25C 0.012
Figure 2. Transfer Characteristics
TJ = 25C 0.010 0.008 0.006 0.004 0.002 5 VGS = 10 V VGS = 4.5 V
2
4
6
8
10
10 15 20 25 30 35 40 45 50 55 60 65 70 ID, DRAIN CURRENT (A)
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
2.00 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.80 1.60 1.40 1.20 1.00 0.80 0.60 -50 -25 0 25 50 75 100 125 150 175 100 ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) 10000 100000
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V
TJ = 150C
1000
TJ = 125C
10
20
30
40
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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NVTFS5811NL
TYPICAL CHARACTERISTICS
2200 2000 1800 C, CAPACITANCE (pF) 1600 1400 1200 1000 800 600 400 200 0 0 Crss 10 20 30 DRAIN-TO-SOURCE VOLTAGE (V) 40 Coss Ciss VGS = 0 V TJ = 25C VGS, GATE-TO-SOURCE VOLTAGE (V)
10
8 6 4 2 0 Qgs Qgd
QT
VDS = 32 V ID = 20 A TJ = 25C 0 5 10 15 20 Qg, TOTAL GATE CHARGE (nC) 25 30
Figure 7. Capacitance Variation
Figure 8. Gate-to-Source Voltage vs. Total Charge
60 IS, SOURCE CURRENT (A)
1000 VDD = 32 V ID = 20 A VGS = 4.5 V t, TIME (ns) 100 tr tf td(off) td(on)
50 40 30 20 10
VGS = 0 V TJ = 25C
10
1.0
1
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
1000 VGS = 10 V Single Pulse TC = 25C 10 ms 10 100 ms 1 ms 1 10 ms RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) dc
10 RG, GATE RESISTANCE (W)
100
0 0.5
Figure 10. Diode Forward Voltage vs. Current
0.6 0.7 0.8 0.9 VSD, SOURCE-TO-DRAIN VOLTAGE (V)
1.0
EAS, SINGLE PULSE DRAIN-TO- SOURCE AVALANCHE ENERGY (mJ)
60 50 40 30 20 10 0
ID = 36 A
ID, DRAIN CURRENT (A)
100
0.1
100
25
50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (C)
175
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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NVTFS5811NL
TYPICAL CHARACTERISTICS
100 RqJA(t) (C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE Duty Cycle = 0.5 10 0.2 0.1 0.05 0.02 0.01
1
0.1 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) 1 10 100 1000
0.01 0.000001
Figure 13. Thermal Response
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NVTFS5811NL
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P CASE 511AB-01 ISSUE B
2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X
0.20 C D D1
8765
A
B
0.20 C E1 E
4X
q
1234
TOP VIEW 0.10 C A 0.10 C SIDE VIEW
8X b CAB
c
A1
6X
C
SEATING PLANE
e
DETAIL A
DETAIL A
DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q
MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 --- 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.65 BSC 0.30 0.41 0.51 0.64 --- --- 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ --- 12 _
INCHES NOM 0.030 --- 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.026 BSC 0.012 0.016 0.025 --- 0.012 0.017 0.002 0.005 0.055 0.059 0_ --- MIN 0.028 0.000 0.009 0.006
MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.020 --- 0.022 0.008 0.063 12 _
SOLDERING FOOTPRINT*
e/2
1 4
0.10 0.05
c
L
0.42 K
PACKAGE OUTLINE
8X
0.65 PITCH
0.66
4X
E2
8 5
M D2 BOTTOM VIEW L1 0.75 0.57 2.30 3.60
G
0.47
2.37 3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NVTFS5811NL/D

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