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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
1M x 16 HIGH-SPEED LOW POWER ASYNCHRONOUS CMOS STATIC RAM
FEATURES
* High-speed access times: 25, 35 ns * High-performance, low-power CMOS process * Multiple center power and ground pins for greater noise immunity * Easy memory expansion with CS1 and OE options * CS1 power-down * Fully static operation: no clock or refresh required * TTL compatible inputs and outputs * Single power supply VDD 1.65V to 2.2V (IS62WV102416ALL) speed = 35ns for VDD 1.65V to 2.2V VDD 2.4V to 3.6V (IS62/65WV102416BLL) speed = 25ns for VDD 2.4V to 3.6V * Packages available: - 48-ball miniBGA (9mm x 11mm) - 48-pin TSOP (Type I) * Industrial and Automotive Temperature Support * Lead-free available * Data control for upper and lower bytes
JANUARY 2008
DESCRIPTION The ISSI IS62WV102416ALL/BLL and IS65WV102416BLL
are high-speed, 16M-bit static RAMs organized as 1024K words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields highperformance and low power consumption devices. When CS1 is HIGH (deselected) or when CS2 is LOW (deselected) or when CS1 is LOW, CS2 is HIGH and both LB and UB are HIGH, the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The device is packaged in the JEDEC standard 48-pin TSOP Type I and 48-pin Mini BGA (9mm x 11mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A19
DECODER
1024K x 16 MEMORY ARRAY
VDD GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT
COLUMN I/O
CS1 OE WE UB LB CONTROL CIRCUIT
Copyright (c) 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
1Mx16 LOW POWER PIN CONFIGURATIONS
48-Pin mini BGA (9mmx11mm)
1 2 3 4 5 6
A B C D E F G H
LB I/O8 I/O9 GND VDD I/O14 I/O15 A18
OE UB I/O10 I/O11 I/O12 I/O13 A19 A8
A0 A3 A5 A17 NC A14 A12 A9
A1 A4 A6 A7 A16 A15 A13 A10
A2 CS1 I/O1 I/O3 I/O4 I/O5 WE A11
CS2 I/O0 I/O2 VDD GND I/O6 I/O7 NC
PIN DESCRIPTIONS
A0-A19 I/O0-I/O15 CS1, CS2 OE WE LB UB NC VDD GND Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
48-pin TSOP-I (12mm x 20mm)
A4 A3 A2 A1 A0 NC CS1 I/O0 I/O1 I/O2 I/O3 VDD GND I/O4 I/O5 I/O6 I/O7 WE NC A19 A18 A17 A16 A15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
A5 A6 A7 A8 OE UB LB I/O15 I/O14 I/O13 I/O12 GND VDD I/O11 I/O10 I/O9 I/O8 NC A9 A10 A11 A12 A13 A14
PIN DESCRIPTIONS
A0-A19 I/O0-I/O15 CS1 OE WE LB UB NC VDD GND Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
TRUTH TABLE
Mode Not Selected WE X X X H H H H H L L L CS1 H X X L L L L L L L L CS2 X L X H H H H H H H H OE X X X H H L L L X X X LB X X H L X L H L L H L UB X X H X L H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN VDD Current ISB1, ISB2 ISB1, ISB2 ISB1, ISB2 ICC ICC ICC
Output Disabled Read
Write
ICC
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM VDD TSTG PT Parameter Terminal Voltage with Respect to GND VDD Relates to GND Storage Temperature Power Dissipation Value -0.5 to VDD + 0.5 -0.3 to 4.0 -65 to +150 1.0 Unit V V C W
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol CIN CI/O Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25C, f = 1 MHz, VDD = 3.3V.
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
OPERATING RANGE (VDD) (IS62WV102416ALL)
Range Ambient Temperature Commercial 0C to +70C Industrial -40C to +85C Automotive -40C to +125C VDD (35 nS) 1.65V-2.2V 1.65V-2.2V 1.65V-2.2V
OPERATING RANGE (VDD) (IS62WV102416BLL)(1)
Range Ambient Temperature Commercial 0C to +70C Industrial -40C to +85C VDD (25 nS) 2.4V-3.6V 2.4V-3.6V
Note: 1. When operated in the range of 2.4V-3.6V, the device meets 10ns.
OPERATING RANGE (VDD) (IS65WV102416BLL)
Range Automotive Ambient Temperature -40C to +125C VDD (25 nS) 2.4V-3.6V
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
5
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
DC ELECTRICAL CHARACTERISTICS (Over Operating Range) VDD = 2.4V-3.6V
Symbol VOH VOL VIH VIL ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) Input Leakage Output Leakage GND VIN VDD GND VOUT VDD, Outputs Disabled Test Conditions VDD = Min., IOH = -1.0 mA VDD = Min., IOL = 1.0 mA Min. 1.8 -- 2.0 -0.3 -1 -1 Max. -- 0.4 VDD + 0.3 0.8 1 1 Unit V V V V A A
Note: 1. VIL (min.) = -0.3V DC; VIL (min.) = -2.0V AC (pulse width < 10 ns). Not 100% tested. VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range) VDD = 1.65V-2.2V
Symbol VOH VOL VIH VIL(1) ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Output Leakage GND VIN VDD GND VOUT VDD, Outputs Disabled Test Conditions IOH = -0.1 mA IOL = 0.1 mA VDD 1.65-2.2V 1.65-2.2V 1.65-2.2V 1.65-2.2V Min. Vcc - 0.4V -- 1.4 -0.2 -1 -1 Max. -- 0.2 VDD + 0.2 0.4 1 1 Unit V V V V A A
Notes: 1. VIL (min.) = -0.3V DC; VIL (min.) = -2.0V AC (pulse width < 10ns). Not 100% tested. VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10ns). Not 100% tested.
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
AC TEST CONDITIONS (HIGH SPEED)
Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level (VRef) Output Load Unit (2.4V-3.6V) 0.4V to VDD-0.3V 1.5ns VDD/2 See Figures 1 and 2 Unit (1.65V-2.2V) 0.4V to VDD-0.2V 1.5ns VDD/2 See Figures 1 and 2
AC TEST LOADS
319 3.3V
ZO = 50 OUTPUT
50 1.5V
OUTPUT
30 pF Including jig and scope
5 pF Including jig and scope
353
Figure 1.
Figure 2.
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol ICC Parameter VDD Dynamic Operating Supply Current Test Conditions VDD = Max., IOUT = 0 mA, f = fMAX VIN = 0.4V or VDD -0.3V VDD = Max., IOUT = 0 mA, f = 0 VIN = 0.4V or VDD -0.3V VDD = Max., VIN = VIH or VIL CS1 VIH, f = 0 VDD = Max., CS1 VDD - 0.2V, VIN VDD - 0.2V, or VIN 0.2V, f = 0 Com. Ind. Auto. typ.(2) Com. Ind. Auto. Com. Ind. Auto. Com. Ind. Auto. typ.(2) -25 Min. Max. -- -- -- 25 -- -- -- -- -- -- -- -- -- 0.1 20 30 50 15 20 40 0.8 1.2 2 -- -- -- -- -- -- -- -- -- 20 30 50 15 20 40 0.8 1.2 2 mA 30 35 60 -35 Min. Max. -- -- -- 25 30 60 Unit mA
ICC1
Operating Supply Current TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs)
ISB1
mA
ISB2
mA
Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical values are measured at VDD = 3.0V, TA = 25oC and not 100% tested.
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CS1/CS2 Access Time OE Access Time
(2)
25 ns Min. Max. 25 -- 3 -- -- -- 5 0 10 -- 0 0 -- 25 -- 25 12 8 -- 8 -- 25 8 --
35 ns Min. Max. 35 -- 3 -- -- -- 5 0 10 -- 0 0 -- 35 -- 35 15 10 -- 10 -- 35 10 --
Unit ns ns ns ns ns ns ns ns ns ns ns ns
tRC tAA tOHA tACS1/tACS2 tDOE tHZOE tLZOE
(2)
OE to High-Z Output OE to Low-Z Output CS1/CS2 to High-Z Output CS1/CS2 to Low-Z Output LB, UB Access Time LB, UB to High-Z Output LB, UB to Low-Z Output
tHZCS1/tHZCS2(2) tLZCS1/tLZCS2(2) tBA tHZB tLZB
Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to VDD-0.2V/0.4V to VDD-0.3V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)
tRC
ADDRESS
tAA tOHA tOHA
DATA VALID
DQ0-D15
PREVIOUS DATA VALID
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
AC WAVEFORMS READ CYCLE NO. 2(1,3) (CS1, CS2, OE, AND UB/LB Controlled)
tRC
ADDRESS
tAA tOHA
OE
tDOE tHZOE
CS1s
tACE1/tACE2
tLZOE
CS2s
tLZCE1/ tLZCE2
tHZCS1/ tHZCS1
LBs, UBs
tBA tLZB tHZB
DOUT
HIGH-Z
DATA VALID
Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1, UB, or LB = VIL. CS2=WE=VIH. 3. Address is valid prior to or coincident with CS1 LOW transition.
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
Symbol Parameter Write Cycle Time 25ns Min. Max. 25 18 15 0 0 18 18 12 0 -- 5 -- -- -- -- -- -- -- -- -- 12 -- 35 ns Min. Max. 35 25 25 0 0 25 30 15 0 -- 5 -- -- -- -- -- -- -- -- -- 20 -- Unit ns ns ns ns ns ns ns ns ns ns ns
tWC
tSCS1/tSCS2 CS1/CS2 to Write End tAW Address Setup Time to Write End tHA tSA tPWB tPWE(4) tSD tHD tHZWE(3) tLZWE(3)
Notes:
Address Hold from Write End Address Setup Time LB, UB Valid to End of Write WE Pulse Width Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to VDD-0.2V/0.4V to VDD-0.3V and output loading specified in Figure 1. 2. The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. 3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested. 4. tPWE > tHZWE + tSD when OE is LOW.
AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CS1 Controlled, OE = HIGH or LOW)
tWC
ADDRESS
tSCS1 tHA
CS1
tSCS2
CS2
tAW tPWE
WE LB, UB
tSA tHZWE
tPWB
tLZWE
HIGH-Z
DOUT
DATA UNDEFINED
tSD
tHD
DIN
DATA-IN VALID
Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CS1) [ (LB) = (UB) ] (WE).
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
11
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
tWC
ADDRESS
OE
tSCS1 tHA
CS1
tSCS2
CS2
tAW t PWE
WE
LB, UB
tSA tHZWE
HIGH-Z
tLZWE
DOUT
DATA UNDEFINED
tSD
tHD
DIN
DATA-IN VALID
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
tWC
ADDRESS
OE
tSCS1 tHA
CS1
tSCS2
CS2
tAW tPWE
WE
LB, UB
tSA tHZWE
HIGH-Z
tLZWE
DOUT
DATA UNDEFINED
tSD
tHD
DIN
DATA-IN VALID
12
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
WRITE CYCLE NO. 4 (UB/LB Controlled)
t WC
ADDRESS
ADDRESS 1
t WC
ADDRESS 2
OE
t SA
CS1 CS2 WE
LOW
HIGH
t HA t SA t PBW t PBW
WORD 2
t HA
UB, LB
WORD 1
t HZWE
DOUT
HIGH-Z
t LZWE t HD
DATAIN VALID
DATA UNDEFINED
t SD
DIN
t SD
DATAIN VALID
t HD
UB_CSWR4.eps
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
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DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter VDD for Data Retention Data Retention Current Test Condition See Data Retention Waveform VDD = 1.2V, CS1 VDD - 0.2V Com. Ind. Auto. Min. 1.2 -- -- -- 0 0.1 0.1 0.1 Typ.(1) Max. 3.6 0.8 1.2 2 -- -- Unit V mA
VDR
IDR
tSDR tRDR
Data Retention Setup Time Recovery Time
See Data Retention Waveform See Data Retention Waveform
ns ns
tRC
Note: 1. Typical values are measured at VDD = 3.0V, TA = 25oC and not 100% tested.
DATA RETENTION WAVEFORM (CS1 Controlled)
tSDR VDD 1.65V Data Retention Mode tRDR
1.4V
VDR CS1 VDD - 0.2V
CS1 GND
DATA RETENTION WAVEFORM (CS2 Controlled)
Data Retention Mode VDD tSDR tRDR
3.0
CE2 2.2V VDR 0.4V GND
CS2 0.2V
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Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL
ORDERING INFORMATION Industrial Range: -40C to +85C Voltage Range: 2.4V to 3.6V
Speed (ns) 25 Order Part No. IS62WV102416BLL-25MI IS62WV102416BLL-25MLI IS62WV102416BLL-25TI IS62WV102416BLL-25TLI Package 48 mini BGA (9mm x 11mm) 48 mini BGA (9mm x 11mm), Lead-free TSOP (Type I) TSOP (Type I), Lead-free
Industrial Range: -40C to +85C Voltage Range: 1.65V to 2.2V
Speed (ns) 35 Order Part No. IS62WV102416ALL-35MI IS62WV102416ALL-35MLI IS62WV102416ALL-35TI IS62WV102416ALL-35TLI Package 48 mini BGA (9mm x 11mm) 48 mini BGA (9mm x 11mm), Lead-free TSOP (Type I) TSOP (Type I), Lead-free
Automotive Range: -40C to +125C Voltage Range: 2.4V to 3.6V
Speed (ns) 25 Order Part No. IS65WV102416BLL-25MA3 IS65WV102416BLL-25TA3 Package 48 mini BGA (9mm x 11mm) TSOP (Type I)
Integrated Silicon Solution, Inc. -- www.issi.com
Rev. A 01/18/08
15
PACKAGING INFORMATION
Plastic TSOP - 48 pins Package Code: T (Type I)
A A1 1 N
E
b
e D1
SEATING PLANE
D
L
C
Plastic TSOP (T - Type I) Millimeters Inches Symbol Min Max Min Max Ref. Std. N 48 A -- 1.20 -- 0.047 A1 0.05 0.15 0.002 0.006 b 0.17 0.27 0.007 0.011 C 0.10 0.21 0.004 0.008 D 19.8 20.2 0.780 0.795 D1 18.2 18.6 0.716 0.732 E 11.8 12.2 0.464 0.480 e 0.50 BSC 0.020 BSC L 0.50 0.70 0.020 0.028 0 5 0 5
Notes: 1. Controlling dimension: millimeters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D1 and E do not include mold flash protrusions and should be measured from the bottom of the
package.
4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane.
Integrated Silicon Solution, Inc.
PK13197T48 Rev. B 07/17/97
NOTE :
1. CONTROLLING DIMENSION : MM . 2. Reference document : JEDEC MO-207
08/21/2008

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