 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| P re li m in ar y D at a S he et , V er s io n 1 . 3 , N ov e mb er 2 00 3 ICE 1QS01 Controller for Quasiresonant Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction Pow er Mana geme nt & Sup ply Never stop thinking. ICE1QS01 Revision History: Current Version: 200311-28 Previous Version: 200208-12 Page 3 (in Page 3 (in previous version) current version) Page 15 (in Page 16 (in previous version) current version) Page 16 (in Page 17 (in previous version) current version) Page 15 (in Page 16 (in previous version) current version) Page 17 (in Page 18 (in previous version) current version) Ordering Codes shortened Subjects (major changes since last revision) ICCL, ICCH, VCCON changed Subjects (major changes since last revision) VRZIT, tdon, IRZIB changed Subjects (major changes since last revision) Footnote 1) deleted Subjects (major changes since last revision) tRES changed Edition 2003-11-28 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 Munchen (c) Infineon Technologies AG 2003. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in Preliminary Data Sheet ICE1QS01 Controller for Switch Mode Power Supplies Supporting Low Power Standby and Power Factor Correction (PFC) P-DIP-8-4 Features P-DIP-8-4 * * * * * * * * * * * * * * Line Current Consumption with PFC Standby Input Power < 1 W Stable Standby Frequency Low Power Consumption Very Low Start-up Current Soft-Start for noiseless Start-up Standby Burst Mode with and without Control Signal for lowered Output Voltages Digital Frequency Reduction in small Steps at Decreasing Load Over- and Undervoltage Lockout Switch Off at Mains Undervoltage Mains Voltage Dependent Fold Back Point Correction Ringing Suppression Time Controlled from Output Voltage Easy Design In Free usable Fault Comparator P-DSO-8-3 P-DSO-8-3 Functional Description The ICE1QS01 is optimized to control free running flyback converters with and without Power Factor Correction (with PFC Charge Pump). The switching frequency is reduced in small steps with decreasing load towards a minimum of 20 kHz in standby mode. This function is performed by a digital circuit to avoid any jitter also with periodically pulsed loads. To provide extremely low power consumption at light loads, this device can be switched into Standby Burst Mode. This is also possible without standby control signal (for adapter application). Additionally, the start up current is very low. To avoid switching stresses of the power devices, the power transistor is always switched on at minimum voltage. The device has several protection functions: VCC overand undervoltage, mains undervoltage and current limiting. Regulation can be done by using the internal error amplifier or an opto coupler feedback. The output driver is ideally suited for driving a power MOSFET. The ICE1QS01 is suited for TV-sets, VCR- sets, SAT- receivers and other consumer applications in the power range from 0 to app. 300 W. Type ICE1QS01 ICE1QS01G Ordering Code Q67040-S4558 Q67040-S4559 Package P-DIP-8 P-DSO-8 Infineon Tech PCI Group 28.11.03 3 Preliminary Data Sheet Block Diagram ICE1QS01 VCC Foldback Point Corr. 20V + Overvoltage Protection PCS + + 1.5V UVLO Burst-Mode Reference Voltage and Current Ringing Suppression Time Start 5V 3.5V 50s Timer 50ms Timer 25mV + + 4.8V + 4.4V + Latch Primary Regulation 20k 5V SRC 2V + 5V + + 1V - RZI 5.7V Digital Processing ZC-Counter UP/DO-Counter Power Driver S SET Q Q OUT 1V + + 1V D L R CLR OFC SET Q Q CLR GND Infineon Tech PCI Group 28.11.03 4 Preliminary Data Sheet Pinning ICE1QS01 Pin 1 2 3 4 5 6 7 8 Symbol N.C. PCS RZI SRC OFC GND OUT VCC Function Primary Current Simulation Regulation and Zero Crossing Input Soft-Start and Regulation Capacitor Overvoltage Fault Comparator Ground Output Supply Voltage Pin Configuration (top view) 1 2 3 4 N.C. PCS RZI SRC VCC OUT GND OFC 8 7 6 5 1 2 3 4 PCS RZI SRC VCC OUT GND OFC 8 7 6 5 Infineon Tech PCI Group 28.11.03 5 Preliminary Data Sheet ICE1QS01 Functional Description Start up An internal start up diode is connected between pin PCS and pin VCC. Start up current is provided via this diode if VPCS is higher than VCC + VBE (VBE = Base-Emitter-Voltage). During start up the internal reference of the IC is shut off and current consumption is about 50uA. There is only the start up circuitry working which determines the VCCon threshold. Gate driver OUT is switched to low. An active shut down circuitry ensures that OUT is held below the MOS gate threshold when the IC is in start up mode. Block Diagram: Start Up VCC PCS UVLO OUT ICE1QS01 Infineon Tech PCI Group 28.11.03 6 Preliminary Data Sheet Soft start ICE1QS01 The internal reference of the IC is switched on when VCC exceeds the VCCon threshold. The IC begins to work with soft start mode. Soft start is realized with an internal soft start resistor, an internal current sink, a current source and the external feedback capacitor connected at pin SRC. The internal resistor is connected between the internal voltage reference and pin SRC. The current sink is connected between pin SRC and GND. The value of the current is set with a timer. Immediately after the IC is switched on the capacitor CSRC is charged with a current source up to 2.5V. This current source is switched off 12 sec after beginning of soft start. The current value of the current sink is set with a timer. Every three msec the current of the current sink is reduced and so VSRC can increase stepwise. The soft start is finished 24 msec after the IC is switched on. At the end of the soft start the current sink is switched off. Figure: Soft Start VCC ICE1QS01 2.5V 5V 500 timer t=12us VCCon 20k timer tp=3ms up down counter timer t=24ms t VSRC D/A current sink pin SRC VSRC2 VSRC1 ton tp1 tp2 t PCS (Primary Current Simulation) A voltage proportional to the current of the power transistor is generated at Pin PCS by the RC-combination R2, C2. The voltage at Pin PCS is forced to 1.5V when the power transistor is switched off and during its switch on time C2 is charged by R2 from the rectified mains. The relation of VPCS and Infineon Tech PCI Group 28.11.03 7 Preliminary Data Sheet the current in the power transistor (Iprimary) is: ICE1QS01 VPCS = 1, 5V + Lprimary x Iprimary ------------------------------------------------------R2 x C2 Lprimary: Primary inductance of the transformer The advantage of primary current simulation is the elimination of the leading edge spike, which is generated when the power transistor is switched on. RZI (zero crossing input and primary regulation) Zero current counter Every time when the falling voltage ramp of VRZI crosses the 25 mV threshold a pulse is sent to the zero-current-counter and increases the counter by one. If zero-current-counter and up-down-counter are equal the gate drive OUT is switched to high. Up-down counter is influenced via SRC voltage as described below. If VRZI is greater than 25 mV gate drive OUT is always switched low. Figure: Zero crossing switching behaviour V VSRC VPCS 1.5V VRZI t OUT status up-dow n counter = 0001: sw itch on at first zero crossing status up-dow n counter = 0010: sw itch on at second zero crossing t ton toff ton toff t Infineon Tech PCI Group 28.11.03 8 Preliminary Data Sheet Ringing suppression ICE1QS01 When VPCS reaches the feedback voltage VSRC the gate drive OUT is set to low and the ringing suppression timer is started. This timer ensures that the gate drive cannot be switched on until this ringing suppression time is passed. Duration of ringing suppression time depends on the VRZI voltage. Suppression time is 3 sec if VRZI > 1V and it is 30 sec if VRZI < 1V. Figure: Ringing Suppression up-down-counter =1 VRZI 1V up-down-counter =1 VSRC VPCS 1.5V OUT ringing suppression time 3 s 30 us Infineon Tech PCI Group 28.11.03 9 Preliminary Data Sheet Primary regulation ICE1QS01 Primary regulation is achieved by activating the internal current sink. The current sink is connected between pin SRC and ground. If VRZI exceeds the 5V threshold the current sink is switched on. It is switched off when VRZI falls below 5V. The current sink discharges the CSRC capacitor. CSRC is charged via the internal 20k resistor. If VRZI exceeds the 4.4V threshold a flip-flop is set and the resistor is switched off when VRZI falls below 50 mV. The resistor is switched on again with the falling slope of gate drive OUT. Diagram Primary Regulation VRZI 5V 4.4V zero current counter = 0010 OUT OUT start stop 0.05 V 20K resistor on RQ SQ + - 5V RQ SQ 20k 4.4 V RZI + - RQ SQ SRC off + current sink on off 5V - ICE1QS01 current sink VSRC t Infineon Tech PCI Group 28.11.03 10 Preliminary Data Sheet SRC (Regulation and soft start capacitor) ICE1QS01 The feedback capacitor is connected to pin SRC. The feedback voltage VSRC has two main functions. Function I (MOS FET on time): VSRC provides the switch off reference voltage. If VPCS (which contains the primary current information) exceeds the VSRC voltage the external MOS transistor is switched off. Function II (MOS FET off time for frequency reduction): At low load the frequency is reduced by ignoring zero crossing signals after the transformer demagnetization. VSRC determines the action of the 4-bit up-down-counter which contains the number of zero crossings to be ignored. The content of the up-down-counter is compared with the number of zero-current crossings of VRZI. If the number of zero-current crossings in each period after the transformer demagnetization is equal to the up-down-counter content the MOS is switched on. At low load conditions when VSRC is below 3.5V the counter is increased by one every 50 msec. The result is that the MOS transistor off-time increases and duty cycle decreases. At high load conditions when VSRC is higher than 4.4V the counter content is reduced by one every 50msec. So MOS transistor off-time will be reduced. With this off-time regulation switching jitter can be eliminated. The up-down-counter is immediately set to 0001 if a load jump occurs and VSRC exceeds 4.8 V. This ensures that full power can be provided instantaneously. The following table shows the SRC voltage range and the corresponding up-down counter action. SRC voltage range 1: VSRC< 3.5V 2: 3.5 up-down-counter action count forward stop count count backward set up-down-counter to1 The information provided by VSRC is stored in two independent flip flops. An internal timer creates a trigger pulse with a period of 50 msec. Every time the pulse occures the up-down counter checks the status flip flops and acts depending on the flip flop information. After this pulse the flip flops are reset. So change of voltage range is noticed by the logic only once during the 50 ms period. In the diagram below the behaviour of the up-down counter is depicted in more detail. Diagram 1 timer pulse tp VSRC 4.4 tp tp 50 msec tp tp tp tp tp tp tp 3.5 status of up-down counter n n+1 n+1 n+1 n+1 n+1 n n-1 n-2 n-3 Infineon Tech PCI Group 28.11.03 11 Preliminary Data Sheet Burst mode ICE1QS01 12 sec after beginning of softstart the burst mode comparator is activated. If VSRC falls below 2V after activating the comparator the gate drive OUT is switched to low and the VCCoff threshold is changed to 14.5 V. VCC decreases because gate drive is held low. If VCC reaches the VCCoff threshold the IC is going into start-up mode. At VCCon threshold the IC is switched on again starting with soft start modus. VCCoff threshold is set to the normal 9V. Figure: Burst mode Secondary load high low VSRC 2V OUT Vcc 15V 14.5V VCCOFF 9V Vsec normal mode burst mode soft start t Infineon Tech PCI Group 28.11.03 12 Preliminary Data Sheet Restart timer ICE1QS01 If voltage VRZI is lower than 50 mV and gate drive OUT is low an internally created restart pulse will switch gate drive OUT high every 50 s and the minimum switching frequency is about 20 kHz. Restart pulse is inhibited if VRZI is higher than 50 mV. So the MOS transistor cannot be switched on until the transformer is discharged. VCC overvoltage protection If VCC exceeds the VCCD threshold a latch is set and the gate is disabled. Reset of latch occurs when VCC is falling below VCCon- VCCBHY. Overvoltage fault comparator (OFC) With an external sense resistor connected to pin OFC primary current can be sensed directly. If the sensed current exceeds the internal VOFC threshold a latch is set and gate is disabled. Reset of latch occurs when VCC is falling below VCCon- VCCBHY. Notice: If this comparator is not used pin OFC has to be connected to ground. Mains undervoltage Power supplies must be shut down when mains voltage is below a certain limit to avoid too long ontime of MOS-FET switch, which would lead to a switching frequency in audible spheres. Mains undervoltage is sensed during the off-time of the MOS-FET switch. If the current flowing into pin PCS is smaller than 100 uA, then the output is latched and cannot be switched to high state. Infineon Tech PCI Group 28.11.03 13 Preliminary Data Sheet Fold back point correction ICE1QS01 With increasing mains voltage the switch on time becomes shorter and so the frequency becomes higher. With higher frequency also the maximal possible output power becomes higher. With higher power the danger in case of failure increases. To avoid this, the foldback point correction circuit senses main voltage to reduce the on-time of the switch. Mains voltage is sensed at the supply coil of VCC voltage via a resistor connected to pin RZI. During on-time of the MOS-FET switch current is pulled out from pin RZI. When this current is higher than 500 A, one fifth of the current higher than this threshold is driven into pin PCS to increase the voltage slope charging the capacitor connected to this pin. IRZI - 0, 5mA IPCSFO = -------------------------------- ,( IRZI > 500uA ) 5 Figure: Fold back point correction Vpcs with fold back point correction Vpcs at high mains voltage 5V Vpcs Pmax Pmax without fold back point correction Vpcs at low mains voltage Pmax with fold back point correction t0 t1 t2 t t3 Vmains Infineon Tech PCI Group 28.11.03 14 Preliminary Data Sheet Absolute maximum ratings Parameter Charge Current into Pin2 Voltage at Pin 2 Current into Pin 3 Voltage at Pin 4 Voltage at Pin 5 Current into Pin 7 Voltage at Pin 8 ICE1QS01 Symbol IPCS VPCS IRZI IRZI VSRC VOFC IOUT VCC Min Max 500 Unit uA V mA mA V V mA V Remark During start up -0.3 -10 -0.3 -0.3 -500 -0.3 21 10 VSRCCL 6 500 21 VRZI>VRZICH VRZI ESD Protection Storage Temperature Operating Junction Temperature Thermal Resistance Junction-Ambient Tstg TJ RthJA -50 -25 4000 150 150 100 V C C K/W MIL STD 883C method 3015.6, 100pF,1500 P-DIP-8 Infineon Tech PCI Group 28.11.03 15 Preliminary Data Sheet Characteristics (Unless otherwise stated, -25C ICE1QS01 Symbol min. typ. max. Unit Test Condition VCC=VCCon-0.5V Output low SRC soft start mode Start Voltage Digital voltage step Step pulse rate Soft start time Current source rise time Current source on time VSRC1 VSRCST tSRCSTR tST tSTRT tSTOT 2.5 360 3 24 9 12 V mV ms ms s s VSRC=0.2V to 2.0V CSRC=10nF Ioptocoupler=0 A Ioptocoupler=0 A SRC normal mode Source resistor Clamping threshold voltage Threshold upward count Threshold downward count Reset counter to one Counter time 1) Sink current prim reg mode Burst mode latch threshold voltage RSRC VSRCCL VSRCSU VSRCD VSRCR tCOUNT ISRCS VSRCB 20 5 3.5 4.4 4.8 50 500 2.0 kOhm V V V V msec A V VRZI > 5V VSRC PCI Group 28.11.03 16 Preliminary Data Sheet ICE1QS01 Parameter Symbol min. typ. max. Unit Test Condition RZI (regulation and zero crossing input) Zero crossing threshold voltage Time delay switch on Biascurrent Clamping voltage low state Clamping voltage high state Primary regulation threshold discharge current Primary regulation threshold charge current Ringing suppression threshold voltage Ringing suppression time Foldback point correction current threshold VRZIT tdon IRZIB VRZICL VRZICH VRZIDC VRZICC VRZIT tRZIP tRZIP IPCSF 50 500 25 -0.2 5.7 5 4.4 1 2.5 25 500 mV nsec A V V V V V sec sec A VRZI > VRZIT VRZI < VRZIT VRZI=5V IRZI = -1mA IRZI= 5mA VRZI Gate enable threshold voltage Basic voltage Shut down delay Mains undervoltage lockout current Voltage drop startup diode Discharge current VPCSE VPCSB tSRC IPCS VPCSD IPCSD 1.0 1.5 100 100 0.7 4 V V nsec A V mA IPCS=300A VPCS=3V VPCS Bias Current Gate drive disabled threshold voltage Shut Down Delay IOFCB VOFC tOFC -1 1.0 100 1.05 A V ns Infineon Tech PCI Group 28.11.03 17 Preliminary Data Sheet ICE1QS01 Parameter Restart Timer Restart time Symbol min. typ. max. Unit Test Condition tRES 55 s VRZI<25mV Gate Drive Output voltage low Output voltage high Output voltage active shut down Rise time Fall time 1 11 1 70 55 V V V ns ns VCC=7V IOUT=20mA COUT=1nF COUT=1nF Infineon Tech PCI Group 28.11.03 18 Preliminary Data Sheet Figure: Circuit Diagram for Standard Application ICE1QS01 Infineon Tech PCI Group 28.11.03 19 Preliminary Data Sheet ICE1QS01 Figure: Circuit Diagram for Application with PFC and Low Voltage Standby Mode Infineon Tech PCI Group 28.11.03 20 Preliminary Data Sheet ICE1QS01 Plastic Package, P-DSO-8-3 (Plastic Dual Small Outline Package) Plastic Package, P-DIP-8-4 (Plastic Dual In-line Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Dimensions in mm Infineon Tech PCI Group 28.11.03 GPD05025 GPS05121 21 |
Price & Availability of ICE1QS01
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |