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| www..com FASTPULSE MediaCAT HIGH SPEED LAN TRANSCEIVERS Twisted pair transceiver kit for TP-FDDI, 100BaseTX and ATM 155 Mbps Matched integrated circuit and magnetic module Flexible, cost-effective frontend solution Part Number PE-95000 PE-95010 PE-68517L Description Transceiver IC Transceiver IC Magnetic Module Magnetic Module Application 100Base-TX & TP-FDDI ATM 155 Mbps 100Base-TX ATM 155 Mbps TP-FDDI 100Base-TX General Description PE-69016 FASTPULSE MediaCAT (Chip And Transformer) is a transceiver Features component kit which enables the design of high performance, low* High performance twisted pair transceiver solution cost frontends for high speed LAN products. MediaCAT consists of a monolithic twisted pair transceiver which implements the core * Flexible frontend kit for 100Base-TX, ATM 155 & TP-FDDI Transmit/Receive signal processing and a matched magnetic mod* Full compliance with PMD standards IEEE, ANSI and ATM ule which provides the wideband transformer coupling and EMI * Supports 100m of Unshielded Twisted Pair (UTP), Category 5 DataShee filtering. The MediaCAT transceiver forms the analog interface between the digital PHY controller and the twisted pair cable or Shielded Twisted Pair (STP) cable .com (UTP-5 or STP). The matched nature of the devices and proven performance reduces the design effort and risk of implementing MediaCAT IC 100 Mbps+ frontends. * * * * * * * Employing FASTPULSE technology, the MediaCAT transceiver PE-95000/10 incorporates transmit conditioning, receiver adaptive equalization to compensate for cable losses and baseline restoration to correct DC drifts in receiver datastream. The two key encode/decode schemes which the ICs can implement are MLT3 (PE-95000) and Binary (PE-95010). MLT3 is a three level coding scheme which is used in TP-FDDI and 100Base-TX applications to support 125 Mbaud (100 Mbps) data transmission over 100 m of shielded (STP) or unshielded twisted pair (UTP) Category 5 cable (2 pair). Binary coding (NRZ) is used principaly for ATM 155 Mbps applications, to support 155 Mbps transmission over 100 m STP or UTP Category 5 cable. The device has a high degree of flexibility to allow it to be used in various standard applications and to enable performance tailoring for customer specific requirements. The PE-68517L is an integrated magnetic module device designed for TP-FDDI, 10/100Base-TX and ATM155 Mbps applcations. It provides a balanced, wideband transformer with dual common mode chokes to minimize EMI emissions. The device characteristics are tuned to the MediaCAT transceiver resulting in an optimized device pair. For certain 10/100 Mbps applications the PE-69016 provides the 10 Mbps and 100 Mbps magnetic interface with integrated passive mixer. Integrates high performance and programmable adaptive equalizer Integrates compliant base line wander correction circuitry Versions for MLT3 and binary operation Programmable drive current Direct interface to PHY controllers EMC optimized design -- edge rate control, CMRR BiCMOS device/PLCC28 package MediaCAT Magnetics * * * Integrated transformer/choke device -- tuned to MediaCAT IC Provides TX/RX wide bandwidth isolation and EMI filtering SMD package for IR reflow compatibility Applications * * * * * * * Network adapter cards (ISA, PCI, VME etc.) Hubs or concentrators Motherboards (PC, workstation, industrial) Bridges, routers, switches Switch uplink modules Point to point links (Telecom) Peripherals: storage, print servers, etc. MediaCAT devices meet or exceed the electrical specifications of the following standards: ANSI X3.263 TP-PMD for TP-FDDI, IEEE 802.3u for Fast Ethernet 100Base-TX and ATM-UNI-PMD STS3c for ATM 155 Mbps applications. .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 1 .com H335.A (9/97) DataSheet 4 U .com www..com FASTPULSE MediaCAT COFF Block Diagram BASELINE RESTORATION ZEQ2P ZEQ2N ZEQP ZEQN REQP REQN RDP DECODER RXP ADAPTIVE EQUALIZER RXN RD+ RD- RX+ RX- RDN PHY CONTROLLER CPEAK PEAK DETECTER CT EQGAIN CT SDP SIGNAL DETECT REFERENCE CIRCUIT EQREF CT CMT TX+ TX- CDEL TDP ENCODER TXP TRANSMIT AMPLIFIER TXN TD+ TD- TDN PE-95000 / PE-95010 PE-68517L VSS t4U.com VDD ENCSEL TXREF e DataShe Functional Description .com section details the filters required (at REQP/REQPN, ZEPQ/ZEQPN and ZEQP2/ZEQPN2 pins) for standard applications over standard twisted pair cable. The effect of the external filter networks on the signal is varied from zero to full compensation by a feedback loop which senses the incoming amplitude (with peak detector) and optimizes the applied equalization. The equalized signal is fed to the decoding circuit which converts the analog signal to a digital PECL datastream, converting from MLT3 or NRZ waveforms as selected by the ENCSEL pin. The baseline restoration loop compensates for baseline wander i.e DC drifts in incoming signal which may occur due to data pattern dependent DC shifts and the inherent low frequency bandwidth of the channel and AC coupling transformers. If not corrected this baseline wander effect can cause degradation in signal/noise ratio and furthermore, result in data errors/link failure. The feedback loop compares the incoming equalized signal with a reconstructed reference. The difference is filtered and used to effect low frequency compensation in order to maintain the equalized signal at the reference level. The filter characteristic is determined by the external capacitor at COFF. Its value has been chosen to remove disruptive high frequency components while allowing the circuit to track baseline changes limited by the time constant of the transformers. The receiver outputs are then driven out by PECL buffers to be connected to physical layer controller. The signal detect circuit monitors the gain control to give a reliable indication of the presence of a valid equalized signal in accordance with the TP-PMD specification. The transmitter inputs (TDP, TDN) receive a differential data stream at pseudo ECL levels from the physical layer controller. The signal is fed to an encoder which converts the binary data (NRZI) to MLT3 format, or passes it through unencoded, (NRZNRZ) depending on the setting of the ENCSEL pin (see Fig. 2). The signal is then fed to a current output driver whose maximum signal amplitude is controlled by an external resistor at TXREF. The differential current output at TXP, TXN drives the cable via the transformer/Choke module. The pull-up resistors for transmit outputs effectively form the line termination for the cable (Zcable/2 since transformer is 1:1). The wide band transformers provide the high voltage isolation and exhibit a high inductance in order to minimize signal droop in presence of DC bias, i.e baseline shift. The dual common mode chokes and further decoupling schemes ensure minimal EMI emissions. In the receive channel, the incoming differential signal from the cable passes through the transformer/choke before being terminated and fed to the RXP/RXN inputs of the IC. The termination is performed by the pull-up resistors (Zcable/2). The core function of the receiver circuitry is the adaptive equalizer which compensates for the cable losses. This attenuation and phase distortion will vary with frequency and cable length. These cable characteristics are defined by EIA/TIA 568 standard -- Figure 1 shows typical UTP-5 cable attenuation curves which incorporate "real world" connector and punch-down block contributions, as well as typical equalizer response curve to compensate for these losses. The equalizer transfer function of PE-95000/10 is fully controlled by external components resulting in a low cost and flexible architecture. The application circuit .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com H335.A (9/97) 2 .com DataSheet 4 U .com www..com FASTPULSE MediaCAT FIGURE 1 Typical UTP CAT5 Cable Loss Curves 0 dB 25m 50m -10 dB 75m Typical Equalizer Transfer Function 30 25 125m 20 100m (dB) 15 75m 10 50m -20 dB 100m 5 0 -5 100KHz 0m 25m -30 dB 100 KHz 1.0MHz 10MHz 100MHz 500MHz 10 MHz 100 200 MHz MHz Frequency t4U.com e DataShe .com FIGURE 2 NRZI-MLT3 Line Coding Data to be Transmitted (After 4B/5B Encoding and Scrambling) 1 1 1 1 1 0 0 1 1 1 0 1 0 0 1 0 1 0 0 1 1 1 1 0 Line Bit Clock at the Baud Rate NRZI Waveform MLT-3 Waveform .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 3 .com H335.A (9/97) DataSheet 4 U .com www..com FASTPULSE MediaCAT System Application PHYSICAL CONTROLLER PMD TRANSCEIVER MEDIA CELL EXTRACTIO FRAMING SERIAL TO PARALLEL TWISTED PAIR ATM 155 CLOCK RECOVERY CLOCK GENERATOR Transceiver IC TD CELL INSERTION FRAMING SYNC. PARALLEL TO SERIAL NRZ DATA (PECL) PE-95010 MediaCAT PE-68517L Magnetic RD Connector NRZ DATA (LINE) TP-FDDI/100BASE-TX 4B/5B DECODER DESCRAMBLE SERIAL TO PARALLEL TWISTED PAIR t4U.com CLOCK GENERATOR SD+ Transceiver IC Magnetic CLOCK RECOVERY RD Connector e DataShe TD .com 4B/5B CODER SCRAMBLE PARALLEL TO SERIAL NRZI DATA (PECL) PE-95000 MediaCAT PE-68517L MLT3 DATA (LINE) Switch 4B/5B DECODER DESCRAMBLE SERIAL TO PARALLEL TWISTED PAIR 10/100BASE-TX CLOCK GENERATOR MediaCAT Transceiver IC 4B/5B CODER SCRAMBLE PARALLEL TO SERIAL PE-95000 PE-68517L NOTES: 1. Switching can also be performed here. 2. PE-69016 provides 10/100 transformer/choke with passive mixer 10Base-T Transceiver 10Base-T Magnetics MediaCAT enables implementation of any of the following 100Base-TX product architectures: 1. 100Base-TX only adapters and repeaters. 2. 10/100-TX adapters with separate 10/100 cable connectors. 3. 10/100-TX products which employ 10/100 switching (on primary or secondary of magnetics). 4. 10/100-TX products which employ common magnetic module (PE-69016) with inherent 10/100 mixing. The 10/100 system diagram indicates a .com generic switching arrangement. U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com H335.A (9/97) 4 .com DataSheet 4 U .com Magnetic Relay CLOCK RECOVERY NOTE 1 Connector www..com FASTPULSE MediaCAT Signal ZEQN ZEQP ZEQ2N ZEQ2P RDP RDN VDDN CPEAK SDP VSSN CDEL Pin # Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Equalizer Network 1 (1) I/O I/O I/O I/O I/O O O - O O - O I Type Voltage Voltage Voltage Voltage PECL PECL Supply Current PECL Supply Current PECL NOTES: RDP RDN VDDN CPEAK SDP VSSN CDEL 5 6 7 8 9 28 27 Equalizer Network 1 + (1) Equalizer Network 2 - (2) Equalizer Network 2+ (2) 26 25 24 23 4 3 2 1 ZEQ2P ZEQ2N ZEQP ZEQN VSSR REQP REQN Pin Descriptions PE-95000/10 22 21 20 19 Receive Data + (To controller) Receive Data - (To controller) Supply Voltage (Receive) Peak detector capacitor Signal Detect + Ground (Receive) Signal Detect delay capacitor (4) Transmit input - (From Controller) (3) 10 12 13 14 15 16 17 11 1. ZEQP/N: The RC network between these pins sets a frequency dependent gain which is increased linearly from zero to maximum as the equalization level increases from minimum to maximum. t4U.com TDN TDP VDDTX TXP TXN ENCSEL VSSTX TXREF EQREF COFF EQGAIN RXP RXN VDDR REQN REQP VSSR 2. ZEQ2P/N: The RC network between these pins sets a frequency dependent gain which is increased line DataShe Transmit input + (From Controller) I PECL early from zero to maximum as the equalization level increases from its mid point to maximum. This pro.com Supply Voltage (Transmit) - Supply vides gain boost for longer lengths of cable. Transmit Data output + (To cable ) Transmit Data output - (To Cable) MLT3/Binary mode select (5) Ground (Transmit) Transmit Amplitude reference (6) Equalizer reference current (7) DC offset correction capacitor (8) Equalizer gain control (9) Receive input + (from cable) Receive input - (from Cable) Supply Voltage (Receive) Equalizer gain resistor - (10) Equalizer gain resistor + (10) Ground (Receive) O O I - I I O O I I - I/O I/O - Current Current CMOS Supply Current Current Current Current Voltage Voltage Supply Voltage Voltage Supply 3. CPEAK: The RC network at CPEAK pin control the frequency response of the on chip peak detector. 4. CDEL: The capacitor at CDEL delays assertion of the SD signal to allow the equalizer to stabilize. Max assert time (us)=C(EQGAIN)(nF)X40 + C(CDEL)(nF)X25. 5. ENCSEL: TTL compatible CMOS selection pin of encode/decode mode. High = Binary, Low = MLT3. 6. TXREF: Resistor controls the amplitude of the current outputs, which determines the transmit signal voltage amplitude. For the total system (Chip + Transformer), the resistor value can be determined as follows: R(TXREF) = (20 x Zcable) / Vpp where Vpp = peak-peak differential amplitude (line output) (V) Zcable = Characteristic differential cable impedance 7. EQREF: The resistor at EQREF pin sets internal reference currents for the receiver circuitry. 8. COFF: Capacitor determines time constant of BLW loop. 9. EQGAIN: Indicates gain factor of equalizer. The capacitor at this pin determines the maximum SD deassert time. Maximum deassert time (us) = C(EQGAIN) (nF) x 20 10. REQP/N: The resistor at REQP/N sets the minimum signal gain through the equalizer. .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 5 H335.A (9/97) .com DataSheet 4 U .com TDN TDP VDDTX TXP TXN ENCSEL VSSTX 18 VDDR RXN RXP EQGAIN COFF EQREF TXREF www..com FASTPULSE MediaCAT Application Circuits 301 TP-FDDI/100BASE-TX 100pF 4 +5V ZEQ2P 7 10nF 82 RECEIVE DATA 150pF 237 150pF R 196 28 27 26 REQP VSSR REQN VDDR +5V FB 3 ZEQ2N 2 ZEQP 1 ZEQN PHY CHIPSET +5V 25 301 10nF 49.9 49.9 681 R 10nF R TP-FDDI PE-68517L 15 16 0.1uF 14 10 9 VDDN 82 R 5 6 RXN RDP RDN SDP VSSN TXN RXP 24 23 R RJ-45 CONNECTOR 8 7 6 5 4 3 2 1 75 75 RXRX+ ABB+ A+ TXTX+ +5V 130 82 SIGNAL DETECT 130 E +5V 82 R 9 10 12 13 PE-95000 16 15 17 14 10nF T 49.9 49.9 22pF R 130 E TRANSMIT DATA 2 1 0.1uF 3 T 82 TDN TDP EQREF COFF CPEAK CDEL 11 VSSTX TXREF TXP ENCSEL VDDTX EQGAIN 22 4.7nF T R +5V 7 8 130 E 130 1M R 8 18pF R 0.1uF 2Kv (Optional) 10nF R 19 20 976 1K T R 21 220pF R 18 100BASE-TX FB PE-68517L 10 9 RJ-45 CONNECTOR 8 7 6 5 4 3 2 1 75 75 AA+ RXBB+ RX+ TXTX+ OPTIONAL [IMPROVE EMI & RETURN LOSS ) 82nH t4U.com 150 pF 237 16 18pF 39.2 2 e DataShe 15 .com FB 82nH 1 7 8 ATM 155 100pF 301 150 pF +5V R 196 28 27 26 VSSR REQP REQN VDDR 25 301 10nF RXN 24 23 0.1uF R 49.9 49.9 681 R 10nF R 0.1uF 2Kv (Optional) 4 +5V ZEQ2P 7 10nF 82 RECEIVE DATA 3 ZEQ2N 2 ZEQP 1 ZEQN PHY CHIPSET +5V VDDN ATM USER PE-68517L 15 16 14 10 9 82 RJ-45 CONNECTOR 8 7 6 5 4 3 2 1 75 75 RXRX+ ABB+ A+ TXTX+ R 5 6 RDP RDN SDP VSSN TXN RXP +5V 130 82 SIGNAL DETECT 130 E 9 10 R 12 13 PE-95010 16 15 17 14 +5V 49.9 49.9 12pF R 130 E TRANSMIT DATA +5V 82 2 1 0.1uF 3 T 82 TDN TDP EQREF COFF CPEAK CDEL 11 VSSTX TXREF TXP ENCSEL VDDTX 7 8 130 E 130 1M R 8 18pF R 0.1uF 2Kv Optional 10nF T 10nF R 19 20 1.96K 1K T R 21 220pF R EQGAIN 18 22 4.7nF T R +5V FB ATM SWITCH PE-68517L 10 9 RJ-45 CONNECTOR 8 7 6 5 4 3 2 1 75 75 TXTX+ ABB+ A+ RXRX+ OPTIONAL (IMPROVE EMI & RETURN LOSS) 82nH 16 12pF 39.2 1 2 82nH 15 7 8 0.1uF 2Kv Optional .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com H335.A (9/97) 6 .com DataSheet 4 U .com www..com FASTPULSE MediaCAT Application Circuit +5V 200 200 5 7 1 2 10/100BASE-TX with PE-69016 10Base-T Transceiver FB TX+ TXRX+ RX- 301 150pF 237 150pF 100pF 4 +5V 2EQ2P 7 10nF 82 RECEIVE DATA +5V +5V 6 R 196 28 27 26 REQP VSSR REQN VDDR 25 301 10nF RXN 24 23 R 49.9 49.9 681 R 10nF R 3 4 3 2EQ2N 2 2EQP 1 2EQN PHY CHIPSET +5V VDDN RJ-45 CONNECTOR 19 18 8 7 6 5 4 3 2 1 75 75 AA+ RXBB+ RX+ TXTX+ 82 R 5 6 RDP RDN SDP VSSN TXN RXP +5V 130 82 SIGNAL DETECT 130 E 9 10 R 12 13 PE-95000 16 15 17 14 49.9 49.9 22pF 10 0.1uF 9 T 10nF T 8 13 12 130 E TRANSMIT DATA +5V 82 82 TDN TDP EQREF COFF CPEAK CDEL 11 VSSTX TXREF TXP ENCSEL VDDTX 130 130 E 1M R 8 18pF R t4U.com TXOFF 0 -- 5V +5V 10nF R 19 20 706 1K T R 21 220pF R EQGAIN 18 22 4.7nF PE-69016 0.1uF 2Kv Optional e DataShe .com T R FB +5V NOTE 1. Refer to PE-69016 data sheet H305 for more detailed information Layout Guide EQUALIZER COMPONENTS Receive Ground Plane (R) RJ-45 RDP RDN PE-95000/10 RXN RXP MAGNETICS PE-68517L SDP TDN TDP ECL Ground Plane (E) TXN TXP Transmit Ground Plane (T) Chassis Ground Plane .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 7 .com H335.A (9/97) DataSheet 4 U .com www..com FASTPULSE MediaCAT Application Notes 1 TP-FDDI/100Base-TX UTP-5 application circuit shows RJ45 pinout for TP-FDDI application with 100Base-TX pinout shown in the insert box. ATM 155 Mbps UTP-5 application circuit shows RJ45 pinout for adapter (user) node with pinout for ATM switch (equipment) node shown in the insert box. All resistors are 1% tolerance, capacitors 5% except for bypass capacitors. The equalizer components connected to REQP/N, ZEQP/N, ZEQ2P/N are sensitive and should be placed as close as possible to the pins to avoid coupling high frequency noise into the receiver signal path. Keep area in immediate vicinity of these signals as free as possible of other signal routing. Keep layout as symmetric as possible to avoid uneven parasitic loading. PCB traces connecting external components to TXREF, EQREF, COFF and CPEAK pins should also be kept as short as possible. 13 For TP-FDDI over STP (150 ) applications, the followiing modifications are required: R (Txref ) = 1.21K; R (REQP/REQN) = 261 ; Receiver termination = 2X 75 ; Transmit termination = 2 X 75 . Pinout of DB9 connector is as follows -- Transmit: TX+ = P5, TX- = P9; Receive: RX+ = P1, RX- = P6. There is no need to consider termination of unused pairs because of the inherent shielding of the cable. 14 For 10/100Base-TX there are a number of architecture choices. The circuit shown utilizes a single magnetic module PE-69016 which integrates the 10/100 transformer/ choke and incorporates passive mixing of 10/100 transmit signals (see data sheet H305 for detailed information). For the 10Base-T port, the module is designed for a number of transceivers which have integrated filtering including SEEQ 80C24 and Micro Linear ML2652/2653. 2 3 4 5 t4U.com 6 7 15 For the 10/100Base-TX application circuit, it should be noted that termination resistors are present at both 10Base-T and 100Base-TX IC transmitter outputs, but only at the 100Base-TX IC receiver input. A switching transistor DataShee The termination resistors on the receiver inputs must be is shown connected to the TXREF pin which can be used connected to a common mode voltage of 3.5 V. This is .com to disable the 100Base-TX transmit output signal. Forcing generated from the receiver 5 V supply by the divider netthe TXREF pin above its normal operating voltage (1.25 V) work shown. Decoupling of this voltage is recommended disables the current to the TX output driver effectively disfor noise immunity. abling it. For this application, it is not essential to disable the 100TX outputs -- it would also suffice to ensure that The transmit signal rise-time can be adjusted by a shunt transmit lines from the controller remain "quiet." capacitor between signals TXP and TXN. The capacitor values shown result in Tr~3.7 ns for TP-FDDI/100Base-TX and Tr~2.8ns for ATM155 to comply with the relevant standards. 16 For 10/100TX applications, one can also use switching (relay or solid-state) on primary or secondary of the magnetic module, as indicated in the System Application section. This allows one to use standard 10Base-T transceiver/ 10Base-T filter module, with the switch typically controlled by the Physical controller/MAC device. 17 It is important to implement a PCB layout which adheres to good analog layout rules for optimum network and EMC performance. An example of such a layout is as shown in the Layout Guide, which minimizes the noise coupling through use of distinct power and ground partitions. Power islands should be connected by ferrite beads. Please refer to the EMC section for more EMC specific application guidelines. 18 Implementation of circuits as recommended will result in nominal Vpp = 2 V for TP/FDDI, 100Base-TX and Vpp = 1 V for ATM 155 applications. 19 Note the signal ground symbols used: E = ECL or Digital Ground, T = Transmit Ground, and R = Receive Ground. 8 The PECL termination networks shown (Thevenin 50 ) are typical. Signal traces should be effective 50 transmission lines. Other suitable termination schemes may be used. Place termination networks near input data pins of Transceiver (TD) and PHY device (SD,RD) for optimum termination . 9 10 For controller chipsets with differential SD inputs, the unused SD- signal can be terminated with a divider network of 68 to Vcc/180 to ground. 11 Make all differential signal paths short and of the same length to avoid unbalancing effects and unwanted loops. 12 Decouple Vcc signals thoroughly close to IC. Use series ferrite beads and ideally a 10 F tantalum may be placed in parallel with the 0.1 F low inductance ceramic bypass capacitor. Device ground pins should be directly connected to low .comimpedance ground plane. U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com H335.A (9/97) 8 .com DataSheet 4 U .com www..com FASTPULSE MediaCAT Performance The following eye pattern measurements show the operation of the adaptive equalizer and the jitter performance on a design using the MediaCAT solution. Figure A shows the MLT3 transmit output waveform at 0 m cable. Figure B shows the waveform at receiver input after the attenuation and phase distortion effects of 100m UTP-5 cable. Figure C shows the recovered NRZI data for same signal. Similar measurements are repeated in Figures D, E and F for ATM 155 Mbps NRZ signals. TP-FDDI/100Base-TX MLT3 Transmit Output (TX) Receiver Input (RX) NRZI Receiver Output (RD) t4U.com A 0 Meter UTP-5 Cable 500mV/DIV, 2ns/DIV B 100 Meter UTP-5 Cable 200mV/DIV, 2ns/DIV C .com 100 Meter UTP-5 Cable 200mV/DIV, 2ns/DIV e DataShe ATM-155 NRZ Transmit Output (TX) Receiver Input (RX) NRZ Receiver Output (RD) D NOTES 0 Meter UTP-5 Cable 200mV/DIV, 2ns/DIV E 100 Meter UTP-5 Cable 100mV/DIV, 2ns/DIV F 100 Meter UTP-5 Cable 200mV/DIV, 2ns/DIV All jitter measurements shown are peak values resulting from combination of transmit, receive and cable contributions. In MLT3 mode, the transmit eye pattern has a 3.5 ns rise-time, overshoot <3% and transmit jitter <1 ns. As a result of this, the receiver eye pattern has < 2 ns of jitter at 100 m UTP-5 cable. In NRZ mode, the transmit eye pattern has a rise time of 3 ns, <5% overshoot and transmit jitter <1 ns . As a result, the receiver jitter at 100 m UTP-5 cable is < 1.6 ns. There is a general performance trade-off involved here. A faster rise time will reduce jitter and result in lower Bit Error Rate (BER). However, a faster rise time can also result in excessive signal overshoot and EMI emissions when signal encounters impedance mismatches in cable or punch down blocks. The application circuit shown should result in optimum waveform parameters. .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 9 .com H335.A (9/97) DataSheet 4 U .com www..com FASTPULSE MediaCAT Electrical Characteristics Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Lead Solder Temp/Time Symbol Vcc VI -- MIN 0 GND - 0.3 -- Typical -- -- -- MAX 6.0 Vcc + 0.3 240/10 Units V V C/s Recommended Operating Conditions Supply Voltage Supply Current Operating Temperature Storage Temperature Vcc Is TA Ts 4.75 -- 0 -40 5.0 170 25 -- 5.25 200 70 +125 V mA C C Transmitter Characteristics PECL High Level Input PECL Low Level Input Transmit Output Current at TXP/N with R(txref) = 1K(1) Rise/Fall Time(2) Total Peak-to-Peak Jitter TD+/-VIH TD+/-VIL Iout Tr/Tf -- Vcc--1170 Vcc--1950 38.8 -- -- -- -- 40 -- 0.5 Vcc--720 Vcc--1440 41.2 2.0 1.0 mV mV mA ns ns t4U.com Receiver Characteristics Differential input signal at RXP/N - PE-95000 PE-95010 Common Mode input voltage at RXP/N PECL High Level Output at RDP/N(3) -- -- -- RD+/-VOH RD+/-VOL VOH-VOL TR TF -- -- -- -- .com 3.0 Vcc--1220 Vcc--1950 600 0.3 0.3 -- -- 2 1 3.5 -- -- -- 0.7 0.7 1.0 1.5 2.5 1.5 4.0 Vcc--720 Vcc--1600 -- 1.2 1.2 2.0 2.5 V V V mV mV mV ns ns ns ns e DataShe PECL Low Level Output at RDP/N(3) PECL Output Voltage Swing Rise Time at RDP/N (10%-90%) Fall Time at RDP/N (90%-10%) Total Peak-to-Peak Jitter Binary Mode(4) (PE-95010) Total Peak-to-Peak Jitter MLT3 Mode(4) (PE-95000) Signal Detect Characteristics PECL High Level Output PECL Low Level Output Assert Time (Max) Deassert Time (Max) SD+ VOH SD+ VOL -- -- VCC-1220 Vcc--1950 -- -- -- -- -- -- VCC-720 Vcc--1600 1000 350 mV mV s s Control Signals Input high level output at ENCSEL to select Binary Mode Input low level output at ENCSEL to select MLT3 Mode 4.0 -- -- -- -- 0.8 V V NOTES 1. 2. 3. IOUT is set by resistor at TXREF. IOUT = 40/R(TXREF). Rise/Fall Time can be controlled by external capacitor. See application circuit. Measured with standard PECL load, 50 to VCC-2 V. 4. 5. Includes jitter from the transmitter, cable and receiver in the systems shown in the application diagrams. Refer to data sheets for detailed specifications of magnetic modules: PE-68517L (H303) and PE-69016 (H305). .com U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com H335.A (9/97) 10 .com DataSheet 4 U .com www..com FASTPULSE MediaCAT Mechanicals & Schematics PE-95000/10 4 .492 .010 12,50 0,25 .452 .010 11,48 0,25 3 2 1 28 27 26 .080 TYP 2,03 .525 13,34 .365 9,27 .080 TYP 2,03 5 6 7 8 9 10 12 13 14 15 16 17 11 25 24 23 PE-95000/10 22 21 20 18 19 .300 .003 7,62 0,08 .300 TYP 7,62 .025 TYP 0,63 24X .050 1,27 Part Number .445 11,30 SUGGESTED PCB LAYOUT Weight (Grams) 1.2 4.5 3.8 Tube -- 30 20 Tape & Reel 500 250 160 .028 .003 0,71 0,08 PE-9000/10 PE-69016 PE-68517L .172 4,37 .018 .003 0,46 0,08 .420 .023 10,67 0,51 .020 TYP 0,51 PE-69016 t4U.com .018 .002 20X 0,46 0,05 .625 15,87 PE-68517L 18X .050 1,27 .com COUNTRY OF .700 17,78 .100 2,54 .100 2,54 .700 17,78 e DataShe .540 13,72 .100 2,54 PE-69016 1.005 1.145 25,52 29,08 1.015 25,78 1.185 30,10 DATE CODE COUNTRY OF ORIGIN PE-68517L .350 8,89 .040 1,02 .020 0,51 .050 18X 1,27 20X .025 0,63 DATE 1.000 25,40 .370 9,40 .450 11,43 .625 15,87 .510 MAX 12,95 0 - 8 .015 0,38 .004/0,10 SUGGESTED PCB LAYOUT .215 5,46 .010 .002 0,25 0,05 .004 MAX/0,10 .045 1,14 0 - 8 14X .045 1,14 20X Dimensions: RECEIVE CHANNEL 1 10BASE-T 2 3 100BASE-TX 4 TRANSMIT CHANNEL 5 MIXER 10BASE-T 6 7 8 100BASE-TX 9 13 TX18 RX+ 17 CMT 19 RX- Inches .005 mm Unless otherwise specified, all tolerances are 0,13 RECEIVE CHANNEL RD+ 16 9 RX+ 11 CT RD- 15 13 CT 14 CT 3 TD- 2 4 10 RX- TRANSMIT CHANNEL 7 TX- 14 CMT 6 CMT .com10 12 TX+ TD+ 1 8 TX+ U.S.A: TEL 619 674 8100 * EUROPE: TEL 44 1483 401700 * ASIA: TEL 886 7 821 3141 * WEB: http://www.pulseeng.com 11 .com H335.A (9/97) DataSheet 4 U .com www..com FASTPULSE MediaCAT EMC Considerations TP-FDDI/100Base-TX uses MLT3 line coding (fundamental frequency = 31.25 MHz) to shift 90% of spectral energy to below 40 MHz. ATM 155 (fundamental frequency = 77.5 MHz) uses NRZ coding with 1 VPP amplitude to reduce EMI emissions. The MediaCAT transceiver kit has been designed to minimize EMI emissions and noise susceptibility. Some of the key measures which help to achieve this are as follows: Edge-rate control on PE-95000/10 internal signals/transceiver output. Excellent CMRR and PSRR (power supply rejection ratio) of transmit/receive amplifiers. High performance balanced magnetics -- tuned to transceiver silicon. 5. Decoupling of RX/TX transformer center-taps (Pin 3 and 14) to ground, as shown in application circuit, reduces common mode impedance and consequently improves common mode rejection. 6. The PE-68517L allows a further option to terminate line side common mode noise. In receive channel this can be done by connecting pin 11 to chassis ground through the existing unused pair RC network (75 /0.1 F). In transmit channel, pin 6 can similarly be connected to same RC network. It should however be noted that EMC performance is a system measurement and highly implementation specific. Dual common mode choke architecture. The PE-68517L employs a single high performance choke on receiver chip-side Standard Vendor Device to boost immunity. However, for transmit channel, there are TP-FDDI/100TX AMD AM79865/AM79866 two complimentary chokes employed -- one on chip-side and one on line-side. These are to minimize common mode emisTP-FDDI/100TX National Semiconductor DP83222/83257 sions. The transmit autoformer allows for effective common ATM PMC SUNI Series mode termination, since a transformer center tap's effectiveness here would be reduced by the intervening choke ATM Fujitsu ITC Series t4U.com impedance. ATM Texas Instruments TDC1500 It is crucial to employ good high speed PCB design rules in ATM AMCC S30XX laying out the board. .com 1. Use multi-layer PCB with dedicated ground and power layers for best high frequency and EMC performance. At least four NOTES layers are recommended with outside layers for signal rout1. Further Pulse Products: The FASTPULSE series includes furing and inner layers for supply planes. ther transceiver products in more integrated platforms: 2. Use of ground plane partitions as indicated in the layout High Speed LAN Transceivers, a series of 9-pin transceivers guide is recommended. The chassis ground is generally which are drop-in replacements for standard Fiber Optic connected to backplate directly. The ground plane area transceivers. Available for ATM, 100Base-TX and TP-FDDI. under the magnetic module is left void for optimum noise MediaDrive is a compact surface mount module which separation. integrates the MediaCAT transceiver IC and magnetic module 3. Use of shielded RJ45 (UTP-5) or DB9 (STP) is recomto yield a single chip solution. Available for ATM and mended with galvanic contact to backplate for chassis 100Base-TX/TP-FDDI. ground continuity. Contact Pulse Engineering for more information on these and 4. Termination of unused cable pairs is recommended. The other latest developments. unused pairs are terminated in their common mode impedance (to chassis ground) to minimize cable reflections 2. Pulse Engineering has other magnetic modules which can be and common mode standing waves. The application circuits used with MediaCAT transceiver IC (Datasheet H303, H305 shown indicate one termination scheme, but there are other and H316). Please contact Pulse for information on these and options. Refer to the PMD standards for additional Pulse's catalog of high speed LAN magnetic modules. information. Appendix 1: Physical ControllerChipsets For More Information: Corporate 12220 World Trade Drive San Diego, CA 92128 Tel: 619 674 8100 FAX: 619 674 8262 http://www.pulseeng.com Quick-Facts: 619 674 9672 Europe 1 & 2 Huxley Road The Surrey Research Park Guildford, Surrey GU2 5RE United Kingdom Tel: 44 1483 401700 FAX: 44 1483 401701 Asia P.O. Box 26-11, KEPZ 6 Central Sixth Road KEPZ, Kaohsiung Taiwan, R.O.C. Tel: 886 7 821 3141 FAX: 886 7 841 9707 Distributor .comwarranty of products offered on this data sheet is limited to the parameters specified. Data is subject to change without notice. Other brand and product Performance names mentioned herein may be trademarks or registered trademarks of their respective owners. Printed on recycled paper. (c)1997, Pulse Engineering, Inc. 12 .com H335.A (9/97) DataSheet 4 U .com |
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