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NTMFS4839N Power MOSFET 30 V, 66 A, Single N-Channel, SO-8FL Features * * * * Low RDS(ON) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices V(BR)DSS 30 V http://onsemi.com Applications RDS(ON) MAX 5.5 mW @ 10 V 9.5 mW @ 4.5 V ID MAX 66 A www..com * CPU Power Delivery * DC-DC Converters MAXIMUM RATINGS (TJ = 25C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current TA = 25C TA = 85C TA = 25C TA = 25C Steady State TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C, tp = 10 ms PD IDM TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 15 11 2.17 9.5 7.0 0.87 66 48 41.7 132 -55 to +150 35 6 180.5 W A C A V/ns mJ W A W Unit V V D (5,6) G (4) A S (1,2,3) N-CHANNEL MOSFET A MARKING DIAGRAM D 1 SO-8 FLAT LEAD CASE 488AA STYLE 1 S S S G 4839N AYWWG G D D D Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source DV/DT Single Pulse Drain-to-Source Avalanche Energy TJ = 25C, VDD = 30 V, VGS = 10 V, IL = 19 Apk, L = 1.0 mH, RG = 25 W Lead Temperature for Soldering Purposes (1/8" from case for 10 s) A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package SO-8FL (Pb-Free) SO-8FL (Pb-Free) Shipping 1500 / Tape & Reel 5000 / Tape & Reel TL 260 C NTMFS4839NT1G NTMFS4839NT3G Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. (c) Semiconductor Components Industries, LLC, 2006 1 July, 2006 - Rev. 1 Publication Order Number: NTMFS4839N/D NTMFS4839N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note ) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA Value 3.0 57.7 143.4 C/W Unit ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient www..com Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 24 V TJ = 25 C TJ = 125C VGS = 0 V, ID = 250 mA 30 25 1 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.5 5.8 2.5 V mV/C VGS = 10 V to 11.5 V VGS = 4.5 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A 4.5 4.5 8.4 8.4 14.7 5.5 mW 9.5 Forward Transconductance gFS VDS = 15 V, ID = 15 A S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 12 29 18 7.0 8.0 21 24 7.0 ns ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 1588 352 196 13 1.6 4.8 5.8 28 nC nC 18 pF 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMFS4839N ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Parameter DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.9 0.8 22.2 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 12.5 9.7 10.8 nC ns 1.2 V Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance www..com Gate Resistance tRR ta tb QRR LS LD LG RG TA = 25C 0.93 0.005 1.84 3.3 nH nH nH W 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 90 80 ID, DRAIN CURRENT (A) 70 60 50 40 30 20 10 0 0 1 2 3 4 VGS = 3.0 V 5 6 7 8 3.5 V 4.0 V 4.6 V 6.0 V 4.4 V 4.2 V TJ = 25C ID, DRAIN CURRENT (A) 90 80 70 60 50 40 30 20 10 0 1 2 3 4 5 6 VGS, GATE-TO-SOURCE VOLTAGE (V) TC = 125C TC = -55C TC = 25C VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.012 ID = 30 A TJ = 25C 0.01 0.01 0.009 0.008 0.007 0.006 0.005 0.004 0.003 0.002 0.001 10 Figure 2. Transfer Characteristics VGS = 4.5 V 0.008 VGS = 11.5 V 0.006 0.004 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 VGS, GATE-TO-SOURCE VOLTAGE (V) 15 20 25 30 35 40 ID, DRAIN CURRENT (A) Figure 3. On-Resistance versus Gate-to-Source Voltage Figure 4. On-Resistance versus Drain Current and Temperature http://onsemi.com 3 NTMFS4839N RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.80 1.60 1.40 1.20 1.00 0.80 0.60 -50 10 -25 0 25 50 75 100 125 150 4 8 12 16 20 24 28 TJ, JUNCTION TEMPERATURE (C) www..com Figure 5. On-Resistance Variation with VDS, DRAIN-TO-SOURCE VOLTAGE (V) ID = 30 A VGS = 10 V & 4.5 V ISS, LEAKAGE (nA) 10000 100000 VGS = 0 V TJ = 150C 1000 TJ = 125C 100 Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage 3000 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 TJ = 25C CISS C, CAPACITANCE (pF) CISS CRSS COSS CRSS -15 -10 -5 VGS 0 5 VDS 10 15 20 25 30 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Figure 7. Capacitance Variation QT VDS, DRAIN-TO-SOURCE VOLTAGE (V) VGS, GATE-TO-SOURCE VOLTAGE (V) 12 10 8 6 4 2 0 0 2.5 QGS 20 19 18 17 16 VGS 15 14 13 12 11 10 9 8 7 QGD 6 5 4 ID = 30 A 3 TJ = 25C 2 1 0 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 Qg, TOTAL GATE CHARGE (nC) VDS Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Gate Charge http://onsemi.com 4 NTMFS4839N 1000 IS, SOURCE CURRENT (A) VDS = 15 V ID = 30 A VGS = 11.5 V t, TIME (ns) 100 td(off) 10 tf 30 VGS = 0 V 25 20 15 10 5 0 1 10 RG, GATE RESISTANCE (W) www..com 100 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 TJ = 25C tr td(on) 1 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 ID, DRAIN CURRENT (A) VGS = 20 V Single Pulse TC = 25C 100 10 ms 100 ms 10 1 ms 10 ms 1 RDS(on) Limit Thermal Limit Package Limit 0.1 0.1 1 10 dc 200 190 180 170 160 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 25 50 75 100 ID = 19 A 100 125 150 VDS, DRAIN-TO-SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 5 NTMFS4839N PACKAGE DIMENSIONS SO-8 FLAT LEAD (DFN6) CASE 488AA-01 ISSUE B 2X 0.20 C D 2 D1 6 5 A B 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C 4X E1 2 www..com 1 2 3 4 E c q A1 TOP VIEW 3X C SEATING PLANE 0.10 C A 0.10 C SIDE VIEW 8X e DETAIL A DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 0.99 1.20 0.00 --- 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --- 4.22 6.15 BSC 5.50 5.80 6.10 3.45 --- 4.30 1.27 BSC 0.51 0.61 0.71 0.51 --- --- 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --- 12 _ DETAIL A b e/2 1 4 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 0.10 0.05 CAB c L K E2 L1 6 5 M G D2 BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 NTMFS4839N/D |
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