 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| w w a D . w aS t ee h 4U t om .c High-Performance MIPS System Controller for Communications Applications TM (R) The Discovery GT-64240 provides a breakthrough in MIPS(R)-based communications systems architecture, setting a new standard for performance and integration. w w .D w t a S a e h t e U 4 .c m o w w w .D a aS t ee h 4U t om .c Communications Applications Featuring the DiscoveryTM GT-64240 System Controller NETWORK APPLICATIONS Marvell provides advanced LAN/MAN/WAN silicon solutions for leading-edge networking applications throughout the converged network. Remote Access Concentrator/DSLAM Optical/SONET Multi Plexer Set-Top-Box Web Switch Multi-Tenant HomePNA Concentrator SONET Ring HomePNA High-End Routers SONET Access Multi-Service Access Router Voice/Video Ethernet Switches WWW Server SAN Wireless Base Station SONET MAN Access Router RAID Voice/Video Ethernet Switches Tenant Marvell's highly integrated communications systems on silicon simplifies designs, reduces development risks and costs, and substantially improves time-to-market for manufacturers of data communications and telecommunications equipment. Marvell's semiconductor chips are highly-integrated, scalable, programmable, and flexible to meet the demands of technologically sophisticated network applications. DiscoveryTM GT-64240 Controller Application Solutions MARVELL PRODUCT FAMILIES Family High-Performance System Controllers for MIPS(R) and PowerPC(R)-Based Systems DiscoveryTM Family of High-Performance System Controllers for Communications Applications HorizonTM WAN Communications Controllers for MIPS and PowerPC-Based Communications Systems GalNet(R)-II, GalNet-2+ Switched Ethernet Controllers Number of Products 13 6 3 Additional Marvell Application Solutions Feature Summary Integrated CPU interface with PCI, memory and peripheral controllers Integrated system controllers with LAN, WAN, and peripheral interface ports Multi-channel T1/E1, T3/E3 WAN interfaces, 10/100 Ethernet ports, integrated system and communications peripherals Scalable 10/100 and Gigabit Ethernet switch family for advanced workgroup and chassis applications Scalable 10/100 and Gigabit Ethernet routing switch family for converged enterprise LAN and MAN applications 24 GalNet(R)-3 Layer 3/4/5 Converged Voice/Video/Data Network Switch Processors 7 The Industry's Most Powerful System Controller TYPICAL COMMUNICATIONS SYSTEM ARCHITECTURE ROM Console Dual UART Failover I2C Peripherals I2C Control SDRAM WAN Line Card PCI 1 WAN Line Card WAN Data Packets WAN Data Packets 75/100 MHz PCI Arbiter System Controller PCI to PCI Bridge PCI 0 10/100 Ethernet MAC 10/100 Ethernet MAC 10/100 Ethernet MAC LAN Superior Performa Higher Integrati Data Packets LAN Data Packets LAN Data Packets Innovative Architecture for Communications Applications Delivers Superior Performance A highly integrated solution, the DiscoveryTM GT-64240 is a full-featured system controller that combines high-performance system and communications peripherals on a single chip. The GT-64240 is ideally suited for next-generation communications systems designed to meet ever increasing system performance needs. Typical applications for the GT-64240 include core and edge routers, web switches, optical network hardware, load balancing and traffic management systems, wireless base stations,VPN gateways, and storage gateways. 75/100 MHz MIPS CPU Innovative Architecture and High-Speed Interfaces Deliver Superior Performance The DiscoveryTM GT-64240 supports industry standard MIPS(R) processors, including PMC-Sierra'sTM RM7000x, RM527x, RM526x as well as other R4xxx and R5000 processors. Both traditional SysAD and the extended PMC-Sierra's MIPS RM7000x bus protocols are supported. An on-chip SDRAM memory controller with a 72-bit wide (64-bit with 8-bit ECC), 100 MHz interface enables high speed data transactions between memory, processor and PCI peripherals. The internal crossbar fabric provides an aggregate throughput of 76 Gbps to deliver unprecedented performance for next-generation communications equipment. High Integration Reduces Design Time and Board Space Requirements The Discovery GT-64240 integrates system peripherals necessary to build a high performance MIPS system: PCI bridge and arbiter, interrupt controller, eight channel DMA engine, I2C controller, timers, multi-channel device bus interface, and a 72-bit SDRAM memory controller. In addition, three 10/100 Ethernet controllers and two Multi-Protocol Serial Controllers (MPSCs) are integrated for communications applications. The MPSCs can be used as UARTs if needed. Advanced Crossbar Fabric The Discovery GT-64240 architecture employs a high-speed crossbar fabric to enable non-blocking concurrent transactions between the CPU, PCI, LAN, WAN, and memory, greatly enhancing overall system performance. Ideal for Communications Applications Three 10/100 Mbps full-duplex Ethernet Designed for Communications Applications DISCOVERY TM GT-64240 BASED ARCHITECTURE Integrated Crossbar Maximizes System Bandwidth Data Packets WAN Data Packets SDRAM 100 MHz Device Bus ROM 64-Bit PCI 1 Console LAN WAN Line Card WAN Line Card Data Packets LAN Data Packets LAN Data Packets 64-Bit PCI 0 100 MHz MIPS CPU WAN nce n GT-64240 Failover I2C Peripherals The DiscoveryTM GT-64240 chip combines an advanced high-performance crossbar architecture with Marvell's market-leading system controller technology to deliver unprecedented performance.With an aggregate throughput of 76 Gbps, the GT-64240's crossbar fabric supports non-blocking concurrent transactions among peripherals at full bus speeds. ports on the Discovery GT-64240 are fully compliant with IEEE 802.3/802.3u standards and integrate MAC functionality with a dual speed MII/RMII interface. The GT-64240 supports Auto-Negotiation of port speed (10 or 100 Mbps) and communications mode (half or full-duplex) through the PHY. Up to 8K MAC addresses can be up filtered with on-chip logic allowing a packet to be discarded at the MAC level before precious bandwidth is wasted on storing and analyzing the packet by the CPU. The GT-64240 has Quality of Service (QoS) features to enable flow classification based on packet content. Each GT-64240 Ethernet MAC includes two transmit and four receive priority queues. Data can be queued based on MAC addresses, 802.1p tags or IP header Type of Service (ToS) fields. As the packet classification is done in hardware by the GT-64240 at the MAC level, CPU processing bandwidth is saved for other critical application functions. The GT-64240 supports several packet-based WAN interfaces including ISDN, frame relay, unchannelized T1/T3, xDSL (HDSL2, SDSL), HSSI, and more. Two on-chip MPSCs support UART, HDLC, BISYNC, and Transparent protocols, and can be configured as simple debug/console ports if needed. Discovery EV-64240 Development Platform * System-level development platform supporting the PMC-Sierra RM7000A MIPS CPU * Wind River VxWorks(R) Board Support Package available 32/64-bit PCI expansion board slots 10/100 Mbps Ethernet ports serial ports (UART, LVDS, and V.35 PHY modules available) 72-bit SDRAM DIMMs (up to 2 GB) * Four Flexible PCI Architecture The Discovery GT-64240 can be configured to support two independent 64-bit/32-bit PCI interfaces. Each PCI interface can operate at up to 66 MHz with zero wait states. The PCI units can act either as a master, initiating a PCI-bus transaction or as a slave, responding to PCI-bus transactions. The PCI-to-PCI transaction bridging and PCI arbitration logic are integrated to optimize system performance and simplify board design. * Three * Two * Supports High Integration Reduces Design Time DISCOVERY TM GT-64240 BLOCK DIAGRAM MIPS CPU L2 (L3) Cache + Controller FEATURE HIGHLIGHTS: DiscoveryTM GT-64240 Features * High-Performance 64-Bit MIPS CPU Interface * 64-Bit 100 MHz 64-bit SDRAM Controller System Peripherals I2C DMA GPIO MPSC 0 (55 Mbps) CPU I/F Device 32-bit, 100 MHz SDRAM 64-bit, 100 MHz PCI 1 64-bit, 66 MHz * Integrated * Eight Crossbar Fabric 10/100 MAC 10/100 MAC Independent Direct Memory Access (IDMA) Channels 10/100 Mbps Fast Ethernet MACs Multi-Protocol Serial Controllers 32/64-Bit, 66 MHz PCI 2.2 Interfaces Full-Duplex OC-48 Data Rates MPSC 1 (55 Mbps) * Three 10/100 MAC PCI 0 64-bit, 66 MHz * Two * Dual * Supports DISCOVERY DEVELOPMENT PLATFORM PARAMETRICS/FEATURES--DISCOVERY TM GT-64240 Family GT-64240 CPU Interface Frequency SDRAM Support 4 GB 64-Bit, 100 MHz SDRAM Device Support 32-Bit, 100 MHz 5 Chip Selects I/O Support Package Voltage 1.8V Core 2.5/3.3V I/O R5K/R7K MIPS(R) 100 MHz 64-Bit SysAD 2x64-Bit 665 BGA 66 MHz PCI 3 X Fast Ethernet 2 X MPSC (HDLC) High-Performance Controller for MIPS-Based Communications Systems * 64-bit 100 MHz CPU bus interface * 72-bit (64-bit with 8-bit ECC) 100 MHz SDRAM controller * Dual 32/64-bit 66 MHz PCI interfaces * Advanced internal crossbar fabric * 32-bit 100 MHz peripheral device bus interface Integrated Systems Peripherals * Interrupt controller * 8 channel DMA controller * Device bus controller * PCI arbiter 2 * Master/slave I C controller * SDRAM controller * Timers Advanced Communications Unit * Three 10/100 Ethernet controllers with packet filtering and priority queuing * Two Multi-Protocol Serial Controllers (MPSCs) 64-Bit MIPS CPU Bus Interface * PMC-Sierra RM526X, RM527X, RM7000x and other MIPS R4xxx, R5000 processor support * Traditional SysAD and PMC-Sierra RM7000x (extended bus protocols) * 100 MHz CPU bus frequency (2.5V or 3.3V configuration) * Supports PMC-Sierra RM7000x splitread transactions with out-of-order completion High-Performance SDRAM Controller * 100 MHz memory interface * 4 GB address space * Supports 2-way and 4-way bank interleaving * Supports up to 16 open pages Data Integrity Support Between CPU, PCI and DRAM Interfaces * ECC on 64-bit wide SDRAM * Parity support on CPU and PCI buses * Full error reporting including error counters 32/64-Bit, 66 MHz PCI 2.2 Interface * Dual PCI interface * 32 or 64-Bit, 66 MHz PCI interface * Transaction bridging between PCI interfaces * Supports PCI delayed read transactions Advanced 0.18u Process * 1.8V core * 2.5V/3.3V CPU interface * 3.3V I/O * 5V tolerant PCI interface * 100 MHz speed 665 PBGA Package (c)2001. Marvell International Ltd. All rights reserved. Marvell, the Marvell logo, and Moving Forward Faster are trademarks of Marvell International Ltd. Galileo Technology, Discovery, GalNet, Communications Systems on Silicon, Availability of Service (AoS), and the Galileo logo are trademarks of Galileo Technology, Inc., a division of Marvell. All other trademarks are the property of their respective owners. Marvell 2350 Zanker Road San Jose, California 95131 T: +1.408.367.1400 F: +1.408.367.1401 W: www.marvell.com W: www.galileoT.com E: info@marvell.com E: info@galileoT.com |
Price & Availability of GT-64260
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |