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TFPT Vishay Dale Linear PTC Thermistors, Surface Mount Chip FEATURES * Solderable wraparound terminations. * Alumina substrate base with PTC thin film element. * 0603, 0805, and 1206 sizes available. * Available in tape and reel packaging. * Standard tolerances: 1%, 5%, 10%. * Contact factory for non-standard tolerance. * Operation range - 55C to + 125C. STANDARD ELECTRICAL SPECIFICATIONS TCR LOT PPM -55C to + 125C 4000 - 5000 TCR* TOLERANCE ppmC 100 R25 VALUE RANGE (1%, 5% and 10% TOLERANCE)** 0603 MIN. MAX. 0805 MIN. 100 - MAX. 5K 1206 MIN. MAX. 100 - 10K 100 - 1K *Contact Vishay Dale if closer TCR lot tolerance is desired. **Other R25 values and tolerances are available upon request. STANDARD RESISTANCE VALUES 100 120 150 180 220 270 330 390 470 560 680 820 1K 1.2K 1.5K 1.8K 2.2K 2.7K 3.3K 3.9K 4.7K 5.6K 6.8K 8.2K 10.0K STANDARD TECHNICAL SPECIFICATIONS PART NUMBER TFPT 0603 TFPT 0805 TFPT 1206 1Rated POWER RATING 75mW 100mW 125mW MAXIMUM WORKING VOLTAGE RCWV1 30V DC 40V DC 50V DC Continuous Working Voltage is maximum working voltage or square root of the power rating times resistance value, whichever is less. ORDERING INFORMATION TFPT MODEL 1206 (E.I.A.) DIMENSION L LINEAR 1002 R25 First 3 digits are significant figures, 4th digit is the multiplier K TOLERANCE F = 1% J = 5% EXAMPLE: TFPT 1206 L 1002 K www.vishay.com 38 For technical questions, contact thermistor1@vishay.com Document Number 33017 Revision 29-Jul-02 TFPT Linear PTC Thermistors, Surface Mount Chip DIMENSIONS in inches [millimeters] A D Vishay Dale B C E PART NUMBER TFPT0603 A 0.063 0.006 [1.60 0.15] 0.079 0.006 [2.00 0.15] 0.126 0.006 [3.20 0.15] B 0.031 + 0.006 - 0.002 [0.80 + 0.15 - 0.05] 0.049 0.006 [1.25 0.15] 0.063 0.006 [1.60 0.15] C 0.020 0.004 [0.50 0.10] 0.020 0.006 [0.50 0.15] 0.022 0.006 [0.56 0.15] D 0.012 0.008 [0.30 0.20] 0.016 0.010 [0.40 0.25] 0.020 0.010 [0.50 0.25] E 0.012 0.008 [0.30 0.20] 0.016 0.010 [0.40 0.25] 0.020 0.010 [0.50 0.25] TFPT0805 TFPT1206 Overglaze Thermistor Alumina Substrate Inner Electrode Nickel Barrier Solderable Coating 5000 4900 4800 4700 4600 4500 4400 4300 4200 4100 4000 3900 3800 3700 3600 3500 3400 3300 3200 3100 3000 -55 ppm -25 0 TEMPERATURE IN C 25 50 75 100 125 CONSTRUCTION PERFORMANCE* TEST** TYPICAL CURVE MAXIMUM %R*** 1K and Below Above 1K .5% 1% 2% 10% 1% 2% P P High Temperature Exposure (100 hours @ 125C) Effects of Bonding (10 seconds solder dip @ 260C) Thermal Shock (30 minutes @ 65C, 30 minutes @ 125C, 5 cycles) Low Temperature Operation (Maximum rated power for 2 hours @ - 65C) Short Time Overload (2.5 x RCWV for 5 seconds) Load Life (1000 hours 70C, maximum rated power 1.5 hours "ON", 0.5 hours "OFF") Solderability (95% coverage P/F) Leaching (Physical damage P/F) .5% 1% 2% 1% 1% 2% P P *Environmental performance specifications use test procedures as outlined in MIL-R-23648D and MIL-STD-202. **Test reading accuracy of 0.3%. ***TFPTs are ESD sensitive. Document Number 33017 Revision 29-Jul-02 For technical questions, contact thermistor1@vishay.com www.vishay.com 39 |
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