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ISL43210
Data Sheet October 30, 2007 FN6563.2
Low-Voltage, Single Supply, Single SPDT Analog Switch
The Intersil ISL43210 device is a precision, bidirectional, single SPDT analog switch designed to operate from a single +2.7V to +12V supply. Targeted applications include battery powered equipment that benefit from the devices' low power consumption (5W), low leakage currents (3nA max), and fast switching speeds (tON = 28ns, tOFF = 20ns). Cell phones, for example, often face ASIC functionality limitations. The number of analog input or GPIO pins may be limited and digital geometries are not well suited to analog switch performance. This device may be used to "mux-in" additional functionality while reducing ASIC design risk. It's small package alleviates board space limitations, making it an ideal solution. The ISL43210 is a single committed SPDT, which is perfect for use in 2-to-1 multiplexer applications.
TABLE 1. FEATURES AT A GLANCE ISL43210 SW 1/SW 2 3.3V rON 3.3V tON/tOFF 5V rON 5V tON/tOFF 12V rON 12V tON/tOFF Package SPDT or 2x1 MUX 32 40ns/20ns 19 28ns/20ns 11 25ns/17ns 6 Ld SOT-23
Features
* Fully specified at 12V, 5V, and 3.3V supplies for 10% tolerances * ON-resistance (rON) . . . . . . . . . . . . . . . . . . . . . . . . . . 19 * rON matching between channels . . . . . . . . . . . . . . . . . . . <1 * Low charge injection . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max) * Single supply operation . . . . . . . . . . . . . . . . . +2.7V to +12V * Low power consumption (PD) . . . . . . . . . . . . . . . . . . . .<5W * Low leakage current. . . . . . . . . . . . . . . . . . . . . . . . . 10nA * Fast switching action - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns * Guaranteed break-before-make switching * Minimum 2000V ESD protection per method 3015.7 * TTL, CMOS compatible * Available in 6 Ld SOT-23 package * Pb-free available (RoHS compliant)
Applications
* Battery-powered, handheld, and portable equipment - Cellular/mobile phones - Pagers - Laptops, notebooks, palmtops * Communications systems - Radios, ADSL Modems - PBX, PABX * Test and measurement equipment - Ultrasound - Computerized Tomography (CT) Scanner - Magnetic Resonance Image (MRI) - Position Emission Tomography (PET) Scanner - Electrocardiograph * Heads-up displays * Audio and video switching * Various circuits - +3V/+5V DACs and ADCs - Sample and hold circuits - Digital filters - Operational amplifier gain switching networks - High frequency analog switching - High speed multiplexing - Integrator reset circuits
Related Literature
* Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)" * Application Note AN557 "Recommended Test Procedures for Analog Switches"
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL43210 Pinout
(Note 1) ISL43210 (6 LD SOT-23) TOP VIEW
IN 1 V+ 2 GND 3 6 NO 5 COM 4 NC
NOTE: 1. Switch Shown for Logic "0" Input.
Truth Table
ISL43210 LOGIC 0 1 NOTE: PIN NC ON OFF PIN NO OFF ON
Ordering Information
PART NUMBER ISL43210IH-T* PART MARKING 123I TEMP. RANGE (C) -40 to +85 -40 to +85 PACKAGE PKG. DWG. #
6 Ld SOT-23 P6.064 Tape and Reel P6.064 6 Ld SOT-23 (Pb-free) Tape and Reel
Logic "0" 0.8V. Logic "1" 2.4V.
ISL43210IHZ-T* 123Z (Note)
Pin Descriptions
PIN NAME V+ GND IN COM NO NC PIN NUMBER 2 3 1 5 6 4 FUNCTION System Power Supply Input (+2.7V to +12V) Ground Connection Digital Control Input Analog Switch Common Pin Analog Switch Normally Open Pin Analog Switch Normally Closed Pin
*Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN6563.2 October 30, 2007
ISL43210
Absolute Maximum Ratings
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 15V Input Voltages IN (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) NO, NC (Note 2) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Output Voltages COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V) Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current NO, NC, or COM (Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 40mA ESD Rating Human Body Model (Per MIL-STD-883 Method 3015) . . . . .2kV
Thermal Information
Thermal Resistance (Typical, Note 3) JA (C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 Maximum Junction Temperature (Plastic Package). . . . . . . +150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 2. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings. 3. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-Resistance, rON
Full V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V (See Figure 5) 25 Full 25 Full
0 -3 -5 -3 -5 -5 -10
19 23 0.8 1 7 0.01 -
V+ 30 40 2 4 8 3 5 3 5 5 10
V nA nA nA nA nA nA
rON Matching Between Channels, rON V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V rON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V (Note 7) V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V
Full 25 Full 25 Full
COM OFF Leakage Current, ICOM(OFF) V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V COM ON Leakage Current, ICOM(ON) DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Power Supply Rejection Ratio NO or NC OFF Capacitance, COFF COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) VNO or VNC = 3V, RL = 1k, CL = 35pF, VIN = 0V to 3V (See Figure 1) VNO or VNC = 3V, RL = 1k, CL = 35pF, VIN = 0V to 3V (See Figure 1) RL = 300, CL = 35pF, VNO = VNC = 3V, VIN = 0V to 3V (See Figure 3) CL = 1.0nF, VG = 0V, RG = 0 (See Figure 2) RL = 50, CL = 5pF, f = 1MHz (See Figure 4) RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V or Floating
25 Full
25 Full 25 Full Full 25 25 25 25 25 25
-
28 40 20 30 10 3 76 60 8 8 28
-
ns ns ns ns ns pC dB dB pF pF pF
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FN6563.2 October 30, 2007
ISL43210
Electrical Specifications - 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. (Continued) TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current, I+ DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL
Full V+ = 5.5V, VIN = 0V or V+, all channels on or off Full
2.7 -1
0.0001
12 1
V A
Full Full V+ = 5.5V, VIN = 0V or V+ Full
2.4 -1
-
0.8 1
V V A
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-Resistance, rON rON Matching Between Channels, rON
Full V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V 25 Full V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 1.5V 25 Full
0 -3 -5 -3 -5 -5 -10
32 40 0.8 1 6 7 0.01 0.01 -
V+ 50 60 2 4 10 12 3 5 3 5 5 10
V nA nA nA nA nA nA
rON Flatness, RFLAT(ON)
V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 1.5V V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V
25 Full 25 Full 25 Full
NO or NC OFF Leakage Current, INO(OFF) or INC(OFF)
COM OFF Leakage Current, ICOM(OFF) V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V
COM ON Leakage Current, ICOM(ON)
V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V or floating
25 Full
DYNAMIC CHARACTERISTICS Turn-ON Time, tON VNO or VNC = 1.5V, RL = 1k, CL = 35pF, VIN = 0V to 3V VNO or VNC = 1.5V, RL = 1k, CL = 35pF, VIN = 0V to 3V RL = 300, CL = 35pF, VNO or VNC = 1.5V, VIN = 0V to 3V CL = 1.0nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) 25 Full 25 Full Full 25 25 25 25 25 25 40 60 20 30 20 1 76 56 8 8 28 ns ns ns ns ns pC dB dB pF pF pF
Turn-OFF Time, tOFF
Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Power Supply Rejection Ratio NO or NC OFF Capacitance, COFF COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+, all channels on or off
Full
-1
-
1
A
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FN6563.2 October 30, 2007
ISL43210
Electrical Specifications - 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. (Continued) TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL
Full Full V+ = 3.6V, VIN = 0V or V+ Full
2.4 -1
-
0.8 1
V V A
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG ON-Resistance, rON rON Matching Between Channels, rON rON Flatness, RFLAT(ON) NO or NC OFF Leakage Current, INO(OFF) or INC(OFF) COM OFF Leakage Current, ICOM(OFF)
Full V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 10V V+ = 12V, ICOM = 1.0mA, VNO or VNC = 10V V+ = 12V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V (Note 7) V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V V+ = 13V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V 25 Full 25 Full 25 Full 25 Full 25 Full 25 Full
0 -3 -5 -3 -5 -5 -10
11 15 0.8 1 1 0.01 0.01 -
V+ 20 25 2 4 4 6 3 5 3 5 5 10
V nA nA nA nA nA nA
COM ON Leakage Current, ICOM(ON) V+ = 13V, VCOM = 1V, 12V, or VNO or VNC = 1V, 12V or floating DYNAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Break-Before-Make Time Delay, tD Charge Injection, Q OFF Isolation Crosstalk (Channel-to-Channel) Power Supply Rejection Ratio NO or NC OFF Capacitance, COFF COM OFF Capacitance, CCOM(OFF) COM ON Capacitance, CCOM(ON) Positive Supply Current, I+ VNO or VNC = 10V, RL = 1k, CL = 35pF, VIN = 0V to 4V VNO or VNC = 10V, RL = 1k, CL = 35pF, VIN = 0V to 4V RL = 300, CL = 35pF, VNO or VNC = 10V, VIN = 0V to 4V CL = 1.0nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz RL = 50, CL = 5pF, f = 1MHz RL = 50, CL = 5pF, f = 1MHz f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7) V+ = 13V, VIN = 0V or V+, all channels on or off
25 Full 25 Full Full 25 25 25 25 25 25 25
-
25 35 17 26 2 5 76 -105 63 8 8 28
-
ns ns ns ns ns pC dB dB dB pF pF pF
POWER SUPPLY CHARACTERISTICS Full -1 1 A
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FN6563.2 October 30, 2007
ISL43210
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4), Unless Otherwise Specified. (Continued) TEST CONDITIONS TEMP (C) MIN (Notes 5, 6) TYP MAX (Notes 5, 6) UNITS
PARAMETER DIGITAL INPUT CHARACTERISTICS Input Voltage Low, VINL Input Voltage High, VINH Input Current, IINH, IINL NOTES: 4. VIN = input voltage to perform proper function.
Full Full V+ = 13V, VIN = 0V or V+ Full
4 -1
-
0.8 1
V V A
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 6. Parts are 100% tested at +25C. Over-temperature limits established by characterization and are not production tested. 7. Limits established by characterization and are not production tested.
Test Circuits and Waveforms
3V OR 4V LOGIC INPUT 50% 0V tOFF SWITCH INPUT VNO 90% SWITCH OUTPUT 0V tON VOUT 90% LOGIC INPUT SWITCH INPUT NO OR NC COM IN GND RL 1k CL 35pF VOUT tr < 20ns tf < 20ns V+ C
Logic input waveform is inverted for switches that have the opposite logic sense.
Repeat test for all switches. CL includes fixture and stray capacitance. RL V OUT = V (NO or NC) ----------------------R L + r ON FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS FIGURE 1. SWITCHING TIMES
V+
C
SWITCH OUTPUT VOUT ON
VOUT
RG
NO OR NC
COM
VOUT
V+ LOGIC INPUT ON OFF 0V
VG
GND
IN
CL LOGIC INPUT
Q = VOUT x CL
FIGURE 2A. MEASUREMENT POINTS FIGURE 2. CHARGE INJECTION
FIGURE 2B. TEST CIRCUIT
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FN6563.2 October 30, 2007
ISL43210 Test Circuits and Waveforms (Continued)
3V OR 4V LOGIC INPUT 0V VNX SWITCH OUTPUT VOUT 90% 0V IN tD LOGIC INPUT GND NO NC COM RL 300 V+ C
VOUT CL 35pF
CL includes fixture and stray capacitance. FIGURE 3A. MEASUREMENT POINTS FIGURE 3. BREAK-BEFORE-MAKE TIME FIGURE 3B. TEST CIRCUIT
V+ C SIGNAL GENERATOR rON = V1/1mA NO OR NC VNX INX 0V OR VINH 1mA V1 COM GND RL GND NO OR NC
V+ C
IN
0.8V OR VINH
ANALYZER
COM
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
V+ C V+ C SIGNAL GENERATOR NO1 OR NC1 COM1 50 NO OR NC
IN1 0V OR 2.4V IN2 0V OR VINH IMPEDANCE ANALYZER COM NC GND
INX
0V OR VINH
ANALYZER RL
COM2
NO2 OR NC2 GND
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
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FN6563.2 October 30, 2007
ISL43210 Detailed Description
The ISL43210 bidirectional, single SPDT analog switch offers precise switching capability from a single 2.7V to 12V supply with low ON-resistance (19) and high speed operation (tON = 28ns, tOFF = 20ns). The device is especially well suited to portable battery powered equipment thanks to the low operating supply voltage (2.7V), low power consumption (5W), low leakage currents (3nA max), and the tiny SOT-23 packaging. High frequency applications also benefit from the wide bandwidth, and the very high off isolation rejection.
Power-Supply Considerations
The ISL43210 construction is typical of most CMOS analog switches, except that they have only two supply pins: V+ and GND. V+ and GND drive the internal CMOS switches and set their analog voltage limits. Unlike switches with a 13V maximum supply voltage, the ISL43210 15V maximum supply voltage provides plenty of room for the 10% tolerance of 12V supplies, as well as room for overshoot and noise spikes. The minimum recommended supply voltage is 2.7V. It is important to note that the input signal range, switching times, and ON-resistance degrade at lower supply voltages. Refer to the "Electrical Specification" tables beginning on page 5 and "Typical Performance Curves" beginning on page 9 for details. V+ and GND also power the internal logic and level shifter. The level shifter convert the input logic levels to switched V+ and GND signals to drive the analog switch gate terminals. This device cannot be operated with bipolar supplies, because the input switching point becomes negative in this configuration.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and GND (see Figure 8). To prevent forward biasing these diodes, V+ must be applied before any input signals, and input signal voltages must remain between V+ and GND. If these conditions cannot be guaranteed, then one of the following two protection methods should be employed. Logic inputs can easily be protected by adding a 1k resistor in series with the input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage, and the sub-microamp input current produces an insignificant voltage drop during normal operation. Adding a series resistor to the switch input defeats the purpose of using a low rON switch, so two small signal diodes can be added in series with the supply pins to provide overvoltage protection for all pins (see Figure 8). These additional diodes limit the analog signal from 1V below V+ to 1V above GND. The low leakage current performance is unaffected by this approach, but the switch resistance may increase, especially at low supply voltages.
OPTIONAL PROTECTION DIODE V+ OPTIONAL PROTECTION RESISTOR INX VNO OR NC VCOM
Logic-Level Thresholds
This switch is TTL compatible (0.8V and 2.4V) over a supply range of 3V to 11V (see Figure 15). At 12V the VIH level is about 2.5V. This is still below the TTL guaranteed high output minimum level of 2.8V, but noise margin is reduced. For best results with a 12V supply, use a logic family the provides a VOH greater than 3V. The digital input stages draw supply current whenever the digital input voltage is not at one of the supply rails. Driving the digital input signals from GND to V+ with a fast transition time minimizes power dissipation.
High-Frequency Performance
In 50 systems, signal response is reasonably flat even past 300MHz (see Figure 16). Figure 16 also illustrates that the frequency response is very consistent over a wide V+ range, and for varying analog signal levels. An OFF switch acts like a capacitor and passes higher frequencies with less attenuation, resulting in signal feedthrough from a switch's input to its output. Off isolation is the resistance to this feedthrough. Figure 17 details the high off isolation rejection provided by this part. At 10MHz, off isolation is about 50dB in 50 systems, decreasing approximately 20dB per decade as frequency increases. Higher load impedances decrease off isolation rejection due to the voltage divider action of the switch OFF impedance and the load impedance.
GND OPTIONAL PROTECTION DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Leakage Considerations
Reverse ESD protection diodes are internally connected between each analog-signal pin and both V+ and GND. One of
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FN6563.2 October 30, 2007
ISL43210
these diodes conducts if any analog signal exceeds V+ or GND. Virtually all the analog leakage current comes from the ESD diodes to V+ or GND. Although the ESD diodes on a given signal pin are identical and therefore fairly well balanced, they are reverse biased differently. Each is biased by either V+ or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the V+ and GND pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity. There is no connection between the analog signal paths and V+ or GND.
Typical Performance Curves TA = +25C, Unless Otherwise Specified.
40 35 30 +85C rON () 25 rON () 20 15 10 5 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 +25C -40C 45 40 35 30 25 20 15 30 25 20 15 10 20 15 10 5 -40C 0 2 4 6 VCOM (V) 8 10 12 +85C +25C -40C V+ = 5V +85C +25C -40C +85C +25C V+ = 12V V+ = 3.3V
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
0.50 0.40 0.30 0.20 0.10 0 0.25 0.20 0.15 0.10 0.05 0 0.15 0.10 0.05 0 0 -40C
V+ = 3.3V +25C +85C -40C
60 50 40 30
V+ = 5V +25C +85C -40C 0 +25C +85C -40C 2 4 VCOM (V) 6 8 10 V+ = 12V -10 +25C -20 12 0 2 4 6 VCOM (V) 8 10 12 Q (pC) +85C 20 10 V+ = 3.3V V+ = 5V V+ = 12V
rON ()
FIGURE 11. rON MATCH vs SWITCH VOLTAGE
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
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FN6563.2 October 30, 2007
ISL43210 Typical Performance Curves TA = +25C, Unless Otherwise Specified. (Continued)
100 90 80 70 tON (ns) 60 +85C 50 40 30 20 +25C 2 3 4 5 6 7 V+ (V) 8 9 10 11 12 15 -40C 30 +85C tOFF (ns) 35
25 -40C -40C 20 +25C
2
3
4
5
6
7 V+ (V)
8
9
10
11
12
FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE
3.0 NORMALIZED GAIN (dB) V+ = 3.3V TO 12V 0 -3 -6 PHASE 0 20 PHASE () 40 60 1.0 +85C 0.5 2 3 4 5 6 7 8 V+ (V) 9 10 11 12 13 1 +25C VINL RL = 50 VIN = 0.2VP-P TO 2.5VP-P (V+ = 3.3V) VIN = 0.2VP-P TO 4VP-P (V+ = 5V) VIN = 0.2VP-P TO 5VP-P (V+ = 12V) 10 100 FREQUENCY (MHz) 80 100 600 GAIN
2.5 VINH VINH AND VINL (V) 2.0 -40C +85C
1.5
+25C -40C
+85C
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 16. FREQUENCY RESPONSE
10 20 30 OFF ISOLATION (dB) 40 50 60 70 80 90 100
V+ = 3V TO 13V 0 10
RL = 50
V+ = 3.3V, SWITCH OFF 20 PSRR (dB) 30 40 50 60 70 80 10k 100k 1M 10M FREQUENCY (Hz) 100M 500M 0.3 1 10 FREQUENCY (MHz) 100 1000 V+ = 3.3V, SWITCH ON V+ = 12V, SWITCH ON V+ = 12V, SWITCH OFF
ISOLATION
110 1k
FIGURE 17. OFF ISOLATION
FIGURE 18. PSRR vs FREQUENCY
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FN6563.2 October 30, 2007
ISL43210 Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: ISL43210: 58 PROCESS: Si Gate CMOS
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FN6563.2 October 30, 2007
ISL43210 Small Outline Transistor Plastic Packages (SOT23-6)
0.20 (0.008) M C L b e C VIEW C
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES SYMBOL MIN 0.036 0.000 0.036 0.012 0.012 0.003 0.003 0.111 0.103 0.060 MAX 0.057 0.0059 0.051 0.020 0.018 0.009 0.008 0.118 0.118 0.068 MILLIMETERS MIN 0.90 0.00 0.90 0.30 0.30 0.08 0.08 2.80 2.60 1.50 MAX 1.45 0.15 1.30 0.50 0.45 0.22 0.20 3.00 3.00 1.75 6 6 3 3 4 NOTES -
6 C L 1
5
4 C L E E1
A A1 A2 b b1
2
3
e1 C D C L
c c1 D E E1
SEATING PLANE -C-
A
A2
A1
e e1 L
0.0374 Ref 0.0748 Ref 0.014 0.022
0.95 Ref 1.90 Ref 0.35 0.55
0.10 (0.004) C
L1 L2
0.024 Ref. 0.010 Ref. 6 0.004 0.004 0o 0.010 8o
0.60 Ref. 0.25 Ref. 6 0.10 0.10 0o 0.25 8o Rev. 3 9/03 5
WITH PLATING c
b b1 c1
N R R1
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
4X 1 R1 R GAUGE PLANE SEATING PLANE C L1 4X 1 VIEW C L
2. Package conforms to EIAJ SC-74 and JEDEC MO178AB. 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength L measured at reference to gauge plane. 5. "N" is the number of terminal positions. 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
L2
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 12
FN6563.2 October 30, 2007

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