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HD74HC95 8-bit Shift Register REJ03D0558-0200 (Previous ADE-205-431) Rev.2.00 Oct 06, 2005 Description This 4-bit register features parallel and serial inputs, parallel outputs, mode control, and two clock inputs. The register has three mode operation: * Parallel (broadside) load * Shift right (the direction QA toward QD) * Shift left (the direction QD toward QA) Parallel loading is accomplished by applying the four bits of data and taking the mode control input high. The data is loaded into the associated flip-flops and appears at the outputs after the high-to-low transition of the clock-2 input. During loading, the entry of serial data is inhibited. Shift right is accomplished on the high-to-low transition of clock-1 when the mode control is low; shift left is accomplished on the high-to-low transition of clock-2 when the mode control is high by connecting the output of each flip-flop (QD to input C, etc.) and serial data is entered at input D. The clock input may be applied commonly to clock-1 and clock-2 if both modes can be clocked from the same source. Changes at the mode control input should normally be made while both clock inputs are low: however, conditions described in the last three lines of the function table will also ensure that register contents are protected. Features * * * * * * High Speed Operation: tpd (Clock to Q) = 17 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) Ordering Information Part Name HD74HC95P HD74HC95RPEL Package Type DILP-14 pin SOP-14 pin (JEDEC) Package Code (Previous Code) PRDP0014AB-B (DP-14AV) PRSP0014DE-A (FP-14DNV) Package Abbreviation P RP -- EL (2,500 pcs/reel) Taping Abbreviation (Quantity) Rev.2.00, Oct 06, 2005 page 1 of 6 HD74HC95 Function Table Inputs Mode Control H H H L L L Clocks 2 (L) 1 (R) H X X X H Serial X X X X H L L L H L X X X X A X a QB+ X X X X X X X Parallel B C X b QC+ X X X X X X X X c QD+ X X X X X X X Outputs D X d d X X X X X X X QA QA0 a QBn QA0 H L QA0 QA0 QA0 QA0 QB QB0 b QCn QB0 QAn QAn QB0 QB0 QB0 QB0 QC QC0 c QDn QC0 QBn QBn QC0 QC0 QC0 QC0 QD QD0 d d QD0 QCn QCn QD0 QD0 QD0 QD0 L X X L L L H H H X X X X X QA0 QB0 QC0 QD0 Notes: 1. H : High level, L : Low level, X : Irrelevant 2. a to d : The level of steady-state input at inputs A, B, C or D respectively 3. QA0 to QD0 : The level of QA, QB, QC or QD respectively before the indicated steady-state input conditions were established. 4. QAn to QDn : The level of QA, QB, QC or QD respectively before the most-recent ( ) transition of the clock. 5. + : Shifting left requires external connection of QB to A, QC to B and QD to C. Serial data is entered at input D. Pin Arrangement Serial Input A B Inputs C D Mode Control GND 4 5 6 7 C D QC QD 11 QC 10 QD 9 8 Clock1 R-Shift Clock2 L-Shift (Load) 1 2 3 A Input QA B QB Serial 14 Vcc 13 QA 12 QB Outputs Mode CK1 CK2 (Top View) Rev.2.00, Oct 06, 2005 page 2 of 6 HD74HC95 Absolute Maximum Ratings Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Symbol VCC Vin, Vout IIK, IOK IO ICC or IGND PT Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 Unit V V mA mA mA mW Storage temperature Tstg -65 to +150 C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Recommended Operating Conditions Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time Note: *1 Symbol VCC VIN, VOUT Ta tr , tf Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 Unit V V C ns Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 Output voltage VOH 2.0 4.5 6.0 4.5 VOL 6.0 2.0 4.5 6.0 4.5 6.0 Input current Quiescent supply current Iin ICC 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Ta = 25C Typ Max -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to+85C Unit Min Max 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 IOL = 4 mA IOL = 5.2 mA A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A V V Vin = VIH or VIL IOH = -20 A V Test Conditions VIL V IOH = -4 mA IOH = -5.2 mA Vin = VIH or VIL IOL = 20 A Rev.2.00, Oct 06, 2005 page 3 of 6 HD74HC95 Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25C Item Maximum clock frequency Propagation delay time Symbol VCC (V) fmax 2.0 4.5 6.0 tPLH 2.0 4.5 6.0 2.0 4.5 6.0 Pulse width tw 2.0 4.5 6.0 2.0 4.5 6.0 Hold time th 2.0 4.5 6.0 2.0 4.5 6.0 Cin -- Min -- -- -- -- -- -- -- -- -- 80 16 14 100 20 17 10 10 10 -- -- -- -- Typ -- -- -- -- 17 -- -- 17 -- -- 6 -- -- 2 -- -- -1 -- -- 5 -- 5 Max 4 20 24 145 29 25 170 34 29 -- -- -- -- -- -- -- -- -- 75 15 13 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- -- -- 100 20 17 125 25 21 10 10 10 -- -- -- -- Max 3 16 19 180 36 31 215 43 37 -- -- -- -- -- -- -- -- -- 95 19 16 10 pF ns ns Clock ns Unit MHz Test Conditions tPHL ns Setup time tsu ns Output rise/fall time Input capacitance tTLH, tTHL ns Test Circuit VCC VCC Output See Function Table Input Pulse generator Zout = 50 Input Pulse generator Zout = 50 Serial Input Mode Control Clock 1 Clock 2 A B C D QA Output QB Output QC Output QD CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Note: C L includes the probe and jig capacitance. Rev.2.00, Oct 06, 2005 page 4 of 6 HD74HC95 Waveforms * Waveform - 1 tr 90 % 90 % 50 % 10 % tf tw VCC 50 % 50 % Data 10 % t su tf Clock-1 or Clock-2 90 % 50 % th tr t su th 0V 90 % 50 % 10 % VCC 50 % t PHL 90 % tw 0V t PLH 90 % VOH VOL QA to QD 50 % 10 % 50 % 10 % t THL t TLH Notes: 1. Input waveform: PRR 1 MHz, Zo = 50 , tr 6 ns, tf 6 ns 2. Enable = GND Package Dimensions JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g D 14 8 1 b3 7 Z E Reference Symbol Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 2.39 2.54 0.56 Max A A1 e1 D E L A A1 bp e bp e1 c b3 c e Z ( Ni/Pd/Au plating ) L Rev.2.00, Oct 06, 2005 page 5 of 6 HD74HC95 JEITA Package Code P-SOP14-3.95x8.65-1.27 RENESAS Code PRSP0014DE-A Previous Code FP-14DNV MASS[Typ.] 0.13g *1 D 8 F 14 NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. bp *2 Index mark HE E c Reference Symbol Dimension in Millimeters Min Nom 8.65 3.95 Max 9.05 Terminal cross section ( Ni/Pd/Au plating ) 1 Z e *3 D E A2 7 bp x M L1 A1 A bp b1 c c1 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 A HE 0 5.80 6.10 1.27 8 6.20 A1 L e x y 0.25 0.15 0.635 0.40 1 y Detail F Z L L 0.60 1.08 1.27 Rev.2.00, Oct 06, 2005 page 6 of 6 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. 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