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| Product Specification PE42510A Product Description The following specification defines an SPDT (single pole double throw) switch for use in cellular and other wireless applications. The PE42510A uses Peregrine's UltraCMOSTM process and it also features HaRPTM technology enhancements to deliver high linearity and exceptional harmonics performance. HaRPTM technology is an innovative feature of the UltraCMOSTM process providing upgraded linearity performance. The PE42510A is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC SPDT High Power UltraCMOSTM RF Switch 30 - 2000 MHz Features * No blocking capacitors required * 50 Watt P1dB compression point * 10 Watts <8:1 VSWR (Normal Operation) * 29 dB Isolation @800 MHz * < 0.3 dB Insertion Loss at 800 MHz * 2fo and 3fo < -84 dBc @ 42.5 dBm * ESD rugged to 2.0 kV HBM * 32-lead 5x5 mm QFN package Figure 2. Package Type 32-lead 5x5 mm QFN RF1 RF2 CMOS Control Driver and ESD CTRL Table 1. Electrical Specifications @ 25 C, VDD = 3.3 V (ZS = ZL = 50 ) unless otherwise noted Parameter RF Insertion Loss 0.1 dB Input Compression Point Isolation (Supply Biased): RF to RFC Unbiased Isolation: RF - RFC, VDD, V1=0 V RF (Active Port) Return Loss 2nd Harmonic 3rd Harmonic Switching Time Lifetime switch cycles 800 MHz @ +42.5 dBm 50% of CTRL to 10/90% of RF No RF applied 30 MHz 1 GHz 1 GHz < 2 GHz 800 MHz, 50% duty cycle 800 MHz 27 dBm, 800 MHz 25 5 15 22 -84 0.04 10^10 -81 0.5 Conditions Min Typ 0.4 0.5 45.4 29 Max 0.6 0.7 Units dB dB dBm dB dB dB dBc ms cycles Note: The device was matched with 1.6 nH inductance per RF port Document No. 70-0266-01 www.psemi.com (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7 PE42510A Product Specification Figure 3. Pin Configuration (Top View) GND GND GND GND GND GND GND RFC 32 31 30 29 28 27 26 25 Table 3. Operating Ranges Parameter Frequency Range Min 30 Typ Max 2000 40 27 Units MHz dBm dBm V uA V GND RF1 GND GND GND GND GND GND 1 2 24 23 GND RF2 GND GND GND GND GND GND RF Input Power1 (VSWR 8:1) RF Input Power (VSWR 8:1) 2 3 4 5 6 7 8 22 VDD Power Supply Voltage IDD Power Supply Current Control Voltage High 3.2 1.4 3.3 90 3.4 170 Exposed Ground Paddle 21 20 19 18 17 Control Voltage Low Operating temperature range (Case) Tj Operating junction temperature Notes: 1. Supply biased 2. Supply unbiased -40 0.4 85 140 V C C 10 11 12 13 14 15 VDD GND GND GND GND N/C CTRL N/C 16 9 Table 2. Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 paddle Table 4. Absolute Maximum Ratings Symbol Parameter/Conditions Power supply voltage Voltage on any DC input Storage temperature range Maximum case temperature Peak maximum junction temperature (10 seconds max) RF Input power (VSWR 20:1, 10 seconds) RF Input Power (50) RF Input Power, unbiased (VSWR 20:1) Maximum Power Dissipation due to RF Insertion Loss ESD Voltage (HBM, MIL_STD 883 Method 3015.7) Min Max Units -0.3 -0.3 -65 4 VDD+ 0.3 150 85 200 40 45 27 2.2 2000 V V C C C dBm dBm dBm W V Pin Name GND RF1 GND GND GND GND GND GND GND GND N/C VDD CTRL GND GND N/C GND GND GND GND GND GND RF2 GND GND GND GND RFC GND GND GND GND GND Description Ground RF1 port Ground Ground Ground Ground Ground Ground Ground Ground No Connect Nominal 3.3 V supply connection Control Ground Ground Do Not Connect Ground Ground Ground Ground Ground Ground RF2 port. Ground Ground Ground Ground Common RF port for switch Ground Ground Ground Ground Exposed ground paddle VDD VI TST TCASE Tj PIN PD VESD Absolute Maximum Ratings Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Table 5. Control Logic Truth Table Path RFC - RF1 RFC - RF2 Moisture Sensitivity Level The Moisture Sensitivity Level rating for the 5x5 QFN package is MSL3. (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7 CTRL H L UltraCMOSTM RFIC Solutions Document No. 70-0266-01 PE42510A Product Specification Evaluation Kit The PE42510A Evaluation Kit board was designed to ease customer evaluation of the PE42510A RF switch. DC power is supplied through J10, with VDD on pin 9, and GND on the entire lower row of even numbered pins. To evaluate a switch path, add or remove jumpers on CTRL/V1 (pin 3) using Table 5 (adding a jumper pulls the CMOS control pin low and removing it allows the on-board pull-up resistor to set the CMOS control pin high). J10 pins 1, 11, and 13 are N/C. The RF common port (RFC) is connected through a 50 Ohm transmission line via the top SMA connector, J1. RF1 and RF2 paths are also connected through 50 Ohm transmission lines via SMA connectors. A 50 Ohm through transmission line is available via SMA connectors J8 and J9. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. An open-ended 50 Ohm transmission line is also provided at J7 for calibration if needed. Figure 4. Evaluation Board Layouts Peregrine Specification 101/0314 Figure 5. Evaluation Board Schematic Peregrine Specification 102/0383 J1 SMA 2 J2 SMA 1 GND NC NC NC RFC NC NC GND 32 31 30 29 28 27 26 25 1 1 2 3 4 5 6 7 8 NC RF1 NC NC NC GND NC NC U1 QFN5X5-32LD PE42510 NC RF2 NC NC NC NC GND NC 24 23 22 21 20 19 18 17 J3 SMA 1 2 R1 1M J10 HEADER14 1 3 5 7 9 11 13 1 3 5 7 9 11 13 2 4 6 8 10 12 14 2 4 6 8 10 12 14 Z1 1 Open Line J7 SMA-DNI 1 J8 SMA-DNI 1 Through Line J9 SMA-DNI 1 C2 DNI C3 DNI C4 0.01u C7 100pF C8 0.01u 2 2 2 9 10 11 12 13 14 15 16 Document No. 70-0266-01 www.psemi.com NC NC (Res) Vdd V1 NC NC (vss) (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 7 2 PE42510A Product Specification Figure 6. RF-RFC Insertion Loss, VDD = 3.3V Figure 9. RFC-RF Isolation, +25 C Figure 7. RF-RFC Insertion Loss, +25 C Figure 10. RF Return Loss, VDD = 3.3V Figure 8. RFC-RF Isolation, VDD = 3.3V Figure 11. RF Return Loss, +25 C (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 7 Document No. 70-0266-01 UltraCMOSTM RFIC Solutions PE42510A Product Specification Thermal Data Though the insertion loss for this part is very low, when handling high power RF signals, the part can get quite hot. Figure 12 shows the estimated power dissipation for a given incident RF power level. Multiple curves are presented to show the effect of poor VSWR conditions. VSWR conditions that present short circuit loads to the part can cause significantly more power dissipation than with proper matching. Figure 13 shows the estimated maximum junction temperature of the part for similar conditions. Note that both of these charts assume that the case (GND slug) temperature is held at 85C. Special consideration needs to be made in the design of the PCB to properly dissipate the heat away from the part and maintain the 85C maximum case temperature. It is recommended to use best design practices for high power QFN packages: multi-layer PCBs with thermal vias in a thermal pad soldered to the slug of the package. Special care also needs to be made to alleviate solder voiding under the part. Figure 12. Power Dissipation 2.5 1: 1 V SWR (50 Ohm Load) 2: 1 V SWR (25 Ohm Load) Pow er Dissipated (W) 2.0 8: 1 V SWR (6. 25 Ohm Load) 20: 1 V SWR (2. 5 Ohm Load) I NF: 1 V SWR (0 Ohm Load) 1.5 Rel i abi l i t y Li mi t 1.0 0.5 0.0 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 RF Pow er (dBm) Figure 13. Maximum Junction Temperature 1 45 Max Junction Temperature (C) 1 40 1 35 1 30 1 25 1 20 15 1 10 1 1 05 1 00 95 90 85 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 1: 1 V SWR (50 Ohm Load) 2: 1 V SWR (25 Ohm Load) 8: 1 V SWR (6. 25 Ohm Load) 20: 1 V SWR (2. 5 Ohm Load) I NF: 1 V SWR (0 Ohm Load) Rel i abi l i t y Li mi t Table 6. Theta JC Parameter Theta JC (+85C) Min Typ 24.0 Max Units C/W RF Power (dBm) Note: Case temperature = 85C Document No. 70-0266-01 www.psemi.com (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7 PE42510A Product Specification Figure 14. Package Drawing See Note below Note: Not for electrical connection. Corner detail is tied to paddle and should not be isolated on PCB board. Figure 15. Tape and Reel Specs Table 7. Ordering Information Order Code PE42510AMLI PE42510AMLI-Z EK42510-01 Part Marking 42510 42510 42510 Description Parts in Tubes or Cut Tape Parts on Tape and Reel Evaluation Kit Package Green 32-lead 5x5mm QFN Green 32-lead 5x5mm QFN Evaluation Kit Shipping Method 73 units / Tube 3000 units / T&R 1 / Box UltraCMOSTM RFIC Solutions (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 7 Document No. 70-0266-01 PE42510A Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation 9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499 Peregrine Semiconductor, Asia Pacific (APAC) Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Peregrine Semiconductor, Korea #B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173 Peregrine Semiconductor K.K., Japan Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Space and Defense Products Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS, HaRP and MultiSwitch are trademarks of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0266-01 www.psemi.com (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 7 |
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