View BD9130EFJ_4627854.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Single-chip Type with Built-in FET Switching Regulator Series
Output 2A or More High-efficiency Step-down Switching Regulator with Built-in Power MOSFET
BD9130EFJ
No.09027EAT30
Description ROHM's high efficiency step-down switching regulator BD9130EFJ is a power supply designed to produce a low voltage including 1 volts from 5.5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. Features 1) Offers fast transient response with current mode PWM control system. 2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) TM and SLLM (Simple Light Load Mode) 3) Incorporates soft-start function. 4) Incorporates thermal protection and ULVO functions. 5) Incorporates short-current protection circuit with time delay function. 6) Incorporates shutdown function 7) Employs small surface mount package : HTSOP-J8 Use Power supply for LSI including DSP, Micro computer and ASIC Absolute maximum ratings Parameter Power Supply Voltage EN Voltage SWITH Voltage SW Output Current Power Dissipation 1 Power Dissipation 2 Operating Temperature Range Storage Temperature Range Maximum Junction Temperature
*1 *2 *3
Symbol VCC PVCC VEN VSW, VITH ISW Pd1 Pd2 Topr Tstg Tjmax
Rating -0.3+7 *1 -0.3+7 *1 -0.3+7 -0.3+7 2.6 *1 0.5 *2 3.76 *3 -25+105 -55+150 +150
Unit V V V V A W W
Pd, ASO, and Tjmax=150 should not be exceeded. Reduced by 4.0mW for increase in Ta of 1 above 25. Reduced by 30.0mW for increase in Ta of 1 above 25. (when mounted on a board 70.0mm x 70.0mm x 1.6mm Glass-epoxy PCB)
Operating Conditions (Ta=-25+105) Parameter Power Supply Voltage EN Voltage Output Voltage range SW Average Output Current
4 5
Symbol VCC PVCC VEN VOUT ISW
Min. 2.7 2.7 0 1.0 -
Limits Typ. 3.3 3.3 -
Unit Max. 5.5 5.5 VCC 2.5*4 2.0*5 V V V V A
In case set output voltage 1.6V or more, VccMin. = Vout + 1.3V. Pd and ASO should not be exceeded.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
1/14
2009.05 - Rev.A
BD9130EFJ
Electrical Characteristics BD9130EFJ (Ta=25, VCC=PVCC=3.3V, EN=VCC, R1=10k, R2=5k, unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby Current ISTB 0 10 A Bias Current ICC 250 450 A EN Low Voltage VENL GND 0.8 V EN High Voltage VENH 2.0 VCC V EN Input Current IEN 1 10 A Oscillation Frequency FOSC 0.8 1 1.2 MHz Pch FET ON Resistance*1 RONP 200 400 m Nch FET ON Resistance*1 RONN 160 350 m ADJ Reference Voltage VADJ 0.788 0.800 0.812 V ITH SINK Current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO Threshold Voltage VUVLO1 2.400 2.500 2.600 V UVLO Hysteriesis Voltage VUVLO2 2.425 2.550 2.700 V Soft Start Time TSS 0.5 1 2 ms Timer Latch Time TLATCH 1 2 3 ms Output Short circuit Threshold Voltage VSCP VOUTx0.5 VOUTx0.7 V Block Diagram, Application Circuit
VCC
4.90.1
Max5.25(include.BURR)
Technical Note
Conditions EN=GND Stand-by Mode Active Mode VEN=3.3V PVCC=3.3V PVCC=3.3V VADJ=1.0V VADJ=0.6V Vcc=3.3V0V Vcc=0V3.3V
VOUT=1.2V0V
EN
4
5
+6 -4
8 2 VCC
(3.2)
8 7 6
VREF
6.00.2 3.90.1
1.050.2
(2.4)
BD9130
0.650.15
Current Comp RQ S Gm Amp. SLOPE OSC VCC Soft Start UVLO TSD SCP 1 ADJ 3 CLK
Lot No.
1 2 3 4
Current Sense/ Protect + Driver Logic
7 PVCC
10F
0.545
0.17 -0.03
+0.05
1.0Max.
S
0.850.05 0.080.05
1.27
+0.05 0.42 -0.04
6
2.2H SW
Output
0.08
M
0.08 S
5 PGND 4 GND
HTSOP-J8 (Unit:mm)
ITH
RITH R1 R2
CITH
Fig.1 BD9130EFJ TOP View
Fig.2 BD9130EFJ Block Diagram
Pin No. & function table Pin No. 1 2 3 4 5 6 7 8
Pin name ADJ VCC ITH GND PGND SW PVCC EN
PIN function Output voltage detect pin VCC power supply input pin GmAmp output pin/Connected phase compensation capacitor Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin Enable pin(Active High)
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
2/14
2009.05 - Rev.A
BD9130EFJ
Characteristics data(Reference data)
Technical Note
3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
2.0
3.0
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
1.5
OUTPUT VOLTAGE:VOUT[V]
VOUT=2.5V Ta=25 Io=0A
VOUT=1.8V
2.5 2.0 1.5 1.0 0.5 0.0
1.0
VOUT=1.8V Ta=25 Io=2A
0.5
VCC=3.3V Ta=25 Io=0A 2 3 4 EN VOLTAGE:VEN[V]
VOUT=2.5V VCC=5V Ta=25
VOUT=1.8V VCC=3.3V Ta=25
5
0.0 0 1
5
0
1 2 3 4 OUTPUT CURRENT:IOUT[A]
Fig.3 Vcc-Vout
Fig.4 Ven-Vout
Fig.5 Iout-Vout
1.85 1.84
OUTPUT VOLTAGE:VOUT[V]
100
1.20 1.15
VOUT=1.8V VCC=3.3V Io=0A
90
VCC=3.3V
EFFICIENCY:[%]
1.82 1.81 1.80 1.79 1.78 1.77 1.76 1.75
-25
70 60 50 40 30 20 10 0
VOUT=1.8V VCC=3.3V Ta=25
FREQUENCY:FOSC[MHz]
1.83
80
1.10 1.05 1.00 0.95 0.90 0.85 0.80
VOUT=2.5V VCC=5V Ta=25
0
25
50
75
100
TEMPERATURE:Ta[]
1
10 100 1000 OUTPUT CURRENT:IOUT[mA]
10000
-25
0
25 50 75 TEMPERATURE:Ta[]
100
Fig. 6 Ta-VOUT
Fig.7 Efficiency
Fig.8 Ta-FOSC
0.40 0.35
ON RESISTANCE:R ON[]
2.0
300
VCC=3.3V
1.8 1.6
EN VOLTAGE:VEN[V]
VCC=3.3V
CIRCUIT CURRENT:ICC[A]
270 240 210 180 150 120 90 60 30
VCC=3.3V
0.30 0.25
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
PMOS
0.20 0.15 0.10 0.05 0.00 -25 0 25 50 75 TEMPERATURE:Ta[] 100
NMOS
-25
0
25 50 75 TEMPERATURE:Ta[]
100
0 -25
0
25 50 75 TEMPERATURE:Ta[]
100
Fig.9 Ta-RONN, RONP
Fig.10 Ta-VEN
Fig.11 Ta-ICC
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
3/14
2009.05 - Rev.A
BD9130EFJ
Characteristics data(Reference data) - Continued
Technical Note
1.2
Ta=25
FREQUENCY:FOSC[MHz] 1.1
VCC=PVCC =EN
VOUT=1.8V SW
SLLMTM control
VOUT=1.8V
1
VOUT
0.9
VOUT VCC=3.3V Ta=25 Io=0A
0.8 2.7
VCC=3.3V Ta=25
3.1
3.5 3.9 4.3 4.7 INPUT VOLTAGE:VCC[V]
5.1
5.5
Fig.12 Vcc-Fosc
Fig.13 Soft start waveform
Fig.14 SW waveform Io=10mA
PWM control
VOUT=1.8V VOUT
VOUT=1.8V VOUT
VOUT=1.8V
IOUT VCC=3.3V Ta=25 VCC=3.3V Ta=25 IOUT VCC=3.3V Ta=25
Fig.15 SW waveform Io=200mA
Fig. 16 Transient response Io=1A2A(10s)
Fig.17 Transient response Io=2A1A(10s)
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
4/14
2009.05 - Rev.A
BD9130EFJ
Information on advantages Advantage 1Offers fast transient response with current mode control system. Conventional product (Load response IO=0.1A0.6A)
VOUT VOUT 110mV
Technical Note
BD9130EFJ (Load response IO=1A2A)
29mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 50%. Fig.18 Comparison of transient response Advantage 2 Offers high efficiency for all load range. For lighter load: TM Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load. For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. ON resistance of P-channel MOS FET : 200m(Typ.) ON resistance of N-channel MOS FET : 160m(Typ.)
100 Efficiency [%] SLLMTM 50 PWM
inprovement by SLLM system improvement by synchronous rectifier
0 0.001
0.01 0.1 Output current Io[A]
1
Achieves efficiency improvement for heavier load. Offers high efficiency for all load range with the improvements mentioned above.
Fig.19 Efficiency
Advantage 3Supplied in smaller package due to small-sized power MOS FET incorporated. Output capacitor Co required for current mode control: 22F ceramic capacitor Inductance L required for the operating frequency of 1 MHz: 2.2H inductor (BD9130EFJ:Co=22F, L=2.2H) Reduces a mounting area required.
VCC 15mm Cin CIN DC/DC Convertor Controller RITH L VOUT Co 10mm CITH CO L
RITH CITH
Fig.20 Example application
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
5/14
2009.05 - Rev.A
BD9130EFJ
Technical Note
Operation BD9130EFJ is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, TM while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
TM SLLM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency.
SENSE Current Comp RESET Level Shift Gm Amp. ITH OSC RQ FB SET S Driver Logic SW Load IL VOUT
VOUT
Fig.21 Diagram of current mode PWM control
PVCC SENSE FB SET GND GND GND IL(AVE) SET PVCC SENSE FB GND GND
Current Comp
Current Comp
RESET SW IL
RESET SW
GND IL 0A
VOUT
VOUT(AVE)
VOUT
VOUT(AVE)
Not switching
Fig.22 PWM switching timing chart
Fig.23 SLLM
TM
switching timing chart
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
6/14
2009.05 - Rev.A
BD9130EFJ
Technical Note
Description of operations Soft-start function EN terminal shifted to "High" activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. Shutdown function With EN terminal shifted to "Low", the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0F (Typ.). UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of 50mV (Typ.) is provided to prevent output chattering.
Hysteresis 50mV
VCC
EN
VOUT
Tss Soft start Standby mode Operating mode Standby mode UVLO
Tss
Tss
Operating mode
Standby mode EN
Operating mode
Standby mode
UVLO
UVLO
Fig.24 Soft start, Shutdown, UVLO timing chart Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN Output OFF latch
Output Short circuit Threshold Voltage VOUT IL Limit IL
Standby mode
t1t2=TLATCH
Standby mode
Operating mode
EN
Timer latch
EN
Fig.25 Short-current protection circuit with time delay timing chart
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
7/14
2009.05 - Rev.A
BD9130EFJ
Switching regulator efficiency Efficiency may be expressed by the equation shown below: POUT = VOUTxIOUT x100[%]= POUT x100[%]= VinxIin Pin POUT+PD
Technical Note
x100[%]
Efficiency may be improved by reducing the switching regulator power dissipation factors PD as follows: Dissipation factors: 2 1) ON resistance dissipation of inductor and FETPD(I R) 2) Gate charge/discharge dissipationPD(Gate) 3) Switching dissipationPD(SW) 4) ESR dissipation of capacitorPD(ESR) 5) Operating current dissipation of ICPD(IC) 1)PD(I R)=IOUT x(RCOIL+RON) (RCOIL[]DC resistance of inductor, RON[]ON resistance of FET, IOUT[A]Output current.) 2)PD(Gate)=CgsxfxV (Cgs[F]Gate capacitance of FETf[H]Switching frequencyV[V]Gate driving voltage of FET) Vin2xCRSSxIOUTxf 3)PD(SW)= (CRSS[F]Reverse transfer capacitance of FETIDRIVE[A]Peak current of gate.) IDRIVE 2 4)PD(ESR)=IRMS xESR (IRMS[A]Ripple current of capacitorESR[]Equivalent series resistance.) 5)PD(IC)=VinxICC (ICC[A]Circuit current.) Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation.
4.0
IC only j-a=249.5/W 1 layerscopper foil area:0mmx0mm j-a=153.2/W 2 layerscopper foil area:15mmx15mm j-a=113.6/W 2 layerscopper foil area:70mmx70mm j-a=59.2/W 4 layerscopper foil area:70mmx70mm j-a=33.3/W (when mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB with termal Via)
2
2
3.76W
P=IOUT2xRON RON=DxRONP+(1-D)RONN DON duty (=VOUT/VCC) RCOILDC resistance of coil RONPON resistance of P-channel MOS FET RONNON resistance of N-channel MOS FET IOUTOutput current
Power dissipation:Pd [W]
3.0
2.11W 2.0 1.10W 1.0 0.82W 0.50W 0 0 25 50 75 100105 125
150
Ambient temperature:Ta []
Fig.26 Thermal derating curve (HTSOP-J8) If VCC=3.3V, VOUT=1.8V, RONP=0.2, RONN=0.16 IOUT=2A, for example, D=VOUT/VCC=1.8/3.3=0.545 RON=0.545x0.20+(1-0.545)x0.16 =0.109+0.0728 =0.1818[] P=22x0.18180.7272W] As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
8/14
2009.05 - Rev.A
BD9130EFJ
Selection of components externally connected 1. Selection of inductor (L)
IL IL
Technical Note
The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. IL= (VCC-VOUT)xVOUT LxVCCxf [A](1)
VCC
IL VOUT L Co
Appropriate ripple current at output should be 20% more or less of the maximum output current. IL=0.2xIOUTmax. [A](2) [H](3) ILxVCCxf (IL: Output ripple current, and f: Switching frequency) L= (VCC-VOUT)xVOUT
Fig.27 Output ripple current
* Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=3.3V, VOUT=1.8V, f=1MHz, IL=0.2x2A=0.4A, for example,(BD9130EFJ) L= (3.3-1.8)x1.8 0.4x3.3x1M =2.05 2.2[H]
* Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage.
VOUT
Output ripple voltage is determined by the equation (4) VOUT=ILxESR [V](4) (IL: Output ripple current, ESR: Equivalent series resistance of output capacitor) *Rating of the capacitor should be determined allowing sufficient margin against output voltage. A 22F to 100F ceramic capacitor is recommended. Less ESR allows reduction in output ripple voltage.
L
ESR Co
Fig.28 Output capacitor 3. Selection of input capacitor (Cin)
VCC
Cin
Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (5):
VOUT
L
Co
VCC < Worst case > IRMS(max.) When Vcc is twice the VOUT, IRMS=
IRMS=IOUTx
VOUT(VCC-VOUT) [A](5) IOUT
Fig.29 Input capacitor
2 If VCC=3.3V, VOUT=1.8V, and IOUTmax.=2A, (BD9130EFJ) 1.8(3.3-1.8) IRMS=2x =0.99[ARMS] 3.3
A low ESR 10F/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
9/14
2009.05 - Rev.A
BD9130EFJ
Technical Note
4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.) A Gain [dB] 0 IOUTMin. 0 fp(Max.) fz(ESR) IOUTMax.
fp=
1 2xROxCO 1 fz(ESR)= 2xESRxCO Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. fp(Min.)= 1 2xROMax.xCO 1 fp(Max.)= 2xROMin.xCO [Hz]with lighter load [Hz] with heavier load
Phase [deg]
-90
Fig.30 Open loop gain characteristics
Zero at power amplifier
A Gain [dB] 0 0 -90 fz(Amp.)
Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) fz(Amp.)= 1 2xRITHxCITH
Phase [deg]
Fig.31 Error amp phase compensation characteristics
VCC
Cin EN VOUT VOUT ITH RITH CITH
VCC,PVCC
L SW ESR RO VOUT
GND,PGND
CO
Fig.32 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2xRITHxCITH = 1 2xROMax.xCO
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
10/14
2009.05 - Rev.A
BD9130EFJ
5. Determination of output voltage The output voltage VOUT is determined by the equation (6): VOUT=(R2/R1+1)xVADJ(6) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required.
L 6 SW 1
Technical Note
Output Co R2
Adjustable output voltage range : 1.0V2.5V
ADJ
R1
Fig.33 Determination of output voltage Use 1 k100 k resistor for R1. If a resistor of the resistance higher than 100 k is used, check the assembled set carefully for ripple voltage etc.
INPUT VOLTAGE : VCC[V]
3.9
3.7
The lower limit of input voltage depends on the output voltage. Basically, it is recommended to use in the condition : VCCmin = VOUT+1.3V. Fig.34. shows the necessary output current value at the lower limit of input voltage. (DCR of inductor : 0.1) This data is the characteristic value, so it' doesn't guarantee the operation range,
3.5
3.3
Vo=2.5V
3.1
Vo=1.8V Vo=2.0V
2.9
2.7 0 0.5 1 1.5 2
OUT PUT CURRENT : IOUT[A]
Fig.34 minimum input voltage in each output voltage BD9130EFJ Cautions on PC Board layout VCC R2 1 R1 2 3 RITH CITH 4 ADJ VCC ITH GND EN PVCC SW PGND 8 7 6 5 L CIN Co VOUT EN
GND Fig.35 Layout diagram For the sections drawn with heavy line, use thick conductor pattern as short as possible. Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. HTSOP-J8 (BD9130EFJ) has thermal FIN on the reverse of the package. The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
11/14
2009.05 - Rev.A
BD9130EFJ
Recommended components Lists on above application Symbol L CIN CO Coil Ceramic capacitor Ceramic capacitor Part Value 2.2H 22F 22F VOUT=1.0V VOUT=1.2V CITH Ceramic capacitor VOUT=1.5V VOUT=1.8V VOUT=2.5V VOUT=1.0V VOUT=1.2V RITH Resistance VOUT=1.5V VOUT=1.8V VOUT=2.5V 680pF 560pF 470pF 330pF 330pF 10k 12k 15k 18k 18k Manufacturer TDK Kyocera Kyocera murata murata murata murata murata Rohm Rohm Rohm Rohm Rohm
Technical Note
Series LTF5022-2R2N3R2 CM32X5R226M10A CM316B226M06A GRM18 Serise GRM18 Serise GRM18 Serise GRM18 Serise GRM18 Serise MCR03 Serise MCR03 Serise MCR03 Serise MCR03 Serise MCR03 Serise
* The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode established between the SW and PGND pins.
I/O equivalence circuit
EN pin SW pin
PVCC PVCC PVCC
EN SW
ADJ pin
ITH pin
VCC
ADJ ITH
Fig.36 I/O equivalence circuit
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
12/14
2009.05 - Rev.A
BD9130EFJ
Technical Note
Notes for use 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4.Operation in Strong electromagnetic field Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 37. P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements.
Resistor Pin A Pin A
P+ N P P+
Transistor (NPN) Pin B
C B E B P P+ N C E
Pin B
N
N
Parasitic element
N
P+
N
P substrate Parasitic element
GND
P substrate Parasitic element
GND GND GND
Parasitic element
Other adjacent elements
Fig.37 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 9 . Selection of inductor It is recommended to use an inductor with a series resistance element (DCR) 0.1 or less. Especially, in case output voltage is set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and output will be latched OFF. When using an inductor over 0.1, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
13/14
2009.05 - Rev.A
BD9130EFJ
Ordering part number
Technical Note
B
D
9
Part No. 9130
1
3
0
E
F
J
-
E
2
Part No.
Package EFJ: HTSOP-J8
Packaging and forming specification E2: Embossed tape and reel (HTSOP-J8)
HTSOP-J8
4.90.1 (MAX 5.25 include BURR) (3.2) 4
8765

Tape
0.650.15 1.050.2
Embossed carrier tape 2500pcs E2
The direction is the 1pin of product is at the upper left when you hold
+6 -4
Quantity Direction of feed
6.00.2
3.90.1
(2.4)
( reel on the left hand and you pull out the tape on the right hand
)
1
234
1PIN MARK 0.545
1.0MAX
+0.05 0.17 -0.03 S 1.27
0.850.05
0.080.08
+0.05 0.42 -0.04 0.08 S
0.08
M
1pin
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
14/14
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
R0039A

▲Up To Search▲

Price & Availability of BD9130EFJ

	To Download BD9130EFJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .