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SSM4953M P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement Low on-resistance Fast switching D1 D2 D1 D2 BVDSS RDS(ON) ID G2 S2 -30V 53m -5A SO-8 S1 G1 Description MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and costeffectiveness. The SO-8 package is widely preferred for commercial and industrial surface mount applications and is well suited for low voltage applications such as DC/DC converters. G1 D1 D2 G2 S1 S2 Absolute Maximum Ratings Symbol VDS VGS I D @ TA=25C I D @ TA=70C I DM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current 1,2 3 3 Rating - 30 20 -5 -4 -20 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/C C C Continuous Drain Current Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient Max. Value 62.5 Unit C/W Rev.2.02 5/23/2004 www.SiliconStandard.com 1 of 6 SSM4953M Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=-250uA Min. Typ. Max. Units -30 -1 -0.1 - V V/C BV DSS/ Tj RDS(ON) Breakdown Voltage Temperature Coefficient Reference to 25C, ID=-1mA Static Drain-Source On-Resistance VGS=-10V, ID=-5A VGS=-4.5V, ID=-4A 6 20 3.5 2 12 20 45 27 800 425 110 53 90 -3 -1 -25 - m m V S uA uA nC nC nC ns ns ns ns pF pF pF VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70oC) o VDS=VGS, ID=-250uA VDS=-10V, ID=-5A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS= 20V ID=-5A VDS=-15V VGS=-10V VDS=-15V ID=-1A RG=6 ,VGS=-10V RD=15 VGS=0V VDS=-15V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 100 nA Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol IS ISM VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V , VS=-1.2V 1 Min. Typ. Max. Units -1.7 -20 -1.2 A A V Pulsed Source Current ( Body Diode ) Forward On Voltage 2 Tj=25C, IS=-1.7A, VGS=0V Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. Rev.2.02 5/23/2004 www.SiliconStandard.com 2 of 6 SSM4953M 20 20 T C =25 o C V G =-10V V G =-8.0V T C =150 o C V G =-10V V G =-8.0V V G =-6.0V 15 V G =-6.0V -ID , Drain Current (A) 15 -ID , Drain Current (A) V G =-4.0V 10 V G =-4.0V 10 5 5 0 0 1 2 3 4 0 0 1 2 3 4 5 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 80 1.8 Id=-5A T c =25C 70 I D =5A 1.6 V G =10V RDSON (m ) 60 Normalized R DS(ON) 1.4 1.2 50 1.0 40 0.8 30 3 4 5 6 7 8 9 10 11 0.6 -50 0 50 100 150 -V GS (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature Rev.2.02 5/23/2004 www.SiliconStandard.com 3 of 6 SSM4953M 6 3 5 2.5 -ID , Drain Current (A) 4 2 PD (W) 25 50 75 100 125 150 3 1.5 2 1 1 0.5 0 0 0 50 100 150 T c , Case Temperature ( o C) T c , Case Temperature ( C) o Fig 5. Maximum Drain Current vs. Fig 6. Typical Power Dissipation Case Temperature 100 1 DUTY=0.5 Normalized Thermal Response (R thja) 0.2 10 1ms 10ms 0.1 0.1 0.05 -ID (A) 0.02 1 100ms 0.01 PDM 0.01 SINGLE PULSE t T Duty factor = t/T Peak Tj = P DM x Rthja + Ta 1s T c =25 o C Single Pulse 0.1 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 -V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance Rev.2.02 5/23/2004 www.SiliconStandard.com 4 of 6 SSM4953M 14 10000 f=1.0MHz 12 I D = -5A V DS = -15V -VGS , Gate to Source Voltage (V) 10 1000 Ciss 8 C (pF) Coss 6 100 Crss 4 2 0 0 5 10 15 20 25 30 10 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) -V DS (V) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 100.00 3 10.00 T j =150 o C -IS(A) T j =25 o C 1.00 2 VGS(th) (V) 1 0 0.10 0.01 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 -50 0 50 100 150 -V SD (V) T j , Junction Temperature ( o C) Fig 11. Forward Characteristic of Reverse Diode Fig 12. Gate Threshold Voltage vs. Junction Temperature Rev.2.02 5/23/2004 www.SiliconStandard.com 5 of 6 SSM4953M VDS RD 90% D VDS TO THE OSCILLOSCOPE 0.5 x RATED VDS RG G 10% S -10 V VGS VGS td(on) tr td(off) tf Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform VG VDS TO THE OSCILLOSCOPE QG -10V D 0.5 x RATED VDS G S VGS QGS QGD I G ID Charge Q Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.02 5/23/2004 www.SiliconStandard.com 6 of 6 |
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