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IMP52 45/46 DATA COMMUNICATIONS LVD SCSI Terminator Key Features N N N N N N N N N 2.5pF typical disabled output capacitance Fast response No external VREF capacitors required 5A supply current in disconnect mode 20mA supply current during normal operation Logic command disconnects all termination lines Diffsense line driver Current limit and thermal protection Compatible with the pending SPI-2 LVD specification N Pin compatible to the UCC5640 voltage differential device, the IMP5245/5246 output will also be in a high-impedance state. The IMP5245/5246 ICs have a TTL compatible disconnect pin. The IMP5245 is active LOW and the IMP5246 is active HIGH. During sleep mode, power supply current is reduced to just 5A. During sleep mode all outputs are in a high-impedance state. Also during sleep mode, the DIFFSENSE function is disabled and is placed in a highimpedance state. - Ultra2/3 SCSI - 9 Channels - Eliminates External VREF Capacitor The IMP5245/5246 ICs are Low Voltage Differential (LVD) terminators designed to comply with the LVD termination specification in the SPI-2 document. The IMP5245/5246 are designed specifically for LVD applications. Because the IMP5245/5246 support only LVD, they have lower output capacitance than multimode terminators. The IMP5245/5246 deliver the ultimate in SCSI bus performance while saving component cost and board area. Elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. The individual high bandwidth drivers also maximize channel separation and reduces channel-to-channel noise and cross talk. The high-bandwidth architecture insures ULTRA-2 performance, while providing a clear migration path to ULTRA-3 and beyond. When the IMP5245/5246 are enabled, the differential sense (DIFFSENSE) pin supplies a voltage between 1.2V and 1.4V. The terminator DIFFSENSE output is connected to the system DIFFSENSE line. If there are no single ended or HVD devices attached to the system the LVD output will be enabled. If the DIFFSENSE line is LOW, indicating a single ended device, the IMP5245/5246 output will be in a highimpedance state. If the DIFFSENSE line is HIGH, indicating a high Block Diagram DIFFSENSE OUT 1.3V DIFFB DISC DISC (IMP5246) VOS/2 VCM 1.25V VOS/2 R- (-) R+ (+) 5245/46_01.eps (c) 2002 IMP, Inc. 408-432-9100/www.impweb.com 1 IMP52 45/46 Pin Configuration TSSOP Package NC 1 1+ 2 1- 3 2+ 4 2- 5 3+ 6 3- 7 4+ 8 4- 9 DIFFB 10 DIFFSENSE 11 GND 12 IMP5245/46 24 VTERM 23 9- 22 9+ 21 8- 20 8+ 19 7- 18 7+ 17 6- 16 6+ 15 5- 14 5+ 13 DISC 5245/46_05.eps Ordering Information Part Number IMP5245CPW IMP5246CPW Temperature Range 0C to 70C 0C to 70C Package 24-Pin Plastic TSSOP 24-Pin Plastic TSSOP Absolute Maximum Ratings1 TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +6.5V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 6.5V Differential Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 6.5V Operating Junction Temperature Plastic (PW Package) . . . . . . . . . . . . . . . . . 150C Storage Temperature Range . . . . . . . . . . . . . . -65C to 150C Lead Temperature (Soldering, 10 sec.) . . . . . . 300C Note: 1. Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Thermal Data PW Package: Thermal Resistance Junction-to-Ambient, JA . . . . . . 100C/W Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. No ambient airflow is assumed. 2 408-432-9100/www.impweb.com (c) 2002 IMP, Inc. IMP52 45/46 Recommended Operating Conditions Parameter Termpwr Voltage Signal Line Voltage Disconnect Input Voltage Operating Junction Temperature Range -- IMP5245/5246 Symbol VTERM Min 3.0 0 0 0 Typ Max 5.25 5.0 VTERM 70 Units V V V C Note: 2. Range over which the device is functional. Electrical Characteristics Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0C TA 70C. TermPwr = 3.3V, DISCONNECT: IMP5245 = LOW, IMP5246 = HIGH. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature. Parameter LVD Terminator Section TermPwr Supply Current Power Down Mode Common Mode Voltage Offset Voltage Differential Terminator Impedance Common Mode Impedance Output Capacitance Output Leakage Symbol Conditions All term lines = Open DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW VOM VOS Open circuit between - and + (see Note 3) VOD = -1V to 1V 0V to 2.5V DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW, VLINE = 0 to 4V, TA = 25C DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW, VTERM = 0V, VLINE = 2.7V DIFFSENSE = 1.4V to 0V Min Typ 20 5 1.25 112 105 200 2.5 0 1 150 1.3 Max 25 10 1.375 125 110 300 Units mA A V mV pF A A ms 1.125 100 100 100 2 Mode Change Delay DIFFSENSE Section DIFFSENSE Output Voltage DIFFSENSE Output Source Current DIFFSENSE Sink Current DIFFSENSE Output Leakage DISCONNECT Section DISCONNECT Threshold Input Current 100 1.2 5.0 DIFFSENSE = 0V VIN = 2.75V DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW, TA = 25C 1.4 15.0 200 10 V mA A A 0.8 DISCONNECT: IMP5245 = 0V DISCONNECT: IMP5246 = 3.3V 2.0 10 10 V A A Note: 3. Open circuit failsafe voltage. (c) 2002 IMP, Inc. 408-432-9100/www.impweb.com 3 IMP52 45/46 Application Information VOD = V(-) - V(+), Logic = 0 V(+) VCM 100mV 0V NEGATED V(-) -100mV Figure 1. Bus Voltage Figure 2. VOD IMP5245/46 IMP5245/46 Figure 3. Table 1. DIFFSENSE/Power Up/Power Down Function Table IMP5245 DISCONNECT L L L H Open IMP5246 DISCONNECT H H H L Open Outputs DIFFSENS L < 0.5V 0.7V to 1.9V H > 2.4V X X Status Disable Enable Disable Disable Disable Type HiZ LVD HiZ HiZ HiZ Current 2mA 21mA 2mA 10A 10A Note: IMP5245 Disconnect logic is compatible with the Unitrode UCC5640. 4 408-432-9100/www.impweb.com (c) 2002 IMP, Inc. IMP52 45/46 Application Information HOST 5V 2.2F PERIPHERAL VT DIFFSENSE DIFFB DB(0)DB(0)+ DB(8)DB(8)+ DIFFSENSE DIFFB DB(0)DB(0)+ DB(8)DB(8)+ VT Disconnect Disconnect DISC DISC IMP5245 2.2F IMP5245 VT DIFFB DISC ATNATN+ REQREQ+ ATNATN+ REQREQ+ DIFFB VT DISC IMP5245 IMP5245 VT DIFFB DISC DB(9)DB(9)+ DB(15)DB(15)+ SCSI CABLE DB(9)DB(9)+ DB(15)DB(15)+ DIFFB VT DISC IMP5245 IMP5245 Figure 4. Application Schematic IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Fax: 408-432-1085 e-mail: info@impinc.com http://www.impweb.com The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners. (c) 2002 IMP, Inc. Printed in USA Publication #: 7003 Revision: B Issue Date: 08/12/02 Type: Preliminary |
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