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| DRF1201 1000V, 26A, 30MHz MOSFET Driver Hybrid The DRF1201 hybrid includes a high power gate driver and the power MOSFET. The driver output can be configured as Inverting and NonInverting. It was designed to provide the system designer increased flexibility and lowered cost over a non-integrated solution. FEATURES * Switching Frequency: DC TO 30MHz * Low Pulse Width Distortion * Single Power Supply * 1V CMOS Schmitt Trigger Input 1V Hysteresis * Inverting Non-Inverting Select * RoHS Compliant * Switching Speed 3-4ns * BVds = 1Kv * Ids = 26A avg. * Rds(on) .55 Ohm * PD = 1100W TYPICAL APPLICATIONS * Class C, D and E RF Generators * Switch Mode Power Amplifiers * Pulse Generators * Ultrasound Transducer Drivers * Acoustic Optical Modulators Driver Absolute Maximum Ratings Symbol VDD IN, FN IO PK TJMAX Parameter Supply Voltage Input Single Voltages Output Current Peak Operating Temperature Min Typ Max 15 -.7 to +5.5 Unit V A C 8 175 Driver Specifications Symbol VDD IN IN(R) IN(F) IDDQ IO Ciss RIN VT(ON) VT(OFF) TDLY tr tf TD Parameter Supply Voltage Input Voltage Input Voltage Rising Edge Input Voltage Falling Edge Quiescent Current Output Current Input Capacitance Input Parallel Resistance Input, Low to High Out (See Truth Table) Input, High to Low Out (See Truth Table) Time Delay (throughput) Rise Time Fall Time Prop. Delay 0.8 1.9 38 5 5 35 ns 050-4972 Rev C 8-2009 Min 10 3 Typ Max 15 5.5 Unit V 3 3 2 8 3 1 1.1 2.2 ns mA A M V ns Microsemi Website - http://www.microsemi.com Driver Output Characteristics Symbol Cout Rout Lout FMAX FMAX Parameter Output Capacitance Output Resistance Output Inductance Operating Frequency CL = 3000nF + 50 Operating Frequency RL = 50 30 50 Min Typ 2500 .8 3 Max DRF1201 Unit pF nH MHz Driver Thermal Characteristics Symbol RJC RJHS TJSTG PDJHS PDJC Parameter Thermal Resistance Junction to Case Thermal Resistance Junction to Heat Sink Storage Temperature Maximum Power Dissipation @ TSINK = 25C Total Power Dissipation @ TC = 25C Parameter Drain Source Voltage Continuous Drain Current THS = 25C Drain-Source On State Resistance Operating Temperature 0.55 175 Min 1000 26 Min Typ 1.5 2.5 -55 to 150 Max Unit C/W C W 60 100 MOSFET Absolute Maximum Ratings Symbol BVDSS ID RDS(on) Tjmax Symbol Ciss Coss Crss Typ Max Unit V A C MOSFET Dynamic Characteristics Parameter Input Capacitance Output Capacitance Reverse Transfer Capacitance Min Typ 2000 165 75 pF Max Unit MOSFET Thermal Characteristics Symbol RJC RJHS TJSTG PDHS PDC Parameter Thermal Resistance Junction to Case Thermal Resistance Junction to Heat Sink Storage Temperature Maximum Power Dissipation @ TSINK = 25C Total Power Dissipation @ TC = 25C Min Typ 0.53 0.141 -55 to 150 Max Unit C/W C W 1060 2830 Microsemi reserves the right to change, without notice, the specifications and information contained herein. Figure 1, DRF1201 Simplified Circuit Diagram 050-4972 Rev C 8-2009 The Simplified DRF1201 Circuit Diagram is illustrated above. By including the driver high speed by-pass capacitor (C1), the contribution to the internal parasitic loop inductance of the driver output is greatly reduced. This, coupled with the tight geometry of the hybrid, allows optimal gate drive to the MOSFET. This low parasitic approach, coupled with the Schmitt trigger input (IN), Kelvin signal ground (SG) and the AntiRing Function, provide improved stability and control in Kilowatt to Multi-Kilowatt, high Frequency applications. Both the FN and IN pins are referenced to the Kelvin ground (SG.) The signal is then applied to the intermediate drivers and level shifters; this section contains proprietary circuitry designed specifically for the ring abatement. The power drivers provide high current to the gate of the MOSFETS. DRF1201 The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high. Truth Table *Referenced to SG FN (pin 3)* HIGH HIGH LOW LOW IN (pin 4)* HIGH LOW HIGH LOW MOSFET ON OFF OFF ON Figure 2, DRF1201 Test Circuit The Test Circuit illustrated above was used to evaluate the DRF1201 (available as an evaluation Board DRF12XX / EVALSW.) The input control signal is applied to the DRF1201 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal ground currents. The +VDD inputs (2,6) are by-passed (C1, C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate load. RL set for IDM at VDS max this load is used to evaluate the output performance of the DRF1201. Microsemi's products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved. 050-4972 Rev C 8-2009 DRF1201 Pin Assignments Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Ground +Vdd FN IN SG +Vdd Ground Source Drain Source 1.500 0.300 0.200 0.275 0.038 GAPS - 0.090" , 2 PLCS 0.275 0.200 0.370 10 0.125 9 8 R0.150 4 PLCS 0.125 0.750 1.000 0.520 0.0045 O0.125 4 PLCS 0.250 0.250 0.300 1 0.275 2 3 4 5 6 7 GAPS - 0.050", 6 PLCS SMALL LEADS - 0.040", 3 PLCS LARGE LEADS - 0.200", 2 PLCS MEDIUM LEADS - 0.065", 2 PLCS .005" TYP. HALF HARD COPPER GOLD PLATED All dimensions are .005 050-4972 Rev C 8-2009 Figure 3, DRF1201 Mechanical Outline |
Price & Availability of DRF1201
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