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FEATURES
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LT8415 Ultralow Power Boost Converter with Dual Half-Bridge Switches DESCRIPTION
The LT(R)8415 is an ultralow power boost converter with two integrated complementary MOSFET half-bridges (N- and P-channel), integrated power switch, Schottky diode and output disconnect circuitry. The N-channel and P-channel MOSFETs in each half-bridge are synchronously controlled by a single input pin, and never turn on at the same time in typical applications. The boost regulator controls power delivery by varying both the peak inductor current and switch off-time. This control scheme results in low output voltage ripple as well as high efficiency over a wide load range. The quiescent current is a low 10.5A, which is further reduced to 0A in shutdown. The internal disconnect circuitry allows the output voltage to be blocked from the input during shutdown. High value (12.4M/0.4M) resistors are integrated on chip for output voltage detection, significantly reducing input referred quiescent current. The LT8415 also features a comparator built into the SHDN pin, overvoltage protection for the CAP, VOUT, OUT1 and OUT2 pins, built in soft start and comes in a tiny 12-pin 3mm x 2mm DFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
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High Voltage Switches Built in (Dual half-bridge) Ultralow Quiescent Current 10.5A in Active Mode 0A in Shutdown Mode Comparator Built into SHDN pin Low Noise Control Scheme Adjustable FB reference voltage Wide Input Range: 2.5V to 16V Wide Output Range: Up to 40V Integrated Power NPN Switch (25mA Current Limit) Integrated Schottky Diode Integrated Output Disconnect High Value (12.4M/0.4M) Feedback Resistor Integrated Built in Soft Start (Optional Capacitor from VREF to GND) Over Voltage Protection for CAP, VOUT, OUT1 and OUT2 Pins 12-Pin 3mm x 2mm DFN package
APPLICATIONS
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Sensor Power RF Mems Relay Power Low Power Actuator Bias/Control Liquid Lens Driver
TYPICAL APPLICATION
Drive External Capacitors to 34V/0V with the LT8415
VIN 2.5V to 16V 2.2F SW VCC CAP VOUT 0.1F* 34V/0V OUT1 VOLTAGE 20/DIV IN1 VOLTAGE 2V/DIV COUT1 = 1nF COUT2 = 200pF 0.1F**
8415 TA01
Response Driving External Capacitors
100H 22nF VOUT = 34V OUT2 VOLTAGE 20/DIV IN2 VOLTAGE 2V/DIV
LT8415 LOGIC LEVEL CHIP ENABLE IN 1 IN 2 SHDN GND OUT 1 OUT 2 VREF 137K FBP 887K *HIGHER VALUE CAPACITOR IS REQUIRED WHEN THE VIN IS HIGHER THAN 8V **THIS CAPACITOR IS OPTIONAL
34V/0V
20s/DIV
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1
LT8415 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW SHDN 1 VCC 2 GND 3 SW 4 IN1 5 IN2 6 13 12 FBP 11 VREF 10 CAP 9 VOUT 8 OUT1 7 OUT2
VCC Voltage ................................................- 0.3V to 16V CAP, VOUT Voltage ......................................- 0.3V to 40V SW .............................................................- 0.3V to 41V IN1,IN2 ........................................................- 0.3V to 6V OUT1,OUT2 ................................................- 0.3V to 40V SHDN Voltage ............................................- 0.3V to 16V VREF Voltage..............................................- 0.3V to 2.5V FBP Voltage...............................................- 0.3V to 2.5V Maximum Junction Temperature........................... 125C Operating Temperature Range (Note 2)..-40C to 125C Storage Temperature Range...................- 65C to 150C
DDB PACKAGE 12-PIN (3mm 2mm) PLASTIC DFN TJMAX = 125C, JA = 76C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LT8415EDDB#PBF LT8415IDDB#PBF TAPE AND REEL LT8415EDDB#TRPBF LT8415IDDB#TRPBF PART MARKING* LFDC LFDC PACKAGE DESCRIPTION 12-Pin (3mm x 2mm) Plastic DFN 12-Pin (3mm x 2mm) Plastic DFN TEMPERATURE RANGE -40C to 125C -40C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
PARAMETER Minimum Operating Voltage Maximum Operating Voltage Reference Voltage VREF Current Limit VREF Discharge Time VREF Line Regulation Quiescent Current Quiescent Current in Shutdown Quiescent Current from VOUT and CAP Minimum Switch Off Time Switch Current Limit Switch VCESAT Switch Leakage Current Schottky Forward Voltage Schottky Reverse Leakage (Note 3) (Note 3)
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 3.0V, VSHDN = VIN unless otherwise noted. (Note 2)
CONDITIONS MIN TYP 2.20
l
MAX 2.50 16 1.255
UNITS V V V A S %/V
1.220
1.235 10 70 0.01
Not Switching VSHDN = 0V VOUT = 16V After Start-Up (Note 4) During Start-Up (Note 4)
l l
10.5 0 4 240 600
15.5 1
A A A nS
l
20
25 150 0 650 0 0
30 1 850 0.5 1
mA mV A mV A A
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ISW = 10mA VSW = 5V IDIODE = 10mA VCAP - VSW = 5 VCAP - Vsw = 40
2
LT8415 ELECTRICAL CHARACTERISTICS
PARAMETER PMOS Disconnect Current Limit PMOS Disconnect VCAP - VOUT Internal Resistor Divider Ratio FBP pin Bias Current SHDN Minimum Input Voltage High SHDN Input Voltage High hysteresis SHDN Hysteresis Current SHDN Input Voltage Low SHDN Pin Bias Current IN1,IN2 Minimum Input Voltage High IN1,IN2 Input Voltage Low OUT1,OUT2 Rise Time OUT1,OUT2 Fall Time OUT1,OUT2 Rise Delay OUT1,OUT2 Fall Delay Half-bridge NMOS Voltage Drop VOUT1,OUT2 VOUT = 34V, CLOAD = 200pF (Note 5) VOUT = 34V, CLOAD = 200pF (Note 5) VOUT = 34V, CLOAD = 200pF (Note 5) VOUT = 34V, CLOAD = 200pF (Note 5) IN1,IN2 = 0V, 0.1mA Current Into OUT1,OUT2 VSHDN = 3V VSHDN = 16V
l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = 3.0V, VSHDN = VIN unless otherwise noted. (Note 2)
CONDITIONS IOUT = 1mA
l
MIN 14 31.6 1.20 0.08
TYP 19 50 31.85 1.3 1.30 60 0.1 0 2
MAX 25 32.2 30 1.45 0.14 0.3 1 3 0.3
UNITS mA mV nA V mV A V A A V V s s s s mV mV
VFBP = 0.5V, Current Flows Out of Pin SHDN Rising (Note 3)
l l
1.1 2.5 3 4 2 70 85
Half-bridge PMOS Voltage Drop VOUT - VOUT1,OUT2 IN1,IN2 = 2V, 0.1mA Load From OUT1,OUT2 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT8415 is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: See applications section for more information. Note 4: Start-Up mode occurs when VOUT is less than VFBP*64/3. Note 5: See Timing Diagram. Rise times are measured from 4V to 30V and fall times are measured from 30V to 4V. Delay times are measured from the IN1,IN2 transition to when the OUT1,OUT2 voltage has risen to 4V or decreased to 30V.
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Frequency vs Load Current
1000 OUTPUT VOLTAGE CHANGE (%) VCC = 3.6V VOUT = 16V FIGURE 4 CIRCUIT 0.6 0.4 0.2 0 -0.2 -0.4 -0.6
TA = 25C, unless otherwise noted. Vout vs FBP Voltage
50
Load Regulation
VCC = 3.6V VOUT = 16V FIGURE 4 CIRCUIT OUTPUT VOLTAGE (V) 0 1 2 LOAD CURRENT (mA) 3
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SWITCHING FREQUENCY (kHz)
800
40
600
30
400
20
200
10
0
0
1 2 LOAD CURRENT (mA)
3
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0
0
0.5
1 1.5 FBP VOLTAGE (V)
2
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LT8415 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted.
Output Voltage vs Temperature
1 0.75 OUTPUT VOLTAGE CHANGE (%) 0.5 0.25 0 - 0.25 - 0.5 - 0.75 -1 - 40 0 40 80 TEMPERATURE (C) 120
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Quiescent Current - Not Switching
18 15 15 QUIESCENT CURRENT (A) 12 9 6 3 0 QUIESCENT CURRENT (A)
Quiescent Current vs Temperature
VCC = 3.6V 12
VCC = 3.6V, VOUT = 16V LOAD = 0.5mA FIGURE 4 CIRCUIT
9
6
3
0
4
8 12 VCC VOLTAGE (V)
16
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0 -40
0
40 80 TEMPERATURE (C)
120
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Quiescent Current vs SHDN Voltage
12 AVERAGE INPUT CURRENT (A) 1000
Average Input Current in Regulation with No Load
2.5 VCC = 3.6V SHDN PIN BIAS CURRENT (A) 2 1.5 1 0.5 0 -0.5 0 10 20 30 OUTPUT VOLTAGE (V) 40
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SHDN Current vs SHDN Voltage
VCC = 3.6V
QUIESCENT CURRENT (A)
9
6
100
3 VCC = 3.6V 0 0 1 2 3 SHDN VOLTAGE (V) 4 5
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10
0
4
8 12 SHDN VOLTAGE (V)
16
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Peak Inductor Current vs Temperature
40 PEAK INDUCTOR CURRENT (mA) VCC = 3.6V VOUT = 16V FIGURE 4 CIRCUIT 1.235
VREF Voltage vs Temperature
2.6 2.4 UVLO VOLTAGE (V)
UVLO vs Temperature
36
1.234 VREF VOLTAGE (V)
VCC RISING 2.2 VCC FALLING 2 1.8 1.6
32
1.233
28
1.232
24
1.231 VCC = 3.6V
20 - 40
0
40 80 TEMPERATURE (C)
120
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1.23 -40
0
40 80 TEMPERATURE (C)
120
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1.4 -40
0
40 80 TEMPERATURE (C)
120
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LT8415 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted.
SW Saturation Voltage vs Switch Current
300 OUTPUT VOLTAGE CHANGE (%) 250 SWITCH VCESAT (mV) 200 150 100 50 0 0.3 VOUT = 16V 0.25 SHDN MINIMUM INPUT VOLTAGE HIGH (V) 0.2 0.15 0.1 0.05 0 1.4 SHDN RISING 1.3 SHDN FALLING 1.2
Line Regulation
1.5
SHDN Minimum Input Voltage High vs Temperature
1.1
0
5
10 15 20 SWITCH CURRENT (mA)
25
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0
4
8 12 VCC VOLTAGE (V)
16
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1 -40
0
40 80 TEMPERATURE (C)
120
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Output Disconnect PMOS current vs CAP to VOUT Voltage Difference
25 VCAP = 16V 20 PMOS CURRENT (mA) SHDN VOLTAGE 5V/DIV INDUCTOR CURRENT 20mA/DIV CAP VOLTAGE 5V/DIV VOUT VOLTAGE 5V/DIV
Start-Up Waveforms Without Capacitor at VREF Pin
SHDN VOLTAGE 5V/DIV INDUCTOR CURRENT 20mA/DIV CAP VOLTAGE 5V/DIV VOUT VOLTAGE 5V/DIV VCC = 3.6V VOUT = 16V 200s/DIV
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Start-Up Waveforms With 0.1F Capacitor at VREF pin
15
10
5
VCC = 3.6V VOUT = 16V
2ms/DIV
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0
0
4
8
12
16
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CAP TO VOUT VOLTAGE DIFFERENCE (V)
IN1,IN2 Minimum Input Voltage High vs Temperature
1 FALL TIME AND FALL DELAY (s) 5
Half-Bridge Fall Time and Fall Delay vs Temperature
5 RISE TIME AND RISE DELAY (s)
Half-Bridge Rise Time and Rise Delay vs Temperature
0.8 IN1,IN2 MINIMUM INPUT VOLTAGE HIGH (V)
4 FALL TIME 3
4
RISE DELAY
0.6
3 RISE TIME 2
0.4
2
FALL DELAY LOAD = 220pF VCC = 3.6V, VOUT = 34V FRONT PAGE APPLICATION 0 40 80 TEMPERATURE (C) 120
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0.2
VCC = 3.6V VOUT = 34V FRONT PAGE APPLICATION 0 40 80 TEMPERATURE (C) 120
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1
1
LOAD = 220pF VCC = 3.6V, VOUT = 34V FRONT PAGE APPLICATION 0 40 80 TEMPERATURE (C) 120
8415 G21
0 - 40
0 -40
0 -40
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LT8415 PIN FUNCTIONS
SHDN (Pin 1): Shutdown Pin. This pin is used to enable/disable the chip. Drive below 0.3V to disable the chip. Drive above 1.4V to activate the chip. Do not float this pin. VCC (Pin 2): Input Supply Pin. Must be locally bypassed to GND. See typical applications section. GND (Pin 3 and Pin 13): Ground. Tie directly to local ground plane. Pin 13 is floating but must be grounded for proper shielding. SW (Pin 4): Switch Pin. This is the collector of the internal NPN power switch. Minimize the metal trace area connected to this pin to minimize EMI. IN1 (Pin 5): First Half-Bridge Control Input. Do not float this pin. IN2 (Pin 6): Second Half-Bridge Control Input. Do not float this pin. OUT2 (Pin 7): Second Half-Bridge Output. This pin is controlled in phase by the voltage on IN2. The output level is either the voltage on VOUT or GND. OUT1 (Pin 8): First Half-Bridge Output. This pin is controlled in phase by the voltage on IN1. The output level is either the voltage on VOUT or GND. VOUT (Pin 9): Drain of Output Disconnect PMOS. Place a bypass capacitor from this pin to GND. CAP (Pin 10): This is the Cathode of the Internal Schottky Diode. Place a bypass capacitor from this pin to GND. VREF (Pin 11): Reference Pin. Soft start can be achieved by placing a capacitor from this pin to GND. This cap will be discharged for 70s (typical) at the beginning of start-up and then be charged to 1.235V with a 10A current source. FBP(Pin 12): Positive Feedback Pin. This pin is the error amplifier's positive input terminal. To achieve the desired output voltage, choose the FBP pin voltage (VFBP) according to the following formula: VFBP = VOUT /31.85 When resistor divider from the VREF is used to set the FBP voltage, choose the resistor divider ratio according to the following formula: R1/R2 = (39.33 - VOUT )/VOUT For protection purposes, the output voltage can not exceed 40V even if VFBP is driven higher than VREF.
BLOCK DIAGRAM
VCC 2 MAX 10A ENABLE CHIP SHDN 1 VOUT 9 CAP 10 SW 4 VOUT 12.4M 1.235V TOP GATE CONTROL OUT1 8 OUT2 7
+ -
VREF 11 DISCHARGE CONTROL R1
+
400K
-
1.235V
OUTPUT DISCONNECT CONTROL
BOTTOM GATE CONTROL
TIMING AND PEAK CURRENT CONTROL
SWITCH CONTROL TOP GATE CONTROL
VOUT
12 1.235V
R2
6
+ +
FBP
-
VC
FB
+ -
13 GND 3 5 6 IN2
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BOTTOM GATE CONTROL
GND IN1
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LT8415 TIMING DIAGRAM
2V IN1,IN2 VOLTAGE 0V
RISE TIME 34V OUT1,OUT2 VOLTAGE 0V RISE DELAY 4V 30V
FALL DELAY
FALL TIME
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OPERATION
Switching Regulator The LT8415 utilizes a variable peak current, variable offtime control scheme to provide high efficiency over a wide output current range. The operation of the part can be better understood by referring to the Block Diagram. The part senses the output voltage by monitoring the internal FB node, and servoing the FB node voltage to be equal to the FBP pin voltage. The chip integrates an accurate high value resistor divider (12.4MEG/0.4MEG) from the VOUT pin. The output voltage is set by the FBP pin voltage, which in turn is set by an external resistor divider from the VREF pin. The FBP pin voltage can also be directly biased with an external reference, allowing full control of the output voltage during operation. The Switch Control block senses the output of the amplifier and adjusts the switching frequency as well as other parameters to achieve regulation. During the start-up of the circuit, special precautions are taken to ensure that the inductor current remains under control. The LT8415 also has a PMOS output disconnect switch. The PMOS switch is turned on when the part is enabled via the SHDN pin. When the part is in shutdown, the PMOS switch turns off, allowing the VOUT node to go to ground. This type of disconnect function is often required in power supplies. Half-Bridge The N-channel and P-channel MOSFETs in each half-bridge are synchronously controlled by a single input pin, and will never turn on at the same time in typical applications, protecting against shoot-through current. The OUT1 and OUT2 pins are the same polarity as the IN1 and IN2 pins respectively. When the part is disabled, both N-channel and P-channel MOSFETs turn off, and the OUT1 and OUT2 pins will become high impedance with a 20M pull down resistor connected to ground.
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LT8415 APPLICATIONS INFORMATION
Inductor Selection Several inductors that work well with the LT8415 are listed in Table 1. The tables are not complete, and there are many other manufacturers and devices that can be used. Consult each manufacturer for more detailed information and for their entire selection of related parts, as many different sizes and shapes are available. Inductors with a value of 47H or higher are recommended for most LT8415 designs. Inductors with low core losses and small DCR (copper wire resistance) are good choices for LT8415 applications. For full output power, the inductor should have a saturation current rating higher than the peak inductor current. The peak inductor current can be calculated as: IPK = ILIMIT VIN * 150 *10 - 6 + mA L capacitor placed on the CAP node is recommended to filter the inductor current while a 0.1F to 1F capacitor placed on the VOUT node will give excellent transient response and stability. To make the VREF pin less sensitive to noise, putting a capacitor on the VREF pin is recommended, but not required. A 47nF to 220nF 0402 capacitor will be sufficient. See also Soft-Start section for more information about a capacitor across VREF. Table 2 shows a list of several capacitor manufacturers. Consult the manufacturers for more detailed information and for their entire selection of related parts.
Table 2. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER Taiyo Yuden Murata AVX Kemet TDK PHONE (408) 573-4150 (814) 237-1431 (843) 448-9411 (408)986-0424 (847) 803-6100 WEBSITE www.t-yuden.com www.murata.com www.avxcorp.com www.kemet.com www.tdk.com
where the worst case ILIMIT is 30mA. L is the inductance value in Henrys and VIN is the input voltage to the boost circuit.
Table 1. Recommended Inductors for LT8415
PART LQH2MCN680K02 LQH32CN101K53 DO2010-683ML DO2010-104ML LPS3015-104ML LPS3015-154ML L (H) 68 100 68 100 100 150 DCR (H) 6.6 3.5 8.8 15.7 3.4 6.1 SIZE (mm) 2.0 x 1.6 x 0.9 3.2 x 2.5 x 2.0 2.0 x 2.0 x 1.0 2.0 x 2.0 x 1.0 3.0 x 3.0 x 1.4 3.0 x 3.0 x 1.4 VENDOR Murata www.murata.com Coilcraft www.coilcraft.com
Setting Output Voltage The output voltage is set by the FBP pin voltage, and VOUT is equal to 31.85 * VFBP when the output is regulated, shown in Figure 1. Since the VREF pin provides a good reference (~1.235V), the FBP voltage can be easily set by a resistor divider from the VREF pin to ground. The series resistance of this resistor divider should be kept larger than 200K to prevent loading down the VREF pin. The FBP pin can also be biased directly by an external reference. For over voltage protection, the output voltage is limited to 40V. Therefore, if VFBP is higher than 1.235V, the output voltage will stay at 40V.
50
Capacitor Selection The small size and low ESR of ceramic capacitors make them suitable for most LT8415 applications. X5R and X7R types are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as Y5V or Z5U. A 2.2F or higher input capacitor and a 0.1F to 1F output capacitor are sufficient for most applications. Always use a capacitor with a sufficient voltage rating. Many ceramic capacitors rated at 0.1F to 1F have greatly reduced capacitance when bias voltages are applied. Be sure to check actual capacitance at the desired output voltage. Generally a 0603 or 0805 size capacitor will be adequate. A 0.1F to 1F
40 OUTPUT VOLTAGE (V)
30
20
10
0
0
0.5
1 1.5 FBP VOLTAGE (V)
2
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Figure 1. FBP to VOUT Transfer Curve
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LT8415 APPLICATIONS INFORMATION
Maximum Output Load Current The maximum output current of a particular LT8415 circuit is a function of several circuit variables. The following method can be helpful in predicting the maximum load current for a given circuit: Step 1: Calculate the peak inductor current: IPK = ILIMIT VIN * 150 * 10 - 6 + mA L Inrush Current When VCC is stepped from ground to the operating voltage while the output capacitor is discharged, a high level of inrush current may flow through the inductor and Schottky diode into the output capacitor. Conditions that increase inrush current include a larger more abrupt voltage step at VCC , a larger output capacitor tied to the CAP pin and an inductor with a low saturation current. While the chip is designed to handle such events, the inrush current should not be allowed to exceed 0.3A. For circuits that use output capacitor values within the recommended range and have input voltages of less than 6V, inrush current remains low, posing no hazard to the device. In cases where there are large steps at VCC (more than 6V) and/or a large capacitor is used at the CAP pin, inrush current should be measured to ensure safe operation. Soft-Start The LT8415 contains a soft-start circuit to limit peak switch currents during start-up. High start-up current is inherent in switching regulators in general since the feedback loop is saturated due to VOUT being far from its final value. The regulator tries to charge the output capacitor as quickly as possible, which results in large peak current. When the FBP pin voltage is generated by a resistor divider from the VREF pin, the start-up current can be limited by connecting an external capacitor (typically 47nF to 220nF) to the VREF pin. When the part is brought out of shutdown, this capacitor is first discharged for about 70s (providing protection against pin glitches and slow ramping), then an internal 10A current source pulls the VREF pin slowly to 1.235V. Since the VOUT voltage is set by the FBP pin voltage, the VOUT voltage will also slowly increase to the regulated voltage, which results in lower peak inductor current. The voltage ramp rate on the pin can be set by the value of the VREF pin capacitor. Output Disconnect The LT8415 has an output disconnect PMOS that blocks the load from the input during shutdown. The maximum current through the PMOS is limited to 19mA by circuitry inside the chip, helping the chip survive output shorts.
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where ILIMIT is 25mA. L is the inductance value in Henrys and VIN is the input voltage to the boost circuit. Step 2: Calculate the inductor ripple current: IRIPPLE = (VOUT + 1- VIN ) * 200 * 10 - 6 mA L
where VOUT is the desired output voltage. If the inductor ripple current is less than the peak current, then the circuit will only operate in discontinuous conduction mode. The inductor value should be increased so that IRIPPLE < IPK . An application circuit can be designed to operate only in discontinuous mode, but the output current capability will be reduced. Step 3: Calculate the average input current: IIN(AVG) = IPK - IRIPPLE mA 2
Step 4: Calculate the nominal output current: IOUT(NOM) = IIN(AVG) * VIN * 0.7 VOUT mA
Step 5: Derate output current: IOUT = IOUT(NOM) * 0.8 For low output voltages the output current capability will be increased. When using output disconnect (load current taken from VOUT), these higher currents will cause the drop in the PMOS switch to be higher resulting in lower output current capability than predicted by the preceding equations.
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LT8415 APPLICATIONS INFORMATION
If the application doesn't require the output disconnect function, the CAP and VOUT pin can be shorted, and higher power converter efficiency can be achieved. SHDN Pin Comparator and Hysteresis Current An internal comparator compares the SHDN pin voltage with an internal voltage reference (~1.3V) which gives a precise turn-on voltage level. The internal hysteresis of this turn-on voltage is about 60mV. When the chip is turned on, and the SHDN pin voltage is close to this turn-on voltage, 0.1A current flows out of the SHDN pin. This current is called SHDN pin hysteresis current, and will go away when the chip is off. By connecting the external resistors as in Figure 2, a user-programmable enable voltage function can be realized. The turn-on voltage for the configuration is: 1.30 * (1 + R1/R2) and the turn-off voltage is: (1.24 - R3 * 10 -7) * (1 + R1/R2) - R1 * 10 -7 where R1, R2 and R3 are resistance value in .
ENABLE VOLTAGE IN1 R1 R3 CONNECT TO SHDN PIN
8410 F03
Board Layout Considerations As with all switching regulators, careful attention must be paid to the PCB layout and component placement. To maximize efficiency, switch rise and fall times are made as short as possible. To prevent electromagnetic interference (EMI) problems, proper layout of the high frequency switching path is essential. The voltage signal of the SW pin has sharp rising and falling edges. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize interplane coupling. In addition, the FBP pin and VREF pin are sensitive to noise. Minimizing the length and area of all traces to these two pins is recommended. Recommended component placement is shown in Figure 3.
VIN SHDN
SHDN VCC GND SW GND
FBP VREF CAP VOUT OUT1 OUT2
IN2
R2
IN2
IN1
OUT1
OUT2
VIAS TO GROUND PLANE REQUIRED TO IMPROVE THERMAL PERFORMANCE
Figure 2. Programming Enable Voltage by Using External Resistors
VIAS FOR CAP AND VOUT GROUND RETURN THROUGH SECOND METAL LAYER, CAPACITOR GROUNDS MUST BE RETURNED DIRECTLY TO IC GROUND
Half-Bridge Control Signals The half-bridge is controlled by the IN1 and IN2 pins. The IN1 and IN2 pins should be driven with a logic signal. When the chip is enabled, the OUT1 and OUT2 voltages are equal to VOUT IN1 and IN2 are driven higher than 1V, and they are near GND when IN1 and IN2 are driven below 0.3V. Do not drive the IN1 or IN2 pins between 0.3V to 1V for more than 20s since this will leave OUT1 or OUT2 in an uncertain state and may also cause shoot-through current.
Figure 3. Recommended Board Layout
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LT8415 TYPICAL APPLICATIONS
Drive External Capacitors to 34V/0V with the LT8415
VIN 2.5V to 16V C1 2.2F L1 100H C2 22nF VOUT = 34V
Response Driving External Capacitors
OUT2 VOLTAGE 20/DIV IN2 VOLTAGE 2V/DIV OUT1 VOLTAGE 20/DIV IN1 VOLTAGE 2V/DIV COUT1 = 1nF COUT2 = 200pF
8415 TA03
SW VCC
CAP VOUT
LT8415 LOGIC LEVEL CHIP ENABLE IN 1 IN 2 SHDN GND C1: 2.2F, 16V, X5R, 0603 C2: 22nF, 100V, X5R, 0603 C3: 0.1F, 100V, X5R, 0603* C4: 0.1F, 16V, X7R, 0402 L1: COILCRAFT DO2010-104ML * HIGHER CAPACITANCE VALUE IS REQUIRED FOR C3 WHEN THE VIN IS HIGHER THAT 8V OUT 1 OUT 2 VREF R1 137K FBP R2 887K
C3 0.1F*
34V/0V COUT1 34V/0V COUT2 C4 0.1F
20s/DIV
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VOUT (V) 40 35 30 25 20 15 10 5
RESISTOR DIVIDER FROM VREF R1 (k)/R2 (k) NA 110/887 237/768 365/634 487/511 619/383 750/255 866/127
MAXIMUM OUTPUT CURRENT (mA) VIN = 2.8V 0.5 0.7 0.8 1.0 1.4 1.6 3.3 8.0 VIN = 3.6V 0.7 0.9 1.0 1.4 1.9 2.4 4.6 11 VIN = 5.0V 1.1 1.4 1.5 2.1 2.9 4.0 7.0 17 VIN = 12V 3.6 4.4 5.5 7.2 9.7 14 NA NA
PACKAGE DESCRIPTION
DDB Package 12-Lead Plastic DFN (3mm x 2mm)
(Reference LTC DWG # 05-08-1723 Rev O)
0.64 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.45 BSC 2.39 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 0 - 0.05 2.39 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD PIN 1 BAR TOP MARK (SEE NOTE 6) 2.00 0.10 (2 SIDES) 0.64 0.10 (2 SIDES) 6 0.23 0.05 PIN 1 R = 0.20 OR 0.25 45 CHAMFER
(DDB12) DFN 0106 REV O
3.00 0.10 (2 SIDES)
R = 0.05 TYP
R = 0.115 TYP 7
0.40 0.10 12
1
0.200 REF
0.75 0.05
0.45 BSC
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
8415f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT8415 TYPICAL APPLICATION
VIN 2.5V to 16V C1 2.2F L1 100H C2 0.1F VOUT = 16V
SW VCC
CAP VOUT
LT8415 LOGIC LEVEL CHIP ENABLE IN 1 IN 2 SHDN GND OUT 1 OUT 2 VREF 604K FBP
C3 0.1F*
16V/0V COUT1 16V/0V COUT2
412K C4 C1: 2.2F, 16V, X5R, 0603 0.1F C2: 0.1F, 25V, X5R, 0603 C3: 0.1F, 25V, X5R, 0603* 8415 TA04 C4: 0.1F, 16V, X7R, 0402 L1: MURATA LQH32CN101K53 * HIGHER CAPACITANCE VALUE IS REQUIRED FOR C3 WHEN THE VIN IS HIGHER THAT 8V
Figure 4. Drive External Capacitors to 16V/0V with the LT8415
RELATED PARTS
PART NUMBER LT1930/LT1930A LT1945 (Dual) LT1946/LT1946A LT3467/LT3467A LT3464 LT3463/LT3463A DESCRIPTION 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converters Dual Output, Boost/Inverter, 350mA (ISW), Constant OffTime, High Efficiency Step-Up DC/DC Converter 1.5A (ISW), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converters 1.1A (ISW), 1.3MHz/2.1MHz, High Efficiency Step-Up DC/DC Converters with Soft-Start 85mA (ISW), High Efficiency Step-Up DC/DC Converter with Integrated Schottky and PNP Disconnect Dual Output, Boost/Inverter, 250mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converters with Integrated Schottkys Dual Output, Boost/Inverter, 1.3A (ISW), High Efficiency Boost-Inverting DC/DC Converter 1A (ISW), 1.2MHz, High Efficiency Step-Up DC/DC Converter with integrated Schottky Diode and Output Disconnect 180mA/350mA (ISW), High Efficiency, Low Noise Step-Up DC/DC Converter with Output Disconnect 2A, 40V, 2.5MHz Boost DC/DC Converter COMMENTS VIN : 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package VIN : 1.2V to 15V, VOUT(MAX) = 34V, IQ = 40A, ISD < 1A, 10-Lead MS Package VIN : 2.45V to 16V, VOUT(MAX) = 34V, IQ = 3.2mA, ISD < 1A, 8-Lead MS Package VIN : 2.4V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1A, ThinSOT Package VIN : 2.3V to 10V, VOUT(MAX) = 34V, IQ = 25A, ISD < 1A, ThinSOT Package VIN : 2.3V to 15V, VOUT(MAX) = 40V, IQ = 40A, ISD < 1A, DFN Package VIN : 2.4V to 16V, VOUT(MAX) = 40V, IQ = 2.5mA, ISD < 1A, DFN Package VIN : 2.2V to 16V, VOUT(MAX) = 36V, IQ = 100A, ISD < 1A, DFN Package VIN : 2.1V to 16V, VOUT(MAX) = 40V, IQ = 65A, ISD < 1A, DFN Package VIN : 2.5V to 32V, VOUT(MAX) = 40V, IQ = 1mA, ISD <1A, MS8E 3mm x 3mm DFN-8 Package VIN : 2.3V to 16V, VOUT(MAX) = 40V, IQ = 60A, ISD < 1A, DFN Package
LT3471 LT3473/LT3473A LT3494/LT3494A LT3580
LT3495/LT3495B/ 650mA/350mA (ISW), High Efficiency, Low Noise Step-Up LT3495-1/LT3495B-1 DC/DC Converter with Output Disconnect LT8410/LT8410-1
25mA/8mA (ISW), High Efficiency, Low Noise Step-Up DC/DC VIN : 2.3V to 16V, VOUT(MAX) = 40V, IQ = 8.5A, ISD < 1A, DFN Converter with Output Disconnect Package
8415f
12 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0409 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2009

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