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FEATURES

LT3585-0/LT3585-1 LT3585-2/LT3585-3 Photoflash Chargers with Adjustable Input Current and IGBT Drivers DESCRIPTIO
The LT(R)3585 series are highly integrated ICs designed to charge photoflash capacitors in digital and film cameras. A new control technique allows for the use of extremely small transformers. Each part contains an on-chip high voltage NPN power switch. Output voltage detection is completely contained within the part, eliminating the need for any discrete zener diodes or resistors. The output voltage can be adjusted by simply changing the turns ratio of the transformer. The CHRG/IADJ pin gives full control of the part to the user. Driving CHRG/IADJ low puts the part in low power shutdown. The CHRG/IADJ pin can also be used to reduce the input current of the charger, useful in extending battery life. The DONE pin indicates when the part has completed charging. The LT3585 series of parts are housed in tiny 3mm x 2mm DFN packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Adjustable Input Current Integrated IGBT Driver No Output Voltage Divider Needed Uses Small Transformers: 5.8mm x 5.8mm x 3mm Fast Photoflash Charge Times Charges Any Size Photoflash Capacitor Supports Operation from Single Li-Ion Cell, Two AA Cells or any Supply from 1.5V Up to 16V Small 10-Lead (3mm x 2mm) DFN Package
REDUCED MODE CHARGE TIME (Sec) 6.6 9.2 12.6 14.6
Fast Charge Time
NORMAL MODE INPUT CHARGE TIME VERSION CURRENT (mA) (Sec) LT3585-3 800/400 3.3 LT3585-0 550/275 4.6 LT3585-2 400/200 5.8 LT3585-1* 250/115 5.0 100F capacitor, 320V, VIN = VBAT = 3.6V *50F capacitor, 320V, VIN = VBAT = 3.6V
APPLICATIO S

Digital/Film Camera Flash PDA/Cell Phone Flash Emergency Strobe
TYPICAL APPLICATIO
LT3585-1 Photoflash Charger Uses High Efficiency 2mm Tall Transformers with Tunable IGBT Gate Drive
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY VBAT 2 AA OR 1 TO 2 Li-Ion
1:10:2 4.7F 1
320V 4 1M
*
2 VBAT DONE VIN 5V 0.22F CHRG/IADJ LT3585-1 VIN IGBTPWR IGBTIN IGBTPU IGBTPD SW GND
*5
+
50F PHOTOFLASH CAPACITOR
2.2F 600V TRIGGER T 1 3 2
A
VOUT 50V/DIV
FLASHLAMP
C
IIN 500mA/DIV
TO GATE OF IGBT 20 TO 160
3585 TA01a
U
U
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LT3585-1 Charging Waveform Normal Input Current Mode
VBAT = 3.6V COUT = 50F
1sec/DIV
3585 TA01b
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IGBTIN 1 IGBTPWR 2 GND 3 VIN 4 VBAT 5 11 10 IGBTPU 9 8 7 6 IGBTPD SW CHRG/IADJ DONE
VIN Voltage ................................................................16V VBATT Voltage ............................................................16V SW Voltage ...............................................................60V SW Pin Negative Current...........................................-1A CHRG/IADJ Voltage...................................................10V IGBTPWR Voltage .....................................................10V IGBTIN Voltage .........................................................10V IGBTPU Voltage ........................................................10V IGBTPD Voltage ........................................................10V DONE Voltage ...........................................................10V Current Into DONE Pin ............................... 0.2mA/-1mA Maximum Junction Temperature .......................... 125C Operating Temperature Range (Note 2) ... -40C to 85C Storage Temperature Range................... -65C to 125C
DDB PACKAGE 10-LEAD (3mm x 2mm) PLASTIC DFN TJMAX = 125C, JA = 76C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER LT3585EDDB-0 LT3585EDDB-1 LT3585EDDB-2 LT3585EDDB-3
DDB PART MARKING LCLK LCLJ LCLH LCFX
Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
PARAMETER Quiescent Current VIN Voltage Range VBAT Voltage Range Switch Current Limit
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifications are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
CONDITIONS VCHRG = 3V, Not Switching VCHRG = 0V, In Shutdown

MIN
TYP 5 0
MAX 8 1 16 16
UNITS mA A V V A A A A mV mV mV mV
2.5 1.5 1.55 1.1 0.75 0.45 1.7 1.2 0.85 0.55 485 330 230 140
LT3585-3 (Note 3) LT3585-0 (Note 3) LT3585-2 (Note 3) LT3585-1 (Note 3) LT3585-3, ISW = 1.4A LT3585-0, ISW = 1A LT3585-2, ISW = 700mA LT3585-1, ISW = 400mA Measured as VSW - VBAT 300ns Pulse Width Measured as VSW - VBAT VCHRG = 3V VCHRG = 0V VBAT = VSW = 5V, In Shutdown

1.85 1.3 0.95 0.65
Switch VCESAT
VOUT Comparator Trip Voltage VOUT Comparator Overdrive DCM Comparator Trip Voltage CHRG/IADJ Pin Current Switch Leakage Current CHRG/IADJ Minimum Enable Voltage
31 30.5 80
31.5 31.5 200 130 45 0 0.01
32 32.5 400 180 70 0.1 1
1.1
2
U
V V mV mV A A A V
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W
LT3585-0/LT3585-1 LT3585-2/LT3585-3 ELECTRICAL CHARACTERISTICS
PARAMETER CHRG/IADJ Three-State Voltage for Reduced Input Current CHRG/IADJ Voltage Range for Normal Input Current CHRG/IADJ Low Voltage Delay Time for Reduced Input Current Mode CHRG/IADJ Pin Three Stated: VBAT = 4.2V, Fresh Li-Ion Cell VBAT = 2.8V, Dead Li-Ion Cell VBAT = 3V, Fresh 2 AA Cells VBAT = 2V, Dead 2 AA Cells HighLowHigh 100k from VIN to DONE 33A into DONE Pin VDONE = 3V, DONE NPN Off

The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifications are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
CONDITIONS CHRG/IADJ > 1.1V then Float

MIN 1.1 1.6
TYP 1.28
MAX 1.4 10 0.3
UNITS V V V s s s s s V
5.2 7.2 6.8 9.5 20 3 120 1 2.5 1.5 0.5 0.4 0.13 200 100 10
Minimum CHRG/IADJ Pin Low Time DONE Output Signal High DONE Output Signal Low DONE Leakage Current IGBTPWR Voltage Range IGBT Input High Level IGBT Input Low Level IGBT Output Rise Time IGBT Output Fall Time
mV nA V V V s s
IGBTPU Pin, COUT = 4000pF, IGBTPWR = 5V, IGBTIN = 0V1.5V, 10%90% IGBTPD Pin, COUT = 4000pF, IGBTPWR = 5V, IGBTIN = 1.5V0V, 90%10%
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Ratings are for DC levels only.
Note 2: The LT3585 series is guaranteed to meet performance specifications from 0C to 85C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Current limit is guaranteed by design and/or correlation to static test.
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 Charging Waveform Normal Input Current Mode LT3585-0 curves use Figure 11, LT3585-1 curves use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted. LT3585-1 Charging Waveform Normal Input Current Mode LT3585-2 Charging Waveform Normal Input Current Mode
VOUT 50V/DIV
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50F
0.5s/DIV
LT3585-3 Charging Waveform Normal Input Current Mode
VOUT 50V/DIV
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50F
0.5s/DIV
LT3585-2 Charging Waveform Reduced Input Current Mode
CHARGE TIME (SECONDS)
VOUT 50V/DIV
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50mF
1s/DIV
4
UW
VOUT 50V/DIV
VOUT 50V/DIV
3585 G01
AVERAGE INPUT CURRENT 500mA/DIV VBAT = 3.6V COUT = 50F
2s/DIV
3585 G02
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50F
1s/DIV
3585 G03
LT3585-0 Charging Waveform Reduced Input Current Mode
LT3585-1 Charging Waveform Reduced Input Current Mode
VOUT 50V/DIV
VOUT 50V/DIV
3585 G04
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50F
0.5s/DIV
3585 G05
AVERAGE INPUT CURRENT 500mA/DIV VBAT = 3.6V COUT = 50F
2s/DIV
3585 G06
LT3585-3 Charging Waveform Reduced Input Current Mode
8 7 6 5 4 3 2 1 0
Charge Time* Normal Input Current Mode
LT3585-0 LT3585-1 LT3585-2 LT3585-3
VOUT 50V/DIV
3585 G07
AVERAGE INPUT CURRENT 1A/DIV VBAT = 3.6V COUT = 50F
0.5s/DIV
3585 G08
2
3
4
5
6 VBAT (V)
7
8
9
10
3585 G09
*USING RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL PERFOR A CE CHARACTERISTICS
Charge Time* Reduced Input Current Mode
25 700 LT3585-0 LT3585-1 LT3585-2 LT3585-3 600 INPUT CURRENT (mA) 500 400 300 200 100 0 2 3 4 5 6 7 8 9 10 0 100 VOUT (V)
3585 G11
LT3585-0 curves use Figure 11, LT3585-1 curves use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted. LT3585-0 Input Current Normal Input Current Mode
300 250 INPUT CURRENT (mA) 200 150 100 50 0 200 300 0 100 VOUT (V)
3585 G12
CHARGE TIME (SECONDS)
20 15
10
5
0
3585 G10 VBAT (V) *USING RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
LT3585-2 Input Current Normal Input Current Mode
450 400 350 INPUT CURRENT (mA) INPUT CURRENT (mA) 300 250 200 150 100 50 0 0 100 VOUT (V)
3585 G13
INPUT CURRENT (mA)
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 200 300
LT3585-1 Input Current Reduced Input Current Mode
120 100 INPUT CURRENT (mA) INPUT CURRENT (mA) 80 60 40 20 0 0 100 VOUT (V)
3585 G16
INPUT CURRENT (mA)
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 200 300
UW
LT3585-1 Input Current Normal Input Current Mode
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 200 300
LT3585-3 Input Current Normal Input Current Mode
900 800 700 600 500 400 300 200 100 0 0 100 VOUT (V)
3585 G14
LT3585-0 Input Current Reduced Input Current Mode
350 300 250 200 150 100 50 0 0 100 VOUT (V)
3585 G15
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 200 300
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 200 300
LT3585-2 Input Current Reduced Input Current Mode
250 500 450 200 400 350 300 250 200 150 100 50 0
LT3585-3 Input Current Reduced Input Current Mode
150
100
50
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 0 100 VOUT (V)
3585 G17
0 200 300
VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 0 100 VOUT (V)
3585 G18
200
300
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 Efficiency Normal Input Current Mode
90 USING KIJIMA SBL-5.6-1 TRANSFORMER 90 USING KIJIMA SBL-5.6S-1 TRANSFORMER
LT3585-0 curves use Figure 11, LT3585-1 curves use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted. LT3585-1 Efficiency Normal Input Current Mode
90 USING KIJIMA SBL-5.6-1 TRANSFORMER
80 EFFICIENCY (%) EFFICIENCY (%)
70
70
EFFICIENCY (%)
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G19
LT3585-3 Efficiency Normal Input Current Mode
90 USING TDK LDT565630T-041 TRANSFORMER 80 EFFICIENCY (%) EFFICIENCY (%) 80 90
EFFICIENCY (%)
70
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G22
LT3585-2 Efficiency Reduced Input Current Mode
90 USING KIJIMA SBL-5.6-1 TRANSFORMER 90
80 EFFICIENCY (%) EFFICIENCY (%)
70
VOUT (V)
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G25
6
UW
LT3585-2 Efficiency Normal Input Current Mode
80
80
70
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G19
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G21
LT3585-0 Efficiency Reduced Input Current Mode
90 USING KIJIMA SBL-5.6-1 TRANSFORMER
LT3585-1 Efficiency Reduced Input Current Mode
USING KIJIMA SBL-5.6S-1 TRANSFORMER
80
70
70
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G23
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G24
LT3585-3 Efficiency Reduced Input Current Mode
330 USING TDK LDT565630T-041 TRANSFORMER 328
LT3585-0 Output Voltage
80
70
326
60 VBAT = 4.2V VBAT = 3.6V VBAT = 2.5V 50 50 100 150 200 VOUT (V) 250 300
3585 G26
324 TA = -40C TA = 25C TA = 85C 2 3 4 5 VBAT (V) 6 7 8
3585 G27
322
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-1 Output Voltage
322 320 318 VOUT (V) VOUT (V) 316 314 312 310 TA = -40C TA = 25C TA = 85C 326 324 322 330 318 316 314 TA = -40C TA = 25C TA = 85C VOUT (V) 326
LT3585-0 curves use Figure 11, LT3585-1 curves use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted. LT3585-2 Output Voltage
330
2
3
4
5 VBAT (V)
6
LT3585-0 Switch Waveform Normal Input Current Mode
VSW 10V/DIV IPRI 1A/DIV
VBAT = 3.6V VOUT = 100V
2s/DIV
LT3585-0 Switch Waveform Reduced Input Current Mode
1.8
CURRENT LIMIT (A)
LT3585-0 1.2 0.9 0.6 0.3 0 -50 -30 -10 10 20 30 40 60 TEMPERATURE (C) *DYNAMIC CURRENT LIMIT IS HIGHER THAN DC CURRENT LIMIT LT3585-2
SWITCH CURRENT (mA)
VSW 10V/DIV
IPRI 1A/DIV
VBAT = 3.6V VOUT = 300V
2s/DIV
UW
7 8
3585 G28 3585 G31 3585 G34
LT3585-3 Output Voltage
TA = -40C TA = 25C TA = 85C
328
324
322
2
3
4
5 VBAT (V)
6
7
8
3585 G29
320
2
3
4
5 VBAT (V)
6
7
8
3585 G30
LT3585-0 Switch Waveform Reduced Input Current Mode
LT3585-0 Switch Waveform Normal Input Current Mode
VSW 10V/DIV IPRI 1A/DIV
VSW 10V/DIV
IPRI 1A/DIV
VBAT = 3.6V VOUT = 100V
2s/DIV
3585 G32
VBAT = 3.6V VOUT = 300V
2s/DIV
3585 G33
Switch DC Current Limit*
10 LT3585-3 1.5 9 8 7 6 5 4 3 2 1 80
3585 G35
LT3585-0/LT3585-1/LT3585-2/ LT3585-3 Switch Breakdown Voltage
SW PIN IS RESISTIVE UNTIL BREAKDOWN VOLTAGE DUE TO INTEGRATED RESISTORS. THIS DOES NOT INCREASE QUIESCENT CURRENT OF THE PART TA = -40C TA = 25C TA = 85C
LT3585-1
0
0
10 20 30 40 50 60 70 80 90 100 SWITCH VOLTAGE (V)
3585 G36
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 PI FU CTIO S
IGBTIN (Pin 1): Logic Input for the IGBT Driver. When this pin is driven higher than 1.5V, the output goes high. When the pin is below 0.5V, the output will go low. IGBTPWR (Pin 2): Supply Pin for the IGBT Driver. Must be locally bypassed with a good quality ceramic capacitor. The minimum operating voltage for the IGBT driver is 2.5V. GND (Pin 3): Ground. Tie directly to local ground plane. VIN (Pin 4): Input Supply Pin. Must be locally bypassed with a good quality ceramic capacitor. The minimum operating voltage for VIN is 2.5V. VBAT (Pin 5): Battery Supply Pin. Must be locally bypassed with a good quality ceramic capacitor. The minimum operating voltage for VBAT is 1.5V. DONE (Pin 6): Open NPN Collector Indication Pin. When target output voltage is reached, NPN turns on. This pin needs a proper pull-up resistor or current source. CHRG/IADJ (Pin 7): Charge and Input Current Adjust Pin. A low (<0.3V) to high (>1.1V) transition on this pin puts the part into power delivery mode. Once the target output voltage is reached, the part will stop charging the output. Toggle this pin to start charging again. Ground to shut down. To enter into the input current reduction mode, the voltage on this pin should be driven high ( >1.1V ) and then floated. (For more information refer to the Operation section of this data sheet.) To enter normal mode, the voltage should be driven higher than 1.6V. SW (Pin 8): Switch Pin. This is the collector of the internal NPN Power switch. Minimize the metal trace area connected to this pin to minimize EMI. Tie one side of the primary of the transformer to this pin. The target output voltage is set by the turns ratio of the transformer. Choose turns ratio N by the following equation: N= VOUT + 2 31.5
8
U
U
U
where VOUT is the desired output voltage. IGBTPD (Pin 9): Pull-down Output for IGBT Gate. Connect this pin to the IGBT Gate. Add a series resistor to increase the turn-off time to protect the IGBT. IGBTPU (Pin 10): Pull-up Output for IGBT Gate. Connect this pin to the gate of the IGBT. Exposed Pad (Pin 11): Ground. Tie directly to local ground plane.
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 SI PLIFIED BLOCK DIAGRA
TO BATTERY C1 VIN C2 4 DONE CHIP POWER VIN 2.5V MAX 1.5V MAX 5 VBAT R2 60k DCM COMPARATOR 8 PRIMARY
*
6
SW
A5 UVLO
A4 A3
SECONDARY
Q3 MASTER LATCH Q S Q1 ENABLE UVLO
Q2
Q R
R1 2.5k
+
A2 VOUT COMPARATOR
VARIABLE DELAY DRIVER S R SWITCH Q LATCH RESET DOMINANT A1
-
1.25V REFERENCE
CHRG/IADJ 7 ONE SHOT
2
IGBTPWR
1
IGBTIN
IGBT DRIVE CIRCUITRY
Figure 1
-
+
W
D1 T1
-
+
+
-
W
*
VOUT
+
COUT
+ -
130mV
Q1
+
20mV RM GND 3
-
+-
IGBTPU IGBTPD
10 9
3585 F01
LT3585-3, RM = 12m LT3585-0, RM = 17m LT3585-2, RM = 24m LT3585-1, RM = 36m
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 OPERATIO
The LT3585 series of parts operate on the edge of discontinuous conduction mode. When CHRG/IADJ is driven higher than 1.1V, the master latch is set. This enables the part to deliver power to the photoflash capacitor. When the power switch, Q1, is turned on, current builds up in the primary of the transformer. When the desired current level is reached, the output of comparator A1 goes high, resetting the switch latch that controls the state of Q1, and the output of the DCM comparator goes low. Q1 now turns off and the flyback waveform on the SW node quickly rises to a level proportional to VOUT. The secondary current flows through high voltage diode(s), D1, and into the photoflash capacitor. When the secondary current decays to zero, the voltage on the SW node collapses. When this voltage reaches 130mV higher than VBAT, the output of A3 goes high. This sets the switch latch and the power switch, Q1, turns back on. This cycle repeats until the target VOUT level is reached. When the target VOUT is reached, the master latch resets and the DONE pin goes low. The input current of an LT3585 series circuit can be reduced by changing the voltage of the CHRG/IADJ pin. When this pin is between 1.1V and 1.4V, a time delay is
Normal Operation
CHRG/IADJ 1.6V IPRI
VSW VOUT 100V/DIV
IPRI CHRG/IADJ 2V/DIV TIME Extra Delay Added (~5.2s at VBAT = 4.2V) VSW LT3585-1 VBAT = 3.6V COUT = 50F THREE STATE* 1sec/DIV CHRG/IADJ PIN STATE 3V <0.3V 3V <0.3V
3585 F03
Figure 2. Normal and Reduced Input Current Waveforms
10
U
added between when A3 goes high and the switch latch is set, see Figure 2. If the part is enabled, and the CHRG/ IADJ pin is floated, internal circuitry drives the voltage on the pin to 1.28V. This allows a single I/O port pin, which can be three-stated, to enable or disable the part as well as place the part into the input current reduction mode. This feature effectively reduces the average input current into the flyback transformer. The magnitude of the delay decreases with increasing VBAT. This causes the reduced average input current to remain relatively flat with changes in VBAT. When CHRG/IADJ is brought higher than 1.6V, no delay is added. The CHRG/IADJ pin functionality is shown in Figure 3. Both VBAT and VIN have undervoltage lockout (UVLO). When one of these pins goes below its UVLO voltage, the DONE pin goes low. With an insufficient bypass capacitor on VBAT or VIN, the ripple on the pin is likely to activate UVLO and terminate the charge. The applications circuits in the data sheet suggest values adequate for most applications. The LT3585 series also includes an integrated IGBT driver. There are two output pins, IGBTPU and IGBTPD. The IGBTPU pin is used to pull the gate of the IGBT up. This should be done quickly to guarantee proper Xenon lamp ignition. Tie this pin directly to the gate of the IGBT. The IGBTPD pin is pinned out separately to allow for greater flexibility in choosing a series resistor between the pin and the gate of the IGBT. This resistor can be used to slow down the turn off of the IGBT.
TIME TIME
Reduced Input Current
CHRG/IADJ Three Stated DONE 2V/DIV
<0.3V
3585 F02
TIME
*MUST TAKE CHRG/IADJ PIN ABOVE 1.1V, THEN FLOAT
Figure 3. Basic Operation
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 APPLICATIO S I FOR ATIO
Choosing the Right Device (LT3585-0/LT3585-1/LT3585-2/LT3585-3) The only difference between the four versions of the LT3585 series is the peak current level. For the fastest possible charge time, use the LT3585-3. The LT3585-1 has the lowest peak current capability, and is designed for applications that need a more limited drain on the batteries. Due to the lower peak current, the LT3585-1 can use a physically smaller transformer. The LT3585-0 and LT3585-2 have a current limit in between that of the LT3585-1 and the LT3585-3. Transformer Design The flyback transformer is a key element for any LT3585-0/ LT3585-1/LT3585-2/LT3585-3 design. It must be designed carefully and checked that it does not cause excessive current or voltage on any pin of the part. The main parameters that need to be designed are shown in Table 1. The first transformer parameter that needs to be set is the turns ratio, N. The LT3585-0/LT3585-1/LT3585-2/LT3585-3 accomplish output voltage detection by monitoring the flyback waveform on the SW pin. When the SW voltage reaches 31.5V higher than the VBAT voltage, the part halts power delivery. Thus, the choice of N sets the target output voltage and changes the amplitude gain of the reflected voltage from the output to the SW pin. Choose N according to the following equation: N= VOUT + 2 31.5
where VOUT is the desired output voltage. The number 2 in the numerator is used to include the forward voltage
Table 1. Recommended Transformer Parameters
PARAMETER LPRI LLEAK N VISO ISAT RPRI RSEC NAME Primary Inductance Primary Leakage Inductance Secondary/Primary Turns Ratio Secondary to Primary Isolation Voltage Primary Saturation Current Primary Winding Resistance Secondary Winding Resistance TYPICAL RANGE LT3585-0 >5 100 to 300 8 to 12 >500 >1.6 <300 <40 TYPICAL RANGE LT3585-1 >10 200 to 500 8 to 12 >500 >0.8 <500 <80 TYPICAL RANGE LT3585-2 >7 200 to 500 8 to 12 >500 >1.0 <400 <60 TYPICAL RANGE LT3585-3 >3.5 100 to 300 8 to 12 >500 >2 <200 <30 V A m
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drop across the output diode(s). Thus, for a 320V output, N should be 322/31.5 or 10.2. For a 300V output, choose N equal to 302/31.5 or 9.6. The next parameter that needs to be set is the primary inductance, LPRI. Choose LPRI according to the following formula: VOUT * 200 * 10 - 9 LPRI N * IPK where VOUT is the desired output voltage. N is the transformer turns ratio. IPK is 1.4 (LT3585-0), 0.7 (LT3585-1), 1 (LT3585-2) and 2 (LT3585-3). LPRI needs to be equal or larger than this value to ensure that the LT3585 series has adequate time to respond to the flyback waveform. All other parameters need to meet or exceed the recommended limits as shown in Table 1. A particularly important parameter is the leakage inductance, LLEAK. When the power switch of the LT3585 series turns off, the leakage inductance on the primary of the transformer causes a voltage spike to occur on the SW pin. The height of this spike must not exceed 50V, even though the absolute maximum rating of the SW pin is 60V. The 60V absolute maximum rating is a DC blocking voltage specification, which assumes that the current in the power NPN is zero. Figure 4 shows the SW voltage waveform for the circuit of Figure 8 (LT3585-0). Note that the absolute maximum rating of the SW pin is not exceeded. Make sure to check the SW voltage waveform with VOUT near the target output voltage, as this is the worst-case condition for SW voltage. Figure 5 shows the various limits on the SW voltage during switch turn off.
UNITS H nH
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 APPLICATIO S I FOR ATIO U
Output Diode Selection The rectifying diode(s) should be low capacitance type with sufficient reverse voltage and forward current ratings. The peak reverse voltage that the diode(s) will see is approximately: VPK(R) = VOUT + (N * VBAT) The peak current of the diode is simply:
VBAT = 3.6V VOUT = 320V 100ns/DIV
3585 F04
VSW 10V/DIV
Figure 4. LT3585 SW Voltage Waveform
B A VSW MUST BE LESS THAN 60V MUST BE LESS THAN 50V
0V
3585 F05
Figure 5. New Transformer Design Check
It is important not to minimize the leakage inductance to a very low level. Although this would result in a very low leakage spike on the SW pin, the parasitic capacitance of the transformer would become large. This will adversely affect the charge time of the photoflash circuit. Linear Technology has worked with several leading magnetic component manufacturers to produce predesigned flyback transformers for use with the LT3585-0 /LT3585-1/LT3585-2/LT3585-3. Table 2 shows the details of several of these transformers.
FOR USE WITH LT3585-1 LT3585-0/ LT3585-2 LT3585-1 LT3585-0 LT3585-1 LT3585-2 LT3585-3 LT3585-0 LT3585-1 LT3585-2 LT3585-3 TRANSFORMER DESIGNATION SBL-5.6S-1 SBL-5.6-1 LDT565620ST-203 LDT565630T-001 LDT565630T-002 LDT565630T-003 LDT565630T-041 TTRN-0530-000-T TTRN-0530-012-T TTRN-0530-021-T TTRN-0530-022-T SIZE (W x L x H) (mm) 5.6 x 8.5 x 3.0 5.6 x 8.5 x 4.0 5.8 x 5.8 x 2.0 5.8 x 5.8 x 3.0 5.8 x 5.8 x 3.0 5.8 x 5.8 x 3.0 5.8 x 5.8 x 3.0 5.0 x 5.0 x 3.0 5.0 x 5.0 x 3.0 5.0 x 5.0 x 3.0 5.0 x 5.0 x 3.0 LPRI (H) 24 10 8.2 6 14.5 10.5 4.7 6.6 16.0 11.8 4.0
Table 2. Predesigned Transformers--Typical Specifications Unless Otherwise Noted
LPRI LEAKAGE (nH ) 400 Max 200 Max 390 Max 200 Max 500 Max 550 Max 150 Max 200 Max 400 Max 300 Max 300 Max N 10.2 10.2 10.2 10.4 10.2 10.2 10.4 10.3 10.3 10.3 10.3 RPRI (m) 305 103 370 Max 100 Max 240 Max 210 Max 90 Max 128 Max 515 Max 256 Max 102 Max RSEC () 55 26 11.2 Max 10 Max 16.5 Max 14 Max 6.4 Max 28 Max 32 Max 37 Max 16 Max VENDOR Kijima Musen Hong Kong Office 852-2489-8266 TDK Chicago Sales Office (847) 803-6100 www.components.tdk.com Tokyo Coil Engineering Japan Office 0426-56-6262
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IPK(SEC) = IPK(SEC) = IPK(SEC) = IPK(SEC) =
2 (LT3585-3) N 1.4 (LT3585-0) N 1 (LT3585-2) N 0.7 (LT3585-1) N
For the circuit of Figure 8 with VBAT of 5V, VPK(R) is 371V and IPK(SEC) is 137mA. The GSD2004S dual silicon diode is recommended for most applications. Table 3 shows the various diodes and relevant specifications. Use the appropriate number of diodes to achieve the necessary reverse breakdown voltage. Capacitor Selection For the input bypass capacitors, high quality X5R or X7R types should be used. Make sure the voltage capability of the part is adequate.
LT3585-0/LT3585-1 LT3585-2/LT3585-3 APPLICATIO S I FOR ATIO U
2.0 1.8 1.6 FALL TIME (s) IGBTPWR = 5V COUT = 4000pF RPD = 50 500ns/DIV
3585 F06
IGBTIN 1V/DIV
IGBTOUT 2V/DIV
Figure 6. IGBT Driver Output with 4000pF Load Table 3. Recommended Output Diodes
PART GSD2004S (DUAL DIODE) CMSD2004S (DUAL DIODE) MMBD3004S (DUAL DIODE) MAX REVERSE VOLTAGE (V) 2 x 300 MAX CONTINUOUS FORWARD CURRENT (mA) 225
2 x 300
2 x 350
IGBT Drive The IGBT is a high current switch for the 100A+ current through the photoflash lamp. To create a redeye effect or to adjust the light output, the lamp current needs to be stopped or quenched with an IGBT before discharging the photoflash capacitor fully. The IGBT device also controls the 4kV trigger pulse required to ionize the Xenon gas in the photoflash lamp. Figure 8 is a schematic of a fully functional photoflash application with the LT3585-0 serving as the IGBT driver. An IGBT driver charges the gate capacitance to start the flash. The IGBT driver does not need to pull up the gate significantly fast because of the inherently slow nature of the IGBT. A rise time of 2s is sufficient to charge the gate of the IGBT and create a trigger pulse. With slower rise times, the trigger circuitry will not have a fast enough edge to create the required 4kV pulse. The fall time of the IGBT driver is critical to the
W
UU
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 50 100 RPD () 150 200
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Figure 7. IGBT Turn-Off Delay vs RPD
CAPACITANCE (pF) 5
VENDOR Vishay (402) 563-6866 www.vishay.com Central Semiconductor (631) 435-1110 www.centralsemi.con Diodes, Inc (816) 251-8800 www.diodes.com
225
5
225
5
safe operation of the IGBT. The IGBT gate is a network of resistors and capacitors, as shown in Figure 9. When the gate terminal is pulled low, the capacitance closest to the terminal goes low but the capacitance further from the terminal remains high. This causes a smaller portion of the device to handle a larger portion of the current, which can damage the device. The pull-down circuitry needs to pull down slower than the internal RC time constant in the gate of the IGBT. This is easily accomplished with a resistor placed in series with the IGBTPD pin. The LT3585 series integrated IGBT drive circuit is independent of the charging function and draws its power from the IGBTPWR pin. The drive pulls high to within 200mV of IGBTPWR and pulls down to 100mV. The circuit's switching waveform is shown in Figure 6. The rise and fall times are measured using a 4000pF output capacitor. The typical 10% to 90% rise time is 320ns when IGBTPWR
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 APPLICATIO S I FOR ATIO
is 5V and IGBTIN is driven by a 5V signal. The typical 90% to 10% fall time is 125ns but varies with RPD given by Figure 7. The IGBT driver pulls a peak of 50mA when driving an IGBT with minimal quiescent current. In the low state, an active pull-down network is used during the initial transition but is deactivated after an internal time constant. This allows the IGBT driver's quiescent current
Table 4. Recommended IGBTs
PART CY25CAH-8F* CY25CAJ-8F* CY25BAH-8F CY25BAJ-8F GT8G133 DRIVE VOLTAGE (V) 2.5 4 2.5 4 4 BREAKDOWN VOLTAGE (V) 400 400 400 400 400 COLLECTOR CURRENT (PULSED) (A) 150 150 150 150 150 VENDOR Renesas (408) 382-7500 www.renesas.com Toshiba Semiconductor (949) 623-2900 www.semicon.toshiba.co.jp/eng
*Packaged in 8-lead VSON-8 pacakge.
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY VBAT 2 AA OR 1 TO 2 Li-Ion T1 1:10:2 C1 4.7mF 1 D1 4
VBAT DONE VIN 5V
SW GND
C3 0.22mF
CHRG/IADJ LT3585-0 VIN IGBTPWR IGBTIN IGBTPU IGBTPD RPD 20W TO 160W TO GATE OF IGBT
Figure 8. Complete Xenon Circuit
GATE
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to drop to approximately 0.1A during idle conditions. The pull-down circuit will clamp the output below 0.8V for currents not exceeding 10mA in its idle state. The pull-up network is always active when the IGBTIN is greater than 1.5V. Table 4 is a list of recommended IGBT devices for strobe applications. These devices are all packaged in 8-lead TSSOP packages unless otherwise noted.
320V R1 1M
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UU
*
2
*5
+
C2 50mF PHOTOFLASH CAPACITOR 1
C4 2.2mF 600V TRIGGER T 3 2
A
FLASHLAMP
C
3585 F08
3585 F09
EMITTER
Figure 9. IGBT Gate
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 APPLICATIO S I FOR ATIO
Board Layout The high voltage operation of these parts demand careful attention to board layout. You will not get advertised performance with careless layout. Figure 10 shows the recommended component placement. Keep the area for the high voltage end of the secondary as small as possible. Also note the larger than minimum spacing for all high voltage nodes in order to meet breakdown voltage requirements for the circuit board. It is imperative to keep the electrical path formed by C1, the primary of T1, and the LT3585 series IC as short as possible. If this path is haphazardly made long,
THERMAL VIAS
IGBTIN IGBTPWR GND VIN
*
1 2 3 4 5 11
VBAT R1 C2 GND DONE CHRG
3585 F10
Figure 10. LT3585 Suggested Layout
U
it will effectively increase the leakage inductance of T1, which may result in an overvoltage condition on the SW pin. The CHRG/IADJ pin trace should be kept as short as possible while minimizing the adjacent edge with the SW pin trace. This will eliminate false toggling of the CHRG/IADJ pin during sharp transitions on the SW pin. Thermal vias should be added underneath the Exposed Pad, Pin 11, to enhance the LT3585's thermal performance. These vias should go directly to a large area of ground plane. Acting as a heat sink, the thermal vias/ground plane will lower the device's operating temperature.
TO GATE OF IGBT VBAT C1 10 9 8 7 6 R2 T1 D1 (DUAL DIODE)
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UU
*
VOUT PHOTOFLASH CAPACITOR
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15
LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL APPLICATIO S
VBAT 1.5V TO 8V T1 1:10.4 C1 4.7F D1 320V
DONE CHARGE VIN 2.5V TO 8V
Figure 11. LT3585-0 Photoflash Charger Uses High Efficiency 3mm Tall Transformer
VBAT 1.5V TO 8V
CHARGE VIN 2.5V TO 8V
Figure 12. LT3585-1 Photoflash Charger Uses High Efficiency 2mm Tall Transformer
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* *
+
COUT PHOTOFLASH CAPACITOR
R1 100k
VBAT DONE
SW GND
C2 0.22F
CHRG/IADJ LT3585-0 VIN IGBTPWR IGBTIN IGBTPU IGBTPD R2 20 TO 160 TO GATE OF IGBT
3585 F11
C1: 4.7F, 10V, X5R OR X7R C2: 0.22F, 10V, X5R OR X7R COUT: RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES) D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED T1: TDK LDT565630T-001, LPRI = 6H, N = 10.4
T1 1:10.2 C1 4.7F
D1 320V
* *
+
COUT PHOTOFLASH CAPACITOR
R1 100k DONE
VBAT DONE
SW GND
C2 0.22F
CHRG/IADJ LT3585-1 VIN IGBTPWR IGBTIN IGBTPU IGBTPD R2 20 TO 160 TO GATE OF IGBT
3585 F12
C1: 4.7F, 10V, X5R OR X7R C2: 0.22F, 10V, X5R OR X7R COUT: RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES) D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED T1: LTD565620ST-203, LPRI = 8.2H, N = 10.2
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL APPLICATIO S
VBAT 1.5V TO 8V T1 1:10.2 C1 4.7F D1 320V
CHARGE VIN 2.5V TO 8V
Figure 13. LT3585-2 Uses High Efficiency 3mm Tall Transformers
VBAT 1.5V TO 8V
DONE CHARGE VIN 2.5V TO 8V
Figure 14. LT3585-3 Uses High Efficiency 3mm Tall Transformers
U
* *
+
COUT PHOTOFLASH CAPACITOR
R1 100k DONE
VBAT DONE
SW GND
C2 0.22F
CHRG/IADJ LT3585-2 VIN IGBTPWR IGBTIN IGBTPU IGBTPD R2 20 TO 160 TO GATE OF IGBT
3585 F13
C1: 4.7F, 10V, X5R OR X7R C2: 0.22F, 10V, X5R OR X7R RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES) D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED T1: TDK LDT565630T-003, LPRI = 10.5H, N = 10.2
T1 1:10.4 C1 4.7F
D1 320V
* *
+
COUT PHOTOFLASH CAPACITOR
R1 100k
VBAT DONE
SW GND
C2 0.22F
CHRG/IADJ LT3585-3 VIN IGBTPWR IGBTIN IGBTPU IGBTPD R2 20 TO 160 TO GATE OF IGBT
3585 F14
C1: 4.7F, 10V, X5R OR X7R C2: 0.22F, 10V, X5R OR X7R RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES) D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED T1: TDK LDT565630T-041, LPRI = 4.7H, N = 10.4
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL APPLICATIO S
The LT3585 series can be auto-refreshed using the additional circuitry shown in Figure 15 with its basic operation shown in Figure 16. The ENABLE pin is used to enable or disable the auto-refresh charging mode. Without an auto-refresh circuit, the output voltage will droop due to output capacitor and output diode leakage currents. The circuit in Figure 15 uses the DONE and CHRG/IADJ pins to form an open-loop control scheme. The output voltage target is sensed through the DONE pin with the PFET of U1, Panasonic UP04979 composite transistor. When the
ENABLE TO CHRG/IADJ 6 U1 5 R1 5k 1/10W 0402 4 R3 100k 1/10W 0402
1
2 RT 100k
3 CT 0.1mF
3585 F15
U1: PANASONIC UP04979 COMPOSITE TRANSISTORS
Figure 15. Auto Refresh Application
VOUT 100V/DIV
CHRG/IADJ 2V/DIV
ENABLE 2V/DIV LT3585-1 COUT = 50F 2sec/DIV LT3585-1 COUT = 50F 200ms/DIV
3585 F17
ENABLE > 1.1V AUTO ENABLE ENABLE NORMAL OP. REFRESH <0.3V >1.1V ENABLE < 0.3V ENABLE < 0.3V
3585 F16
Figure 16. Auto Refresh Basic Operation
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DONE pin goes low during the VOUT trip condition, the PFET charges the auto-refresh timing node comprised of RT and CT, and in turn, pulls the CHRG/IADJ pin low through a NFET and disables the LT3585 series part. The DONE pin immediately goes high in shutdown, releasing the timing node and allowing the voltage at Pins 2 and 3 to decay. After approximately a RTCT time constant, the CHRG/IADJ pin is released and the LT3585 series part is enabled. This cycle is repeated to maintain a constant DC output voltage. The open-loop control method places a constraint on the control loop dominant time constant, RT * CT, given by: R TC T > 2 * IPK 2 * LPRI ILK * VBAT
VIN
TO DONE
where ILK is the known leakage current, IPK is the transformer peak primary current, and LPRI is the transformer primary inductance. If this condition is not met, a runaway condition could occur. The LT3585 series part would continue to charge the output voltage past the internal output trip voltage. Figure 17 shows the AC ripple of a typical auto-refresh circuit with the proper selection of RT and CT.
VOUT 2V/DIV AC RIPPLE
CHRG/IADJ 2V/DIV
Figure 17. VOUT AC Ripple in Auto Refresh Mode
AUTO REFRESH
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LT3585-0/LT3585-1 LT3585-2/LT3585-3 PACKAGE DESCRIPTIO U
DDB Package 10-Lead Plastic DFN (3mm x 2mm)
(Reference LTC DWG # 05-08-1722 Rev O)
0.64 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.39 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 3.00 0.10 (2 SIDES) R = 0.05 TYP 0.40 0.10 10 2.00 0.10 (2 SIDES) 0.64 0.05 (2 SIDES) 5 0.25 0.05 2.39 0.05 (2 SIDES) BOTTOM VIEW--EXPOSED PAD 1 PIN 1 R = 0.20 OR 0.25 x 45 CHAMFER
(DDB10) DFN 0905 REV O
PIN 1 BAR TOP MARK (SEE NOTE 6)
0.200 REF
0.75 0.05
0.50 BSC
0 - 0.05
NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3585-0/LT3585-1 LT3585-2/LT3585-3 TYPICAL APPLICATIO U
T1 1:10.3 C1 4.7F D1 320V
VBAT 1.5V TO 8V
* *
+
COUT PHOTOFLASH CAPACITOR
R1 100k DONE CHARGE VIN 2.5V TO 8V
VBAT DONE
SW GND
C2 0.22F
CHRG/IADJ LT3585-3 VIN IGBTPWR IGBTIN IGBTPU IGBTPD R2 20 TO 160 TO GATE OF IGBT
3585 F18
C1: 4.7F, 10V, X5R OR X7R C2: 0.22F, 10V, X5R OR X7R COUT: RUBYCON 330V, 50F PHOTOFLASH OUTPUT CAPACITOR (FW SERIES) D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED T1: TOKYO COIL TTRN-0530-022-T, LPRI = 4H, N = 10.3
Figure 18. LT3585-3 Typical Application
RELATED PARTS
PART NUMBER LTC(R)3407 LT3420/LT3420-1 DESCRIPTION Dual 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 1.4A/1A, Photoflash Capacitor Chargers with Charges Automatic Top-Off 3A (IOUT), 8MHz, 4-Phase Synchronous Step-Up DC/DC Converter 600mA (IOUT), Synchronous Buck-Boost DC/DC Converter Dual Boost (250mA)/Inverting (250mA/400mA) DC/DC Converter for CCD Bias Photoflash Capacitor Charger in ThinSOTTM Package Dual 34V, 1.2MHz Boost (350mA)/Inverting (400mA) DC/DC Converter for CCD Bias Photoflash Capacitor Chargers COMMENTS 96% Efficiency, VIN: 2.5V to 5.5V, VOUT: 0.6V to 5V, IQ = 40A, Converter ISD <1A, 10-Lead MSE/10-Lead DFN Packages Charges 220F to 320V in 3.7 Seconds from 5V, Automatic Top-Off VIN: 2.2V to 16V, IQ = 90A, ISD < 1A, 10-Lead MS/10-Lead DFN Packages 95% Efficiency, VIN: 0.5V to 4.5V, VOUT: 2.4V to 5.25V, IQ = 12A, ISD < 1A, 32-Lead 5mm x 5mm QFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT: 2.5V to 5.5V, Converter IQ = 25A, ISD < 1A, 10-Lead MS/10-Lead DFN Packages Integrated Schottkys, VIN: 2.4V to 15V, VOUT(MAX) = 40V, DC/DC Converter for CCD Bias, IQ = 40A, ISD < 1A, 10-LeadDFN Package Charges 100F to 320V in 4.6 Seconds from 3.6V, VIN: 2.5V to 16V, IQ = 5mA, ISD < 1A, 5-Lead TSOT-23 Package Integrated Schottkys, VIN: 2.2V to 16V, VOUT(MAX) = 34V, DC/DC Converter for CCD Bias IQ = 2.8mA, ISD < 1A, 10-Lead DFN Package Charges 100F to 320V in 4.6 Seconds from 3.6V, LT3484-0 VIN: 2.5V to 16V, VBAT: 1.8V to 16V, IQ = 5mA, ISD < 1A, 6-lead 2mm x 3mm DFN Package Charges 100F Capacitor to 320V in 2.5 Seconds from 3.6V. VIN: 1.8V to 10V, IQ = 5mA, ISD < 1A, 10-Lead 3mm x 3mm DFN Package
LTC3425 LTC3440 LT3463/LT3463A LT3468 LT3472 LT3484-0/LT3484-1 LT3484-2 LT3485-0/LT3485-1 LT3485-2/LT3485-3
Photoflash Capacitor Charger with Output Voltage Monitor and Integrated IGBT Drive
ThinSOT is a trademark of Linear Technology Corporation.
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20 Linear Technology Corporation
(408) 432-1900
LT 0706 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
FAX: (408) 434-0507 www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2006

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