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| 0.8 CMOS, 2.3 V to 5.5 V, SPDT/2:1 Mux Mini LFCSP ADG852 FEATURES 0.8 typical on resistance Less than 1 maximum on resistance at 85C 2.3 V to 5.5 V single supply High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast-switching times: <17 ns Typical power consumption: <0.1 W 1.30 mm x 1.60 mm, 10-lead mini LFCSP FUNCTIONAL BLOCK DIAGRAM ADG852 S1 D S2 IN APPLICATIONS Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems NOTES 1. SWITCHES SHOWN FOR A LOGIC 1 INPUT. Figure 1. GENERAL DESCRIPTION The ADG852 is a low voltage CMOS single-pole, double-throw (SPDT) switch. This device offers ultralow on resistance of less than 1 over the full temperature range. The ADG852 is fully specified for 5.5 V and 3.3 V supply operation. Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. The ADG852 exhibits break-before-make switching action. The ADG852 is available in a 1.30 mm x 1.60 mm 10-lead mini LFCSP. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. <1 over full temperature range of -40C to +85C. Single 2.3 V to 5.5 V operation. Compatible with 1.8 V CMOS logic. High current handling capability (300 mA continuous current per channel). Low THD + N: 0.08% typical. 1.30 mm x 1.60 mm, 10-lead mini LFCSP. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2008 Analog Devices, Inc. All rights reserved. 07461-001 ADG852 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution...................................................................................5 Pin Configuration and Function Description ...............................6 Typical Performance Characteristics ..............................................7 Test Circuits ..................................................................................... 10 Terminology .................................................................................... 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13 REVISION HISTORY 8/08--Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADG852 SPECIFICATIONS VDD = 4.2 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD + N Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD +25C -40C to +85C 0 V to VDD 0.8 0.85 0.02 0.17 0.23 10 30 2.0 0.8 0.002 0.05 2.5 17 23 6 8.5 14 30 -75 -73 0.08 -0.6 100 19.5 50 0.002 1.0 1 Unit V typ max typ max typ max pA typ pA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16 VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA VDD = 5.5 V VS = 0.6 V/4.2 V, VD = 4.2 V/0.6 V; see Figure 17 VS = VD = 0.6 V or 4.2 V; see Figure 18 1 0.04 VIN = VGND or VDD 28 9.2 8 RL = 50 , CL = 35 pF VS = 3 V/0 V; see Figure 19 RL = 50 , CL = 35 pF VS = 3 V; see Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; see Figure 20 VS = 1.5 V, RS = 0 , CL = 1 nF; see Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 22 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 24 RL = 32 , f = 20 Hz to 20 kHz, VS = 3.5 V p-p RL = 50 , CL = 5 pF; see Figure 23 RL = 50 , CL = 5 pF; see Figure 23 VDD = 5.5 V Digital inputs = 0 V or 5.5 V Guaranteed by design, not subject to production test. Rev. 0 | Page 3 of 16 ADG852 VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS 1 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion, THD Insertion Loss -3 dB Bandwidth CS (Off ) CD, CS (On) POWER REQUIREMENTS IDD +25C -40C to +85C 0 V to VDD 1.3 1.5 0.03 0.48 0.66 10 30 1.35 0.7 0.002 0.05 4 25 37 7 7.4 22 23 -75 -73 0.15 -0.07 100 20 52 0.002 1.0 1 Unit V typ max typ max typ max pA typ pA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ % dB typ MHz typ pF typ pF typ A typ A max Test Conditions/Comments VDD = 2.7 V, VS = 0 V to VDD, IDS = 100 mA; see Figure 16 VDD = 2.7 V, VS = 0.6 V, IDS = 100 mA VDD = 4.2 V, VS = 0 V to VDD, IDS = 100 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; see Figure 17 VS = VD = 0.6 V or 3.3 V; see Figure 18 1.7 0.05 VIN = VGND or VDD 43 8 13 RL = 50 , CL = 35 pF VS = 1.5 V/0 V; see Figure 19 RL = 50 , CL = 35 pF VS = 1.5 V; see Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1 V; see Figure 20 VS = 1.5 V, RS = 0 V, CL = 1 nF; see Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 22 RL = 50 , CL = 5 pF, f = 100 kHz; see Figure 24 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p RL = 50 , CL = 5 pF; see Figure 23 RL = 50 , CL = 5 pF; see Figure 23 VDD = 3.6 V Digital inputs = 0 V or 3.6 V Guaranteed by design, not subject to production test. Rev. 0 | Page 4 of 16 ADG852 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 3. Parameter VDD to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D Pins Continuous Current, S or D Pins Operating Temperature Range Storage Temperature Range Junction Temperature Mini LFCSP JA Thermal Impedance, 3-Layer Board Reflow Soldering, Pb-Free Peak Temperature Time at Peak Temperature 1 Rating -0.3 V to +6 V -0.3 V to VDD + 0.3 V -0.3 V to VDD + 0.3 V or 10 mA, whichever occurs first 500 mA (pulsed at 1 ms, 10% duty cycle max) 300 mA -40C to +85C -65C to +150C 150C 131.6C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating can be applied at any one time. ESD CAUTION 260(+0/-5)C 10 sec to 40 sec Overvoltages at the IN, S, or D pins are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. 0 | Page 5 of 16 ADG852 PIN CONFIGURATION AND FUNCTION DESCRIPTION 10 GND 9 NC 1 S1 D2 S2 3 ADG852 8 NC 7 NC TOP VIEW (Not to scale) IN 4 VDD 5 VDD 6 NC = NO CONNECT Figure 2. Pin Configurations Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5, 6 7, 8, 9 10 Mnemonic S1 D S2 IN VDD N/C GND Description Source Terminal. Can be an input or output. Drain Terminal. Can be an input or output. Source Terminal. Can be an input or output. Logic Control Input. Most Positive Power Supply Potential. No Connect. Ground (0 V) Reference. Table 5. ADG852 Truth Table Logic 0 1 Switch 1 Off On Switch 2 On Off Rev. 0 | Page 6 of 16 07461-002 ADG852 TYPICAL PERFORMANCE CHARACTERISTICS 0.9 TA = 25C 0.8 1.0 0.7 1.2 VDD = 3.3V TA = +85C TA = +25C 0.8 TA = -40C ON RESISTANCE () 0.6 0.5 0.4 0.3 0.2 0.1 07461-003 ON RESISTANCE () 0.6 VDD VDD VDD VDD = 4.2V = 4.5V = 5.0V = 5.5V 0.4 0.2 0 1 2 3 VD, VS (V) 4 5 6 0 0.5 1.0 1.5 VD, VS (V) 2.0 2.5 3.0 Figure 3. On Resistance vs. VD (VS), VDD = 4.2 V to 5.5 V 1.6 TA = 25C 1.4 1.2 Figure 6. On Resistance vs. VD (VS) for Different Temperatures, VDD = 3.3 V 1.1 VDD = 5V 0.9 ON RESISTANCE () 1.0 0.8 0.6 0.4 0.2 07461-004 LEAKAGE (nA) 0.7 0.5 ID, ID, ID, ID, IS (ON) ++ IS (OFF) +- IS (ON) - - IS (OFF) -+ VDD VDD VDD VDD = 2.7V = 3.0V = 3.3V = 3.6V 0.3 0.1 0 0.5 1.0 1.5 2.0 VD, VS (V) 2.5 3.0 3.5 4.0 20 30 40 50 60 70 80 TEMPERATURE (C) Figure 4. On Resistance vs. VD (VS), VDD = 2.7 V to 3.6 V 0.9 0.8 0.7 TA = +85C 0.6 Figure 7. Leakage Current vs. Temperature, VDD = 5 V 0.8 VDD = 3.3V VDD = 5V ON RESISTANCE () LEAKAGE (nA) 0.6 0.5 0.4 0.3 0.2 0.1 TA = +25C 0.4 TA = -40C ID, ID, ID, ID, IS (ON) ++ IS (OFF) +- IS (ON) - - IS (OFF) -+ 0.2 0 07461-005 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 10 20 30 40 50 60 70 80 VD, VS (V) TEMPERATURE (C) Figure 5. On Resistance vs. VD (VS) for Different Temperatures, VDD = 5 V Figure 8. Leakage Current vs. Temperature, VDD = 3.3 V Rev. 0 | Page 7 of 16 07461-008 0 -0.2 07461-007 0 -0.1 10 07461-006 0 0 ADG852 70 VDD = 5V 60 CHARGE INJECTION (pC) 0 -10 -20 ATTENUATION (dB) TA = 25C VDD = 5V, 3.3V 50 40 30 20 10 0 VDD = 3V VDD = 2.5V 07461-009 -30 -40 -50 -60 -70 -80 1 10 FREQUENCY (MHz) 100 1k 07461-012 0 1 2 3 4 5 6 -90 0.1 SOURCE VOLTAGE (V) Figure 9. Charge Injection vs. Source Voltage 35 30 25 TIME (ns) Figure 12. Off isolation vs. Frequency 0 -10 -20 CROSSTALK (dB) TA = 25C VDD = 5V, 3.3V S1 to S2 tON (3.3V) -30 -40 -50 -60 -70 -80 20 tON (5V) 15 10 5 0 -60 tOFF (5V) 07461-010 tOFF (3.3V) -40 -20 0 20 40 60 80 TEMPERATURE (C) -90 1 10 FREQUENCY (MHz) 100 1k 07461-013 100 -100 0.1 Figure 10. tON/tOFF Times vs. Temperature 0 -2 Figure 13. Crosstalk vs. Frequency 0.25 0.20 INSERTION LOSS (dB) -4 -6 -8 -10 -12 -14 07461-011 VDD = 3.6V THD + N (%) 0.15 VDD = 4.2V 0.10 VDD = 5.5V TA = 25C VDD = 5V, 3.3V 0.05 1 10 FREQUENCY (MHz) 100 1k 1k 10k FREQUENCY (Hz) 100k Figure 11. Bandwidth Figure 14. Total Harmonic Distortion + Noise (THD+N) vs. Frequency Rev. 0 | Page 8 of 16 07461-014 -16 0.1 0 100 ADG852 0 -20 -40 PSRR (dB) -60 -80 -100 -120 07461-015 TA = 25C VDD = 5V, 3.3V -140 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 1G Figure 15. PSSR vs. Frequency Rev. 0 | Page 9 of 16 ADG852 TEST CIRCUITS IDS IS (OFF) A VS S D ID (OFF) A 07461-020 V1 S D VD 07461-019 VS RON = V1/IDS Figure 16. On Resistance Figure 17. Off Leakage VD Figure 18. On Leakage VDD 0.1F VDD VS S1B S1A D RL 50 GND VOUT CL 35pF VOUT 90% 90% 07461-022 VIN 50% 50% IN tON tOFF Figure 19. Switching Times, tON, tOFF 0.1F VDD VDD VS S1B S1A D RL IN GND 50 VOUT CL 35pF VIN VOUT 0V 50% 50% 80% 80% tBBM tBBM 07461-023 Figure 20. Break-Before-Make Time Delay, tBBM VDD SWITCH ON S1B S1A IN GND 1nF VOUT VOUT 07461-024 SWITCH OFF VIN NC VOUT VS D QINJ = CL x VOUT Figure 21. Charge Injection Rev. 0 | Page 10 of 16 07461-021 NC S D ID (ON) A ADG852 VDD 0.1F NETWORK ANALYZER 50 VS VOUT 07461-025 VDD 0.1F NETWORK ANALYZER VOUT S1 RL 50 50 VS GND D VDD VDD NC S1B D S1A 50 S2 RL 50 GND RL 50 OFF ISOLATION = 20 log VOUT VS CHANNEL-TO-CHANNEL CROSSTALK = 20 log VOUT VS Figure 22. Off Isolation Figure 24. Channel-to-Channel Crosstalk (S1 toS2) 0.1F VDD VDD NETWORK ANALYZER 50 VS VOUT S1B S1A D GND RL 50 INSERTION LOSS = 20 log VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 23. Bandwidth 07461-026 Rev. 0 | Page 11 of 16 07461-027 ADG852 TERMINOLOGY IDD Positive supply current. VD (VS) Analog voltage on Terminal D and Terminal S. RON Ohmic resistance between Terminal D and Terminal S. RFLAT (On) The difference between the maximum and minimum values of on resistance as measured on the switch. RON On resistance match between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection Measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation Measure of unwanted signal coupling through an off switch. Crosstalk Measure of unwanted signal that is coupled from one channel to another as a result of parasitic capacitance. -3 dB Bandwidth Frequency at which the output is attenuated by 3 dB. Insertion Loss The loss due to the on resistance of the switch. THD + N Ratio of the harmonics amplitude plus noise of a signal to the fundamental. Rev. 0 | Page 12 of 16 ADG852 OUTLINE DIMENSIONS 0.20 DIA TYP 1.30 0.55 0.40 0.30 1.60 0.40 BSC TOP VIEW 0.60 0.55 0.50 0.20 BSC PIN 1 IDENTIFIER 9 1 6 4 0.35 0.30 0.25 BOTTOM VIEW 0.05 MAX 0.02 NOM 033007-A SEATING PLANE Figure 25. 10-Lead Lead Frame Chip Scale Package [LFCSP_UQ] 1.30 mm x 1.60 mm Body, Ultrathin Quad (CP-10-10) Dimensions shown in millimeters ORDERING GUIDE Model ADG852BCPZ-R21 ADG852BCPZ-REEL1 ADG852BCPZ-REEL71 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 10-Lead Mini Lead Frame Chip Scale Package (LFCSP_UQ) 10-Lead Mini Lead Frame Chip Scale Package (LFCSP_UQ) 10-Lead Mini Lead Frame Chip Scale Package (LFCSP_UQ) Package Option CP-10-10 CP-10-10 CP-10-10 Branding F F F Z = RoHS Compliant Part. Rev. 0 | Page 13 of 16 ADG852 NOTES Rev. 0 | Page 14 of 16 ADG852 NOTES Rev. 0 | Page 15 of 16 ADG852 NOTES (c)2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07461-0-8/08(0) Rev. 0 | Page 16 of 16 |
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