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TFBS5700
Vishay Semiconductors
Fast Infrared Transceiver Module (MIR, 1.152 Mbit/s) for IrDA(R) and Remote Control Applications
Description
The TFBS5700 is a low profile infrared transceiver module compliant to the latest IrDA physical layer standard for fast infrared data communication, supporting IrDA speeds up to 1.152 Mbit/s (MIR) and carrier based remote control modes up to 2 MHz. The transceiver module consists of a PIN photodiode, an infrared emitter (IRED), and a low-power control IC to provide a total font-end solution in a single package.
20207
Features
* IrDA IrPHY 1.4 compliant 9.6 kbit/s to 1.152 Mbit/s range > 50 cm, exceeding the low e4 power standard * Wide operating voltage range 2.4 V to 3.6 V * I/O compatible to 1.8 V logic voltage * Low power consumption Supply current in receive mode, Idle: 550 A * Small package L 6.8 mm x W 2.8 mm x H 1.6 mm * Remote control transmitter operation - Typical range 12 m * Emitter wavelength: 886 nm - suited for Remote Control * High immunity to fluorescence light * High EMI immunity > 200 V/m (700 MHz to 2100 MHz) * Lead (Pb)-free device * Qualified for lead (Pb)-free and Sn/Pb processing (MSL4) * Device in accordance with RoHS 2002/95/EC and WEEE 2002/96EC
Applications
* Mobile phone * Smart phone * PDAs * POS Terminals/Vending * Battery Operated IrDA applications
Parts Table
Part TFBS5700-TR3 Description Oriented in carrier tape for side view surface mounting Qty/Reel 2500 pcs
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Document Number 84670 Rev. 2.1, 25-Sep-06
TFBS5700
Vishay Semiconductors Functional Block Diagram
VCC
PD Amplifier Comparator Tri-state Driver
RXD
IRED
IREDA
SD TXD
ASIC
Mode Control
IRED Driver
GND
19291
Pin Description
Pin Number 1 2 Function IRED A TXD Description IRED anode, VCC2 This Schmitt-Trigger input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the TXD pin is asserted for longer than 80 s. When used in conjunction with the SD pin, this pin is also used to control receiver output pulse duration. The input threshold voltage adapts to and follows the internal logic voltage reference of 1.8 V Received Data Output, push-pull CMOS driver output capable of driving standard CMOS or TTL loads. No external pull-up or pull-down resistor is required. Floating with a weak pull-up of 500 k (typ.) in shutdown mode. The voltage swing is defined by the internal Vlogic voltage of 1.8 V Shutdown. Also used for setting the output pulse duration. Setting this pin active for more than 1.5 ms places the module into shutdown mode. Before that (t < 0.7 ms) on the falling edge of this signal, the state of the TXD pin is sampled and used to set the receiver output to long pulse duration (2 s) or to short pulse duration (0.4 s) mode. The input threshold voltage adapts to and follows the internal logic voltage reference of 1.8 V Power Supply. Receives power supply 2.4 V to 3.6 V. This pin provides power for the receiver and transmitter drive section. Ground I HIGH I/O Active
3
RXD
O
LOW
4
SD
I
HIGH
5 6
VCC GND
Pinout
TFBS5700, bottom view weight 33 mg
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhY 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s MIR and FIR were implemented with IrPhY 1.1, followed by IrPhY 1.2, adding the SIR Low Power Standard. IrPhY 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhY 1.4. A new version of the standard in any case obsoletes the former version.
19290
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TFBS5700
Vishay Semiconductors Absolute Maximum Ratings
Reference point Pin, GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage range, transceiver Supply voltage range, transmitter Voltage at all I/O pins Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Average output current Repetitive pulse output current Virtual source size Maximum Intensity for Class 1 < 90 s, ton < 20 % Method: (1-1/e) encircled energy IEC60825-1 or EN60825-1, edition Jan. 2001 Method: Human body model See section "Recommended Solder Profile" IIRED (DC) IIRED (RP) d Ie 0.8
*)
Test Conditions 0 V < VCC2 < 6 V 0 V < VCC1 < 6 V
Symbol VCC1 VCC2
Min - 0.5 - 0.5 - 0.5
Typ.
Max 6 6.5 5.5 350 125
Unit V V V mW C C C C mA mA mm mW/sr
See derating curve Note: Internal protection above 125 ASIC temperature
PD TJ Tamb Tstg - 30 - 40
+ 85 + 100 260 125 500
(500)**)
ESD protection ESD protection on all pins Latch up
*)
d d
1 | 100|
kV mA
Due to the internal limitation measures the device is a "class1" device IrDA specifies the max. intensity with 500 mW/sr
**)
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TFBS5700
Vishay Semiconductors Electrical Characteristics Transceiver
Tamb = 25 C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage Dynamic Supply current Idle, dark ambient Receiving Shutdown supply current Dark ambient Shutdown supply current at maximum operating temperature Operating temperature range Output voltage low Output voltage high Output voltage high RXD to internal Vlogic impedance Input voltage low (TXD, SD) Input voltage high (TXD, SD) Input leakage current (TXD, SD) *) SD mode programming pulse width Input capacitance (TXD, SD)
*)
Test Conditions
Symbol VCC
Min 2.4
Typ.
Max 3.6
Unit V A mA
SD = Low (< 0.8 V), Ee = 0 klx SD = Low, 1 Mbit/s, Ee = 100 mW/m2 SD = High (> VCC1 - 1.3 V), T = 25 C, Ee = 0 klx T = 25 C SD = High, (> VCC1 - 1.3 V), T = 85 C
ICC ICC ISD
550 0.75
900
0.01 ISD
1.0 5.0
A A
TA IOL = 0.5 mA, Cload = 15 pF IOH = - 250 A, Cload = 15 pF IOH = 0 A, Cload = 15 pF SD = active, pull-up in shutdown VOL VOH VOH RRXD VIL VIH Vin = 0.9 x VCC1 IS-SD, IIN-SD tSDPW CI
- 25 1.44
+ 85 0.4 1.98
C V V V k V V A s pF
400 - 0.5 1.3 - 1.1 0.2
500
800 0.5
1.8 4
2.2 10 300 5
Decision level 0.9 V
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TFBS5700
Vishay Semiconductors Optoelectronic Characteristics Receiver
Tamb = 25 C, VCC = 2.4 V to 3.6 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Minimum irradiance Ee in angular range **) SIR mode Minimum irradiance Ee in angular range **) MIR mode Maximum irradiance Ee in angular range ***) Logic LOW receiver input irradiance *) Test Conditions 9.6 kbit/s to 115.2 kbit/s = 850 nm to 900 nm 1.152 Mbit/s = 850 nm to 900 nm = 850 nm to 900 nm According to IrDA appendix A1, fluorescent light specification Symbol Ee Min Typ. 50 (5) 50 (5) 5 (500) 4 (0.4) 300 400 500 Max 81 (8.1) 140 (14) Unit mW/m2 (W/cm2) mW/m2 (W/cm2) kW/m2 (mW/cm2) mW/m2 (W/cm2) ns
Ee
Ee Ee
Input pulse length RXD pulse width of output signal, dafault mode after power TWopt > 200 ns on or reset Rise time of output signal Fall time of output signal
1):
10 % to 90 %, CL = 15 pF 90 % to 10 %, CL = 15 pF
tr (RXD) tf (RXD) tPW
10 10 1.7
27 17 2.0
60 60 2.9
ns ns s
Input pulse length SIR ENDEC compatility mode RXD pulse width of output signal TWopt > 200 ns, see chapter "Programming" Stochastic jitter, leading edge Stochastic jitter, leading edge Standby/shutdown delay Input irradiance = 150 mW/m2, 1.152 Mbit/s, 576 kbit/s Input irradiance = 150 mW/m2, 115.2 kbit/s after shutdown active or (SD low to high transition)
70 350 0.6 1.5 600
ns ns ms s
Shutdown active time window for During this time the pulse programming duration of the output can be programmed to the application mode. see chapter "Programming" Receiver start up time, Power on delay Shutdown recovery delay Latency Note: All timing data measured with 4 Mbit/s are measured using the The data given here are valid 5 s after starting the preamble.
*)
After shutdown inactive (SD high to low transition) and power-on tL IrDA(R) FIR transmission header. 50
250
s
200
s
This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent lamps
**)
IrDA sensitivity definition: Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER specification while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length. Maximum Irradiance Ee In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER) specification. For more definitions see the document "Symbols and Terminology" on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf).
***)
Some ENDECs are not able to decode short pulses as valid SIR pulses. Therefore this additional mode was added in TFBS5700. TFBS5700 is set to the "short output pulse" as default after power on, also after recovering from the shutdown mode (SD must have been longer active than 1.5 ms). For mode changing see the chapter "Programming".
1)
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TFBS5700
Vishay Semiconductors Transmitter
Tamb = 25 C, VCC = 2.4 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Recommended IRED operating peak current **) Output leakage IRED current Test Conditions The IRED current must be controlled by an external resistor TXD = 0 V, Tamb = 25 C TXD = 0 V, Tamb = 85 C Symbol ID Min Typ. 200 Max 600 Unit mA
IIRED Ie 25
200 1 60 500
pA A mW/sr
Output radiant intensity, s. figure a = 0, 15, TXD = High, SD = 3, recommended appl. circuit Low, VCC1 = 2.5 V, VCC2 = 2.9 V, Rs = 4.7 Output radiant intensity VCC1 = 5.0 V, = 0, 15 TXD = Low, SD = High (Receiver is inactive as long as SD = High)
Ie
0.04
mW/sr
Peak - emission wavelength *) Optical spectral bandwidth Optical rise time, Optical fall time Optical output pulse duration Input pulse width 217 ns, 1.152 Mbit/s Input pulse width t < 80 s Input pulse width t 80 s Optical overshoot
p tropt, tfopt topt topt topt
880 45 10 180 217
900 40 240 tTXD 85 25
nm nm ns ns s s %
*) Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the standard Remote Control applications with codes as e.g. Philips RC5/RC6(R) or RECS 80. When operated under IrDA full range conditions (> 120 mW/sr) the RC range to be covered is in the range from 8 m to 12 m, provided that state of the art remote control receivers are used. **) Typ. conditions for If = 200 mA, VCC2 = 2.9 V, Rs = 4.7
Table 1. Truth table
Inputs SD high < 600 s high > 1.5 ms low low low TXD x Optical input Irradiance mW/m2 x RXD weakly pulled (500 k) to VCC1 weakly pulled (500 k) to VCC1 low (active) high inactive high inactive Outputs Transmitter 0 Remark Operation Time window for pulse duration setting Shutdown Transmitting Protection is active Ignoring low signals below the IrDA defined threshold for noise immunity Response to an IrDA compliant optical input signal Overload conditions can cause unexpected outputs
x high high > 80 s low
x x x <4
0 Ie 0 0
low
low
> Min. irradianceEe < Max. irradiance Ee > Max. irradiance Ee
low (active)
0
low
low
undefined
0
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TFBS5700
Vishay Semiconductors Recommended Circuit Diagram
Operated at a clean low impedance power supply the TFBS5700 needs only one additional external component for setting the IRED drive current. However, depending on the entire system design and board layout, additional components may be required (see figure 1). a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (TXD, SD) and the output RXD should be directly (DC) coupled to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages VCCx and injected noise. An unstable power supply with dropping voltage during transmission may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver power supply pins. In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not able to follow the fast current is rise time. In that case another 10 F (type, see table under C1) at VCC2 will be helpful. Keep in mind that basic RF-design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Wienfield Hill, 1989, Cambridge University Press, ISBN: 0521370957.
V cc2 V cc1 GND SD TXD RXD C1
R1 R2 C2
IRED Anode V cc Ground SD TXD RXD
19297
Figure 1. Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a small ceramic version or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is only necessary for setting the IRED drive current. Vishay transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs Table 2. Recommended Application Circuit Components
Component C1, C2 R1 R2 Recommended Value 0.1 F, Ceramic Vishay part# VJ 1206 Y 104 J XXMT 2.9 V to 5.4 V supply voltage VCC2: add a resistor in series, e.g. 4.7 47 , 0.125 W (VCC1 2.5 V)
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TFBS5700
Vishay Semiconductors I/O and Software
In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application.
Simplified Method
Setting the device to the long pulse duration is nothing else than a short active SD pulse of less than 600 s. In any case a short SD pulse will force the device to leave the default mode and go the compatibility mode. Backwards also an active SD can be used to fall back into the default mode by applying that signal for a minimum of 1.5 ms. That causes a power-onreset and sets the device to the default short pulse mode. This simplified method takes more time but may be easier to handle.
Programming Pulse duration Switching
After Power-on the TFBS5700 is in the default short pulse duration mode. Some ENDECs are not able to decode short pulses as valid SIR pulses. Therefore an additional mode with an extended pulse duration as in standard SIR transceivers was added in TFBS5700. TFBS5700 is set to the "short output pulse" as default after power on, also after recovering from the shutdown mode (SD must have been longer active than 1.5 ms). For mode changing see the following. To switch the transceivers from the short pulse duration mode to the long pulse duration mode and vice versa, the programming sequences described below are required.
SD
50 %
ts TXD 50 %
th High : FIR 50 % Low : SIR
Setting to the ENDEC compatibility mode with an RXD pulse duration of 2 s
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "LOW". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. TXD must be held for th 200 ns. After waiting th 200 ns TXD. TXD is now enable as normal TXD input for the longer RXD - pulse duration mode.
Figure 2. Mode Switching Timing Diagram
14873
Setting back to the default mode with 400 ns RXD-output pulse duration
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "HIGH". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. After waiting th 200 ns TXD is limited by the maximum allowed pulse length. TXD is now enabled as normal TXD input. The timing of the pulse duration changing procedure is quite uncritical. However, the whole change must not take more than 600 s. See in the spec. "Shutdown Active Time Window for Programming"
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TFBS5700
Vishay Semiconductors Recommended Solder Profiles
Solder Profile for Sn/Pb soldering Manual Soldering Manual soldering is the standard method for lab use. However, for a production process it cannot be recommended because the risk of damage is highly dependent on the experience of the operator. Nevertheless, we added a chapter to the above mentioned application note, describing manual soldering and desoldering. Storage The storage and drying processes for all VISHAY transceivers (TFDUxxxx and TFBSxxx) are equivalent to MSL4. The data for the drying procedure is given on labels on the packing and also in the application note "Taping, Labeling, Storage and Packing" (http://www.vishay.com/docs/82601/82601.pdf).
260 240 220 200 180
10 s max. at 230 C 240 C max.
2...4 C/s 160 C max.
Temperature/C
160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350
120 s...180 s
90 s max.
2...4 C/s
Time/s
19431
Figure 3. Recommended Solder Profile for Sn/Pb soldering
Lead (Pb)-Free, Recommended Solder Profile The TFBS5700 is a lead (Pb)-free transceiver and qualified for lead (Pb)-free processing. For lead (Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9)Cu, there are two standard reflow profiles: Ramp-SoakSpike (RSS) and Ramp-To-Spike (RTS). The RampSoak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-ToSpike profile is used increasingly. Shown below in figure 4 is VISHAY's recommended profiles for use with the TFBS5700 transceivers. For more details please refer to Application note: SMD Assembly Instruction (http://www.vishay.com/docs/82602/82602.pdf). Wave Soldering For TFDUxxxx and TFBSxxxx transceiver devices wave soldering is not recommended.
280 260 240 220 200 180 Temperature/C 160 140 120 100 80 60 40 20 0 0
19261
T 255 C for 20 s max
T peak = 260 C max.
T 217 C for 50 s max
20 s
90 s...120 s
50 s max.
2 C...4 C/s
2 C...4 C/s
50
100
150 Time/s
200
250
300
350
Figure 4. Solder Profile, RSS Recommendation
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Document Number 84670 Rev. 2.1, 25-Sep-06
TFBS5700
Vishay Semiconductors Package Dimensions in mm
19325_1
Figure 5. TFBS5700 mechanical dimensions, tolerance 0.2 mm if not otherwise mentioned
19294
Figure 6. TFBS5700 soldering footprint, tolerance 0.2 mm if not otherwise mentioned
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TFBS5700
Vishay Semiconductors Reel Dimensions
Drawing-No.: 9.800-5090.01-4 Issue: 1; 29.11.05
14017
Tape Width mm 16
A max. mm 330
N mm 50
W1 min. mm 16.4
W2 max. mm 22.4
W3 min. mm 15.9
W3 max. mm 19.4
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Document Number 84670 Rev. 2.1, 25-Sep-06
TFBS5700
Vishay Semiconductors Tape Dimensions in mm
19286
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VISHAY
Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements.
TFBS5700
Vishay Semiconductors
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000 Revision: 08-Apr-05
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