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| TSM1N60L N-Channel Power Enhancement Mode MOSFET Pin assignment: 1. Gate 2. Drain 3. Source VDS = 600V ID = 1A RDS (on), Vgs @ 10V, Ids @ 0.6A = 10 General Description The TSM1N60L is used an advanced termination scheme to provide enhanced voltage-blocking capability without degrading performance over time. In addition, this advanced MOSFET is designed to withstand high energy in avalanche and commutation modes. The new energy efficient design also offers a drain- to-source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional and safety margin against unexpected voltage transients. Features Robust high voltage termination Avalanche energy specified Diode is characterized for use in bridge circuits Source to Drain diode recovery time comparable to a discrete fast recovery diode. IDSS and VDS(on) specified at elevated temperature Block Diagram Ordering Information Part No. TSM1N60LCP TSM1N60LCH Packing Tape & Reel Tube Package TO-252 TO-251 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Maximum Power Dissipation Ta = 25 oC Ta > 25 C Operating Junction Temperature Operating Junction and Storage Temperature Range Single Pulse Drain to Source Avalanche Energy (VDD = 500V, VGS=10V, IAS=1A, L=115mH, RG=25) TJ TJ, TSTG EAS o Symbol VDS VGS ID IDM PD Limit 600V 30 1 9 28 0.22 +150 - 55 to +150 50 Unit V V A A W W/oC o o C C mJ Thermal Performance Parameter Lead Temperature (1/8" from case) Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t<=10sec. Symbol TL Rja Limit 10 50 Unit S o C/W TSM1N60L 1-4 2006/01 rev. A Electrical Characteristics Tj = 25 oC, unless otherwise noted Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Transconductance Conditions Symbol Min Typ Max Unit VGS = 0V, ID = 250uA VGS = 10V, ID = 0.6A VDS = VGS, ID = 250uA VDS = 600V, VGS = 0V VGS = 30V, VDS = 0V VDS 50V, ID = 0.5A BVDSS RDS(ON) VGS(TH) IDSS IGSS gfs 600 -2.0 ---- -10 ---10 -12 4.0 10 100 -- V V uA nA S Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, VGS = 0V, f = 1.0MHz VDD = 300V, ID = 1A, VGEN = 10V, RG = 25 VDS = 480V, ID = 1.0A, VGS = 10V Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss ----------4.5 1.1 2.0 10 20 25 24 155 20 3 6.0 --30 50 45 60 200 26 4 pF nS nC Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = 1.0A, VGS = 0V Note: 1. pulse test: pulse width <=300uS, duty cycle <=2% 2. Negligible, Dominated by circuit inductance. IS VSD ----1.0 1.4 A V TSM1N60L 2-4 2006/01 rev. A Typical Characteristics Curve (Ta = 25 oC unless otherwise noted) TSM1N60L 3-4 2006/01 rev. A TO-252 Mechanical Drawing J A E F DIM A B C D E F G H I J TO-252 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 6.570 6.840 0.259 0.269 9.250 10.400 0.364 0.409 0.550 0.700 0.022 0.028 2.560 2.670 0.101 0.105 2.300 2.390 0.090 0.094 0.490 0.570 0.019 0.022 1.460 1.580 0.057 0.062 0.520 5.340 1.460 0.570 5.550 1.640 0.020 0.210 0.057 0.022 0.219 0.065 I B G D C H TO-251 Mechanical Drawing DIM A A1 b C D D1 E e F L L1 TO-251 DIMENSION MILLIMETERS INCHES MIN 2.20 1.10 0.40 0.40 6.70 5.40 6.40 2.10 0.40 7.00 1.60 MAX 2.4 1.30 0.80 0.60 7.30 5.65 6.65 2.50 0.60 8.00 1.86 MIN 0.087 0.043 0.016 0.016 0.264 0.213 0.252 0.083 0.016 0.276 0.063 MAX 0.095 0.051 0.032 0.024 0.287 0.222 0.262 0.098 0.024 0.315 0.073 TSM1N60L 4-4 2006/01 rev. A |
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