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BF1214
Dual N-channel dual gate MOSFET
Rev. 01 -- 30 October 2007 Product data sheet
1. Product profile
1.1 General description
The BF1214 is a combination of two dual gate MOSFET amplifiers with shared source and gate2 leads. The source and substrate are interconnected. Internal bias circuits enable DC stabilization and a very good cross modulation performance during AGC. Integrated diodes between the gates and source protect against excessive input voltage surges. The transistor has a SOT363 micro-miniature plastic package.
CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.
1.2 Features
I Two low noise gain controlled amplifiers in a single package; both with a partly integrated bias I Superior cross modulation performance during AGC I High forward transfer admittance I High forward transfer admittance to input capacitance ratio I Both amplifiers optimized for VHF applications, yet suitable for VHF and UHF applications
1.3 Applications
I Gain controlled low noise amplifiers for VHF and UHF applications with 5 V supply voltage N digital and analog television tuners N professional communication equipment
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
1.4 Quick reference data
Table 1. VDS ID Ptot |yfs| Ciss(G1) Crss NF Xmod Quick reference data for amplifier A and B Conditions DC DC Tsp 107 C f = 100 MHz; Tj = 25 C; ID = 18 mA f = 100 MHz f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) cross modulation input level for k = 1 % at 40 dB AGC; fw = 50 MHz; funw = 60 MHz
[3] [2] [2] [1]
Symbol Parameter drain-source voltage drain current total power dissipation forward transfer admittance input capacitance at gate1 noise figure
Min 27 102
Typ 32 2.2 20 0.9 1.2 105
Max Unit 6 30 180 37 2.7 1.5 1.8 V mA mW mS pF fF dB dB dBV
reverse transfer capacitance f = 100 MHz
Tj
[1] [2] [3]
junction temperature
Tsp is the temperature at the soldering point of the source lead. Calculated from S-parameters. Measured in Figure 24 test circuit.
-
-
150
C
2. Pinning information
Table 2. Pin 1 2 3 4 5 6 Discrete pinning Description drain (AMP A) source drain (AMP B) gate1 (AMP B) gate2 gate1 (AMP A)
1 2 3 G1B AMP B
sym119
Simplified outline
6 5 4
Symbol
AMP A G1A DA
G2
S
DB
3. Ordering information
Table 3. Ordering information Package Name BF1214 Description plastic surface-mounted package; 6 leads Version SOT363 Type number
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
2 of 18
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
4. Marking
Table 4. BF1214 Marking Marking SB* Description * = p : made in Hong Kong * = t : made in Malaysia * = w : made in China Type number
5. Limiting values
Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDS ID IG1 IG2 Ptot Tstg Tj
[1]
Parameter drain-source voltage drain current gate1 current gate2 current total power dissipation storage temperature junction temperature
Conditions DC DC
Min -
Max 6 30 10 10 180 +150 150
Unit V mA mA mA mW C C
Per MOSFET
Tsp 107 C
[1]
-65 -
Tsp is the temperature at the soldering point of the source lead.
250 Ptot (mW) 200
001aac193
150
100
50
0 0 50 100 150 Tsp (C) 200
Fig 1. Power derating curve
BF1214_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 30 October 2007
3 of 18
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
6. Thermal characteristics
Table 6. Symbol Rth(j-sp) Thermal characteristics Parameter thermal resistance from junction to solder point Conditions Typ 240 Unit K/W
7. Static characteristics
Table 7. Static characteristics Tj = 25 C. Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions VG1-S = VG2-S = 0 V; ID = 10 A amplifier A amplifier B V(BR)G1-SS V(BR)G2-SS VF(S-G1) VF(S-G2) VG1-S(th) VG2-S(th) IDS gate1-source breakdown voltage gate2-source breakdown voltage forward source-gate1 voltage forward source-gate2 voltage gate1-source threshold voltage gate2-source threshold voltage drain-source current VG2-S = VDS = 0 V; IG1-S = 10 mA VG1-S = VDS = 0 V; IG2-S = 10 mA VG2-S = VDS = 0 V; IS-G1 = 10 mA VG1-S = VDS = 0 V; IS-G2 = 10 mA VDS = 5 V; VG2-S = 4 V; ID = 100 A VDS = 5 V; VG1-S = 5 V; ID = 100 A VG2-S = 4 V amplifier A; VDS(A) = 5 V; RG1(A) = 68 k amplifier B; VDS(B) = 5 V; RG1(B) = 68 k IG1-S gate1 cut-off current VG2-S = 0 V; VDS(A) = VDS(B) = 0 V amplifier A; VG1-S(A) = 5 V amplifier B; VG1-S(B) = 5 V IG2-S gate2 cut-off current VG2-S = 4 V; VDS(A) = VDS(B) = 0 V; VG1-S(A) = VG1-S(B) = 0 V 50 50 20 nA nA nA
[1]
Min
Typ Max Unit
Per MOSFET; unless otherwise specified 6 6 6 6 0.5 0.5 0.3 0.4 13 13 10 10 1.5 1.5 1.0 1.0 23 23 V V V V V V V V mA mA
[1]
RG1 connects gate1 to VGG = 5 V.
BF1214_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 30 October 2007
4 of 18
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8. Dynamic characteristics
Table 8. Dynamic characteristics for amplifier A and B Common source; Tamb = 25 C; VG2-S = 4 V; VDS = 5 V; ID = 18 mA. Symbol Parameter |yfs| Ciss(G1) Ciss(G2) Coss Crss Gtr forward transfer admittance input capacitance at gate1 input capacitance at gate2 output capacitance transducer power gain Conditions f = 100 MHz; Tj = 25 C f = 100 MHz f = 100 MHz f = 100 MHz amplifier A; BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS amplifier B; BS = BS(opt); BL = BL(opt) f = 200 MHz; GS = 2 mS; GL = 0.5 mS f = 400 MHz; GS = 2 mS; GL = 1 mS f = 800 MHz; GS = 3.3 mS; GL = 1 mS NF noise figure f = 11 MHz; GS = 20 mS; BS = 0 S f = 400 MHz; YS = YS(opt) f = 800 MHz; YS = YS(opt) Xmod cross modulation input level for k = 1 %; fw = 50 MHz; funw = 60 MHz at 0 dB AGC at 10 dB AGC at 20 dB AGC at 40 dB AGC
[1] [2] Calculated from S-parameters. Measured in Figure 24 test circuit.
[2] [1] [1] [1] [1] [1] [1]
Min 27 31 27 22 31 29 25 -
Typ 32 2.2 3.5 0.8 20 35 31 26 35 33 29 3.0 0.9 1.2
Max 37 2.7 39 35 30 39 37 33 1.5 1.8
Unit mS pF pF pF fF dB dB dB dB dB dB dB dB dB
reverse transfer capacitance f = 100 MHz
90 102
94 99 105
-
dBV dBV dBV dBV
BF1214_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8.1 Graphs for amplifier A and B
40 ID (mA) 30
001aag993
40 ID (mA)
001aag994
(1) (2) (3) (4)
(1)
30
(2) (3)
20
(5)
20
(4) (5) (6)
10
(6)
(7)
10
(8) (9)
(7)
0 0 0.5 1.0 1.5 VG1-S (V) 2.0
0 0 2 4 VDS (V) 6
(1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS = 5 V; Tj = 25 C.
(1) VG1-S = 1.8 V. (2) VG1-S = 1.7 V. (3) VG1-S = 1.6 V. (4) VG1-S = 1.5 V. (5) VG1-S = 1.4 V. (6) VG1-S = 1.3 V. (7) VG1-S = 1.2 V. (8) VG1-S = 1.1 V. (9) VG1-S = 1.0 V. VG2-S = 4 V; Tj = 25 C.
Fig 2. Transfer characteristics; typical values
Fig 3. Output characteristics; typical values
BF1214_1
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Product data sheet
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
120 IG1 (A) 80
001aag995
40 |yfs| (mS) 30
001aag996
(1) (2)
(1)
(2)
(3)
(3)
20
(4)
40
(5) (6) (7) (7)
(4)
10
(5) (6)
0 0 0.5 1.0 1.5 VG1-S (V) 2.0
0 0 10 20 30 ID (mA) 40
(1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS = 5 V; Tj = 25 C.
(1) VG2-S = 4.0 V. (2) VG2-S = 3.5 V. (3) VG2-S = 3.0 V. (4) VG2-S = 2.5 V. (5) VG2-S = 2.0 V. (6) VG2-S = 1.5 V. (7) VG2-S = 1.0 V. VDS = 5 V; Tj = 25 C.
Fig 4. Gate1 current as a function of gate1 voltage; typical values
24 ID (mA) 18
001aag997
Fig 5. Forward transfer admittance as a function of drain current; typical values
20 ID (mA) 15
001aag998
12
10
6
5
0 0 20 40 IG1 (A) 60
0 0 1 2 3 4 VGG (V) 5
VDS = 5 V; VG2-S = 4 V; Tj = 25 C.
VDS = 5 V; VG2-S = 4 V; RG1 = 68 k; Tj = 25 C.
Fig 6. Drain current as a function of gate1 current; typical values
Fig 7. Drain current as a function of gate1 supply voltage (VGG); typical values
BF1214_1
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Product data sheet
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
25 ID (mA) 20
(1) (2) (3) (4) (5)
001aag999
30 ID (mA) 20
001aah000
(1) (2) (3) (4) (5)
15
10 10 5
(6) (7) (8) (9)
0 0 1 2 3 5 VGG = VDS (V) 4
0 0 1 2 3 4 5 VG2-S (V)
(1) RG1 = 47 k. (2) RG1 = 56 k. (3) RG1 = 68 k. (4) RG1 = 82 k. (5) RG1 = 100 k. (6) RG1 = 120 k. (7) RG1 = 150 k. (8) RG1 = 180 k. (9) RG1 = 220 k. VG2-S = 4 V; Tj = 25 C.
(1) VGG = 5.0 V. (2) VGG = 4.5 V. (3) VGG = 4.0 V. (4) VGG = 3.5 V. (5) VGG = 3.0 V. Tj = 25 C; RG1 = 68 k (connected to VGG).
Fig 8. Drain current as a function of VDS and VGG; typical values
Fig 9. Drain current as a function of gate2 voltage; typical values
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
8 of 18
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8.2 Graphs for amplifier A
0 gain reduction (dB) 10
001aah001
110 Vunw (dBV) 100
001aah002
20
30 90 40
50 0 1 2 3 VAGC (V) 4
80 0 10 20 30 40 50 gain reduction (dB)
VDS(A) = 5 V; VGG = 5 V; ID(nom)(A) = 18 mA; RG1(A) = 68 k; fw = 50 MHz; Tamb = 25 C; see Figure 24.
VDS(A) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(A) = 68 k; fw = 50 MHz; funw = 60 MHz; ID(nom)(A) = 18 mA; Tamb = 25 C; see Figure 24.
Fig 10. Amplifier A: typical gain reduction as a function of the AGC voltage; typical values
Fig 11. Amplifier A: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values
001aah003
30 ID (mA) 20
10
0 0 10 20 30 40 50 gain reduction (dB)
VDS(A) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(A) = 68 k; fw = 50 MHz; ID(nom)(A) = 18 mA; Tamb = 25 C; see Figure 24.
Fig 12. Amplifier A: typical drain current as a function of gain reduction; typical values
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
102 bis, gis (mS) 10 bis 1
001aah004
102
001aah005
-102
|yfs| (mS)
|yfs|
fs (deg)
10 fs gis
-10
10-1
10-2 10
102 f (MHz)
103
1 10
102 f (MHz)
-1 103
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 18 mA.
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 18 mA.
Fig 13. Amplifier A: input admittance as a function of frequency; typical values
103 |yrs| (S) 102 rs
001aah006
Fig 14. Amplifier A: forward transfer admittance and phase as a function of frequency; typical values
10 bos, gos (mS) 1
001aah007
-103 rs (deg) -102
bos
|yrs| 10 -10 10-1 gos
1 10
102 f (MHz)
-1 103
10-2 10
102 f (MHz)
103
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 18 mA.
VDS(A) = 5 V; VG2-S = 4 V; VDS(B) = 0 V; ID(A) = 18 mA.
Fig 15. Amplifier A: reverse transfer admittance and phase as a function of frequency; typical values
Fig 16. Amplifier A: output admittance as a function of frequency; typical values
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8.2.1 Scattering parameters for amplifier A
Table 9. Scattering parameters for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 18 mA; VDS(B) = 0 V; VG1-S(B) = 0 V; Tamb = 25 C; typical values. f (MHz) s11 Magnitude (ratio) 40 100 200 300 400 500 600 700 800 900 1000 0.9877 0.9888 0.9852 0.9766 0.9643 0.9504 0.9339 0.9151 0.8960 0.8766 0.8564 Angle (deg) -3.07 -7.81 -15.61 -23.41 -31.14 -38.62 -45.96 -53.13 -60.18 -67.00 -73.58 s21 Magnitude (ratio) 3.07 3.07 3.04 3.00 2.95 2.89 2.82 2.74 2.66 2.57 2.49 Angle (deg) 176.73 171.67 163.23 154.91 146.63 138.57 130.61 122.79 115.17 107.66 100.35 s12 Magnitude (ratio) 0.0006 0.0012 0.0022 0.0033 0.0042 0.0050 0.0056 0.0061 0.0064 0.0065 0.0066 Angle (deg) 88.01 85.54 80.05 75.66 71.57 67.10 63.38 59.74 56.44 53.53 50.29 s22 Magnitude (ratio) 0.9902 0.9918 0.9910 0.9896 0.9881 0.9859 0.9836 0.9813 0.9790 0.9769 0.9753 Angle (deg) -1.00 -2.74 -5.50 -8.22 -10.93 -13.61 -16.28 -18.96 -21.60 -24.20 -26.88
8.2.2 Noise data for amplifier A
Table 10. Noise data for amplifier A VDS(A) = 5 V; VG2-S = 4 V; ID(A) = 18 mA; Tamb = 25 C; typical values. f (MHz) 400 800 NFmin (dB) 0.91 1.23 opt (ratio) 0.76 0.71 (deg) 23.60 48.91 0.677 0.620 rn (ratio)
BF1214_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8.3 Graphs for amplifier B
0 gain reduction (dB) 10
001aah008
110 Vunw (dBmV) 100
001aah009
20
30 90 40
50 0 1 2 3 VAGC (V) 4
80 0 10 20 30 40 50 gain reduction (dB)
VDS(B) = 5 V; VGG = 5 V; ID(nom)(B) = 18 mA; RG1(B) = 68 k; fw = 50 MHz; Tamb = 25 C; see Figure 24.
VDS(B) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(B) = 68 k; fw = 50 MHz; funw = 60 MHz; ID(nom)(B) = 18 mA; Tamb = 25 C; see Figure 24.
Fig 17. Amplifier B: typical gain reduction as a function of the AGC voltage; typical values
Fig 18. Amplifier B: unwanted voltage for 1 % cross modulation as a function of gain reduction; typical values
001aah010
30 ID (mA) 20
10
0 0 10 20 30 40 50 gain reduction (dB)
VDS(B) = 5 V; VGG = 5 V; VG2-S(nom) = 4 V; RG1(B) = 68 k; ID(nom)(B) = 18 mA; fw = 50 MHz; Tamb = 25 C; see Figure 24.
Fig 19. Amplifier B: typical drain current as a function of gain reduction; typical values
BF1214_1
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Product data sheet
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
102 bis, gis (mS) 10 bis 1
001aah011
102
001aah012
-102
|yfs| (mS)
|yfs|
fs (deg)
10 fs gis
-10
10-1
10-2 10
102 f (MHz)
103
1 10
102 f (MHz)
-1 103
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 18 mA.
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 18 mA.
Fig 20. Amplifier B: input admittance as a function of frequency; typical values
103 |yrs| (S) 102 rs
001aah013
Fig 21. Amplifier B: forward transfer admittance and phase as a function of frequency; typical values
10 bos, gos (mS) 1 bos
001aah014
-103 rs (deg) -102
|yrs| 10 -10 10-1 gos
1 10
102 f (MHz)
-1 103
10-2 10
102 f (MHz)
103
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 18 mA.
VDS(B) = 5 V; VG2-S = 4 V; VDS(A) = 0 V; ID(B) = 18 mA.
Fig 22. Amplifier B: reverse transfer admittance and phase as a function of frequency; typical values
Fig 23. Amplifier B: output admittance as a function of frequency; typical values
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
8.3.1 Scattering parameters for amplifier B
Table 11. Scattering parameters for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 18 mA; VDS(A) = 0 V; VG1-S(A) = 0 V; Tamb = 25 C; typical values. f (MHz) s11 Magnitude (ratio) 40 100 200 300 400 500 600 700 800 900 1000 0.9836 0.9890 0.9869 0.9801 0.9704 0.9595 0.9458 0.9300 0.9132 0.8959 0.8775 Angle (deg) -2.92 -7.68 -15.32 -23.00 -30.69 -38.13 -45.45 -52.67 -59.82 -66.74 -73.43 s21 Magnitude (ratio) 3.06 3.06 3.03 2.99 2.94 2.88 2.81 2.73 2.65 2.56 2.47 Angle (deg) 176.89 171.63 163.14 154.74 146.34 138.13 129.99 121.93 114.01 106.18 98.51 s12 Magnitude (ratio) 0.0005 0.0012 0.0023 0.0034 0.0045 0.0056 0.0066 0.0075 0.0085 0.0093 0.0101 Angle (deg) 89.71 92.19 88.94 87.64 86.52 85.29 84.60 83.78 82.86 81.97 80.62 s22 Magnitude (ratio) 0.9897 0.9920 0.9914 0.9902 0.9889 0.9869 0.9845 0.9818 0.9786 0.9750 0.9717 Angle (deg) -0.98 -2.79 -5.62 -8.42 -11.21 -14.01 -16.81 -19.64 -22.44 -25.22 -28.10
8.3.2 Noise data for amplifier B
Table 12. Noise data for amplifier B VDS(B) = 5 V; VG2-S = 4 V; ID(B) = 18 mA; Tamb = 25 C; typical values. f (MHz) 400 800 NFmin (dB) 0.91 1.24 opt (ratio) 0.76 0.71 (deg) 22.58 47.34 0.690 0.620 rn (ratio)
9. Test information
VAGC
R1 10 k C1 4.7 nF C3 4.7 nF L1 2.2 H C4 RG1 4.7 nF RL 50
C2 4.7 nF R2 50
DUT
RGEN 50
VI
VGG
VDS
001aad926
Fig 24. Cross modulation test setup (for one MOSFET)
BF1214_1
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Product data sheet
Rev. 01 -- 30 October 2007
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NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
10. Package outline
Plastic surface-mounted package; 6 leads SOT363
D
B
E
A
X
y
HE
vMA
6
5
4
Q
pin 1 index
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT363
REFERENCES IEC JEDEC JEITA SC-88
EUROPEAN PROJECTION
ISSUE DATE 04-11-08 06-03-16
Fig 25. Package outline SOT363
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Product data sheet
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NXP Semiconductors
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Dual N-channel dual gate MOSFET
11. Abbreviations
Table 13. Acronym AGC DC MOSFET UHF VHF Abbreviations Description Automatic Gain Control Direct Current Metal-Oxide-Semiconductor Field-Effect Transistor Ultra High Frequency Very High Frequency
12. Revision history
Table 14. BF1214_1 Revision history Release date 20071030 Data sheet status Product data sheet Change notice Supersedes Document ID
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Product data sheet
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BF1214
Dual N-channel dual gate MOSFET
13. Legal information
13.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
13.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or
13.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
14. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
BF1214_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 30 October 2007
17 of 18
NXP Semiconductors
BF1214
Dual N-channel dual gate MOSFET
15. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 8.2 8.2.1 8.2.2 8.3 8.3.1 8.3.2 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Graphs for amplifier A and B . . . . . . . . . . . . . . 6 Graphs for amplifier A . . . . . . . . . . . . . . . . . . . . 9 Scattering parameters for amplifier A . . . . . . . 11 Noise data for amplifier A . . . . . . . . . . . . . . . . 11 Graphs for amplifier B . . . . . . . . . . . . . . . . . . . 12 Scattering parameters for amplifier B . . . . . . . 14 Noise data for amplifier B . . . . . . . . . . . . . . . . 14 Test information . . . . . . . . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 30 October 2007 Document identifier: BF1214_1

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