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PD - 97211
AUTOMOTIVE MOSFET
Features
l l l l l l l
Logic Level Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
IRL1404ZPbF IRL1404ZSPbF IRL1404ZLPBF
HEXFET(R) Power MOSFET
D
VDSS = 40V RDS(on) = 3.1m
G
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
S
ID = 75A
S D G
TO-220AB IRL1404ZPbF
G
S D
S D G
TO-262 IRL1404ZLPBF
D2Pak IRL1404ZSPbF
G Gate
D Drain
S Source
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS (Thermally limited) EAS (Tested ) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
180 130 75 790 200 1.3 16
Units
A
W W/C V mJ A mJ C
h
g
190 490 See Fig.12a, 12b, 15, 16 -55 to + 175 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
RJC RCS RJA RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient (PCB Mount)
Typ.
Max.
0.75 --- 62 40
i
i
jA
--- 0.50 --- ---
k
Units
C/W
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1
05/17/06
IRL1404Z/S/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
40 --- --- --- --- 1.4 120 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.034 2.5 --- --- --- --- --- --- --- --- 75 28 40 19 180 30 49 4.5 7.5 5080 970 570 3310 870 1280 --- --- 3.1 4.7 5.9 2.7 --- 20 250 200 -200 110 --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Conditions
V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA VGS = 10V, ID = 75A m VGS = 5.0V, ID = 40A VGS = 4.5V, ID = 40A V VDS = VGS, ID = 250A S VDS = 10V, ID = 75A A VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125C nA VGS = 16V VGS = -16V ID = 75A nC VDS = 32V VGS = 5.0V VDD = 20V ID = 75A ns RG = 4.0 VGS = 5.0V D Between lead,
e e e
e e
nH
6mm (0.25in.) from package
G
pF
S and center of die contact VGS = 0V VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 32V, = 1.0MHz VGS = 0V, VDS = 0V to 32V
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
f
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 26 18 180 A 720 1.3 39 27 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G D
S p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V TJ = 25C, IF = 75A, VDD = 20V di/dt = 100A/s
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
e
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.066mH, RG = 25, IAS = 75A, VGS =10V. Part not recommended for use above this value. Pulse width 1.0ms; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is only applied to TO-220AB package. When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994. TO-220 device will have an Rth value of 0.65C/W.
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IRL1404Z/S/LPbF
1000
TOP VGS 10V 7.0V 5.0V 4.5V 4.0V 3.5V 3.3V 3.0V
1000
TOP VGS 10V 7.0V 5.0V 4.5V 4.0V 3.5V 3.3V 3.0V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
3.0V 10
10 3.0V 60s PULSE WIDTH Tj = 25C 0.1 1 10 100
1
1 0.1 1
60s PULSE WIDTH Tj = 175C 10 100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000 T J = 175C 100
200
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ()
TJ = 25C 150
100
T J = 175C
10
T J = 25C VDS = 10V 60s PULSE WIDTH 2 3 4 5 6 7 8 9 10
50 V DS = 10V 0 0 50 100 150 200 ID,Drain-to-Source Current (A)
1.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRL1404Z/S/LPbF
100000
C oss = C ds + C gd
VGS, Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
6.0 ID= 75A 5.0 4.0 3.0 2.0 1.0 0.0 VDS= 32V VDS= 20V
C, Capacitance(pF)
10000
Ciss
1000
Coss Crss
100 1 10 100
0
20
40
60
80
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000.00
10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100sec 100 1msec
ISD, Reverse Drain Current (A)
T J = 175C
100.00
10.00 T J = 25C VGS = 0V
ID, Drain-to-Source Current (A)
10 Tc = 25C Tj = 175C Single Pulse 1 1 10msec
1.00 0.0 0.5 1.0 1.5
2.0
2.5
10 VDS, Drain-to-Source Voltage (V)
100
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL1404Z/S/LPbF
200 Limited By Package
ID, Drain Current (A)
RDS(on) , Drain-to-Source On Resistance (Normalized)
2.0
ID = 75A VGS = 10V
150
1.5
100
1.0
50
0 25 50 75 100 125 150 175 T C , Case Temperature (C)
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
1 D = 0.50
Thermal Response ( Z thJC )
0.1
0.20 0.10 0.05 0.02 0.01
R1 R1 J 1 2 R2 R2 R3 R3 3 C 3
0.01
J
1
2
0.001
SINGLE PULSE ( THERMAL RESPONSE )
Ci= i/Ri Ci i/Ri
Ri (C/W) i (sec) 0.000213 0.212 0.277 0.001234 0.261 0.021750
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 1
0.0001 1E-006
1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL1404Z/S/LPbF
800
EAS , Single Pulse Avalanche Energy (mJ)
15V
700 600 500 400 300 200 100 0 25 50 75 100
VDS
L
DRIVER
ID TOP 15A 24A BOTTOM 75A
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
125
150
175
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS VG QGD
3.0
VGS(th) Gate threshold Voltage (V)
2.5
Charge
2.0
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
ID = 250A
1.5
50K 12V .2F .3F
1.0
D.U.T. VGS
3mA
+ V - DS
0.5 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
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IRL1404Z/S/LPbF
100 Duty Cycle = Single Pulse 0.01
Avalanche Current (A)
0.05 10 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
1 1.0E-05
1.0E-04
1.0E-03 tav (sec)
1.0E-02
1.0E-01
Fig 15. Typical Avalanche Current vs.Pulsewidth
200
EAR , Avalanche Energy (mJ)
150
TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 75A
100
50
0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asT jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
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Fig 16. Maximum Avalanche Energy vs. Temperature
7
IRL1404Z/S/LPbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* dv/dt controlled by RG * Driver same type as D.U.T. * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
*
VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
V DS V GS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-V DD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRL1404Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
@Y6HQG@) UCDTADTA6IADSA GPUA8P9@A A DIU@SI6UDPI6G (A! S@8UDAD@S GPBP 96U@A8P9@ @6SAA2A! X@@FA GDI@A8 ( Q6SUAIVH7@S
&'(
6TT@H7G@9APIAXXA
DIAUC@A6TT@H7GAGDI@AA8A
Ir)AAQAAvAhriyAyvrAvv vqvphrAAGrhqAAArrA
6TT@H7G GPUA8P9@
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IRL1404Z/S/LPbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ A$"T
Q6SUAIVH7@S 96U@A8P9@ QA2A9@TDBI6U@TAG@69AAAS@@ QSP9V8UAPQUDPI6G @6SAA2A! X@@FA! 6A2A6TT@H7GATDU@A8P9@
10
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IRL1404Z/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
@Y6HQG@) UCDTADTA6IADSG" "G GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G @6SA&A2A ((& X@@FA ( 6A2A6TT@H7GATDU@A8P9@
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IRL1404Z/S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
TO-220AB packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 05/06
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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