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| TSM7104D 20V Dual P-Channel Enhancement Mode MOSFET Pin assignment: 1. Source 1 2. Gate 1 3. Source 2 4. Gate 2 5, 6. Drain 2 7, 8. Drain 1 VDS = - 20V RDS (on), Vgs @ - 4.5V, Ids @ - 2.3A =130m RDS (on), Vgs @ - 2.5V, Ids @ - 2.0A =190m Features Advanced trench process technology High density cell design for ultra low on-resistance Excellent thermal and electrical capabilities Surface mount Fast switching Block Diagram Ordering Information Part No. TSM7104DCS Packing Tape & Reel Package SOP-8 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @4.5V. Pulsed Drain Current, VGS @4.5V Maximum Power Dissipation Ta = 25 C Ta > 25 C Operating Junction Temperature Operating Junction and Storage Temperature Range TJ TJ, TSTG o o Symbol VDS VGS ID IDM PD Limit - 20V 8 - 2.3 - 10 2 16 +150 - 55 to +150 Unit V V A A W mW/ C o o o C C Thermal Performance Parameter Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t<=5sec. Symbol Rja Limit 62.5 Unit o C/W TSM7104D 1-3 2003/12 rev. A Electrical Characteristics Rate ID = - 2.3A, (Ta = 25 C unless otherwise noted) o Parameter Static Drain-Source Breakdown Voltage Drain-Source On-State Resistance Drain-Source On-State Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate Body Leakage Forward Transconductance Conditions Symbol Min Typ Max Unit VGS = 0V, ID = - 250uA VGS = - 4.5V, ID = -2.3A VGS = - 2.5V, ID = -2.0A VDS = VGS, ID = - 250uA VDS = - 16V, VGS = 0V VGS = 8V, VDS = 0V VDS = - 5V, ID = - 2.3A VDS = - 6V, ID = - 2.3A, VGS = - 4.5V VDD = - 6V, RL = 6, ID = - 1A, VGEN = - 4.5V, RG = 6 VDS = - 6V, VGS = 0V, f = 1.0MHz BVDSS RDS(ON) RDS(ON) VGS(TH) IDSS IGSS gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss IS - 20 --- 0.45 ---------------- -90 120 ---6.5 5.4 0.8 1.1 5 19 95 65 447 127 80 -- 0.8 -130 V m 190 -- 1.0 100 -10 --25 60 110 80 ---- 1.6 - 1.2 A V pF nS nC V uA nA S Dynamic Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = - 1.6A, VGS = 0V VSD Note : pulse test: pulse width <=300uS, duty cycle <=2% TSM7104D 2-3 2003/12 rev. A SOP-8 Mechanical Drawing A SOP-8 DIMENSION DIM MILLIMETERS MIN 4.80 3.80 1.35 0.35 0.40 MAX 5.00 4.00 1.75 0.49 1.25 INCHES MIN 0.189 0.150 0.054 0.014 0.016 MAX 0.196 0.157 0.068 0.019 0.049 16 9 B P A B C D F G K M F 1 8 G C D K M R 1.27 (typ) 0.10 0.25 0o 5.80 0.25 7o 6.20 0.50 0.05 (typ) 0.004 0.009 0o 0.229 0.010 7o 0.244 0.019 P R TSM7104D 3-3 2003/12 rev. A |
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