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| TN5325 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FETs Ordering Information BVDSS / BVDGS 250V RDS(ON) (max) 7.0 VGS(th) (max) 2.0V ID(on) (min) 1.2A Order Number / Package TO-236AB* TN5325K1 TO-92 TN5325N3 TO-243AA** TN5325N8 Product marking for SOT-23: N3C where = 2-week alpha date code * Same as SOT-23. All units shipped on 3,000 piece carrier tape reels. ** Shipped on 2,000 piece carrier tape and reels. Product marking for TO-243AA Features Low threshold - 2.0V max. Free from secondary breakdown Low power drive requirement Low CISS and fast switching speeds Excellent thermal stability High input impedance and high gain Complementary N- and P-channel devices TN3C Where = 2-week alpha date code Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Applications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Package Options Absolute Maximum Ratings Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * Distance of 1.6 mm from case for 10 seconds. 11/12/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. BVDSS BVDGS 20V -55C to +150C 300C SGD G D S D G S D TO-92 TO-243AA (SOT-89) TO-236AB (SOT-23) Note: See Package Outline section for dimensions. 1 TN5325 Thermal Characteristics Package TO-236AB TO-92 TO-243AA ID (continuous)* 150mA 215mA 316mA ID (pulsed) 400mA 800mA 1.5A Power Dissipation @ TA = 25C 0.36W 0.74W 1.6W** jc ja IDR* 150mA 215mA 316mA IDRM 400mA 800mA 1.5A C/W 200 125 15 C/W 350 170 78** * ID (continuous) is limited by max rated Tj. **Mounted on FR5 board. 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate. Electrical Characteristics (@ 25C unless otherwise specified) Symbol BVDSS VGS(th) V GS(th) IGSS IDSS Parameter Drain-to-Source Breakdown Voltage Gate Threshold Voltage Change in VGS(th) with Temperature Gate Body Leakage Zero Gate Voltage Drain Current Min 250 0.6 2.0 -4.5 100 1.0 10.0 1.0 ID(ON) RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Notes: 1.All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2.All A.C. parameters sample tested. Typ Max Unit V V mV/C nA A A mA Conditions ID = 100A, VGS = 0V VGS = VDS, ID = 1mA ID = 1mA, VGS = VDS VGS = 20V, VDS = 0V VGS = 0V, VDS = 100V VGS = 0V, VDS = Max Rating VGS = 0V, VDS = 0.8 Max Rating TA = 125C VGS = 4.5V, VDS = 25V VGS = 10V, VDS = 25V VGS = 4.5V, ID = 150mA VGS = 10V, ID = 1.0A VGS = 4.5V, ID = 150mA VDS = 25V, ID = 200mA VGS = 0V, VDS = 25V, f = 1MHz ON-State Drain Current Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 0.6 1.2 8.0 7.0 1.0 150 110 60 23 20 15 25 25 1.8 300 V ns ns pF A %/C m Switching Waveforms and Test Circuit 10V 90% INPUT 0V PULSE GENERATOR Rgen 10% t(ON) t(OFF) tr td(OFF) tF td(ON) VDD 10% 10% INPUT OUTPUT 0V 90% 90% (c)2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 2 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com VDD VDD = 25V ID = 150mA RGEN = 25 ISD = 200mA, VGS = 0V ISD = 200mA, VGS = 0V RL OUTPUT D.U.T. 11/12/01 |
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