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 STS3C3F30L
N-CHANNEL 30V - 0.050 - 3.5A SO-8 P-CHANNEL 30V - 0.140 - 3A SO-8 STripFETTM II POWER MOSFET
TYPE STS3C3F30L(N-Channel) STS3C3F30L(P-Channel)
s s s
VDSS 30 V 30 V
RDS(on) < 65 m < 165 m
ID 3.5 A 3A
s
TYPICAL RDS(on) (N-Channel) = 50 m TYPICAL RDS(on) (P-Channel) = 140 m STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE SO-8
DESCRIPTION
This application specific Power MOSFET is the second generation of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s DC/DC CONVERTERS s BATTERY MANAGEMENT IN NOMADIC EQUIPMENT s POWER MANAGEMENT IN CELLULAR PHONES
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM(*) Ptot Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Single Operating Drain Current (continuos) at TC = 100C Single Operating Drain Current (pulsed) Total Dissipation at TC = 25C Dual Operating Total Dissipation at TC = 25C Single Operating Storage Temperature Max. Operating Junction Temperature 3.5 2.2 14 1.6 2 -60 to 150 150 N-CHANNEL 30 30 16 2.7 1.7 11 P-CHANNEL Unit V V V A A A W W C C
(*) Pulse width limited by safe operating area. February 2002
.
Note: P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed
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THERMAL DATA
Rthj-amb(1) Tl Thermal Resistance Junction-ambient Single Operation Dual Operating Maximum Lead Temperature For Soldering Purpose 62.5 78 300 C/W C/W C
(1) when mounted on 0.5 in2 pad of 2 oz. copper
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating TC = 125C VGS = 16 V Min. 30 1 10 100 Typ. Max. Unit V A A nA
ON
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS VGS = 10 V VGS = 10 V VGS = 4.5 V VGS = 4.5 V ID = 250 A ID = 1.75 A ID = 1.5 A ID = 1.75 A ID = 1.5 A n-ch p-ch n-ch p-ch n-ch p-ch Min. 1 1 50 140 60 160 65 165 90 200 Typ. Max. Unit V V m m m m
DYNAMIC
Symbol gfs (*) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 15 V VDS = 15 V ID= 1.75 A ID= 1.5 A n-ch p-ch n-ch p-ch VDS = 25V, f = 1 MHz, VGS = 0 n-ch p-ch n-ch p-ch Min. Typ. 5.5 4 320 420 90 95 40 30 Max. Unit S S pF pF pF pF pF pF
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ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symbol td(on) tr Parameter Turn-on Delay Time Test Conditions N-CHANNEL ID = 1.75 A VDD = 15 V RG = 4.7 VGS = 4.5 V P-CHANNEL VDD = 15 V ID = 1.5 A RG = 4.7 VGS = 4.5 V (Resistive Load, Figure 1) N-CHANNEL VDD=24V ID=3.5A VGS=4.5V n-ch p-ch n-ch p-ch Min. Typ. 27 14.5 40 37 Max. Unit ns ns ns ns
Rise Time
Qg Qgs Qgd
Total Gate Charge Gate-Source Charge Gate-Drain Charge
n-ch p-ch
8.5 4.8 2 1.7 4 2
12 7
nC nC nC nC nC nC
n-ch P-CHANNEL VDD = 24V ID = 3A VGS = 4.5V p-ch n-ch (see test circuit, Figure 2) p-ch
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off Delay Time Test Conditions N-CHANNEL ID = 1.75 A VDD = 15 V RG = 4.7 VGS = 4.5 V P-CHANNEL VDD = 15 V ID = 1.5 A RG = 4.7 VGS = 4.5 V (Resistive Load, Figure 1) Test Conditions n-ch p-ch n-ch p-ch ISD = 3.5 A ISD = 3 A VGS = 0 VGS = 0 n-ch p-ch n-ch p-ch n-ch p-ch n-ch p-ch 28 35 18 25 1.3 1.5 n-ch p-ch n-ch p-ch Min. Typ. 30 90 20 23 Max. Unit ns ns ns ns
Fall Time
SOURCE DRAIN DIODE
Symbol ISD ISDM (*) VSD() Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Min. Typ. Max. 3.5 3 14 12 1.2 1.2 Unit A A A A V V ns ns nC nC A A
trr Qrr IRRM
Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current
N-CHANNEL ISD = 3.5 A di/dt = 100A/s Tj =150 oC VDD = 15 V P-CHANNEL di/dt = 100A/s ISD = 3 A Tj =150 oC VDD = 15 V (see test circuit, Figure 3)
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. (*) Pulse width limited by safe operating area.
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Safe Operating Area n-ch Thermal Impedance n-ch
Output Characteristics n-ch
Transfer Characteristics n-ch
Transconductance n-ch
Static Drain-source On Resistance n-ch
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Gate Charge vs Gate-source Voltage n-ch Capacitance Variations n-ch
Normalized Gate Threshold Voltage vs Temperature
n-ch
Normalized on Resistance vs Temperature n-ch
Source-drain Diode Forward Characteristics n-ch
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Safe Operating Area p-ch Thermal Impedance p-ch
Output Characteristics p-ch
Transfer Characteristics p-ch
Transconductance p-ch
Static Drain-source On Resistance p-ch
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Gate Charge vs Gate-source Voltage p-ch Capacitance Variations p-ch
Normalized Gate Threshold Voltage vs Temperature
p-ch
Normalized on Resistance vs Temperature p-ch
Source-drain Diode Forward Characteristics p-ch
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Fig. 1: Switching Times Test Circuits For Resistive Load Fig. 2: Gate Charge test Circuit
Fig. 3: Test Circuit For Diode Recovery Behaviour
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SO-8 MECHANICAL DATA
DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 mm TYP. MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
0016023
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics (R) 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com
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