View PC-414WINS_1293986.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Last Time Buy Notice - Board Products
November 7, 2003 Effective immediately, DATEL, Inc. will be phasing out its line of board-level data acquisition products. We will accept last time buy orders until February 28, 2004. Final shipments must be accepted by June 31, 2004. In addition, all repairs and technical support must be concluded by September 30, 2004. Please contact DATEL Sales as soon as practical to schedule your order. If this Notice is received by Purchasing, Materiel or Procurement personnel, we strongly encourage you to forward this to your Engineering, Administrative and Program colleagues as soon as practical. Models to be Discontinued - Essentially all DATEL board-level data acquisition products, all board-level accessories and all board software are covered in this Notice. This includes: All ST-xxx model numbers (Multibus I boards, example ST-711) All PC-xxx model numbers (ISA bus boards, example PC-414) All DVME-xxx model numbers (VME bus boards, example DVME-628) All CPCI-xxx model numbers (Compact PCI bus boards, example CPCI-511) All PCI-xxx model numbers (PCI bus boards, example PCI-416) Please note that many older ST-xxx, DVME-xxx and PC-xxx boards are already on very limited availability due to component obsolescence and other manufacturing issues. Last Time Orders - Customers should contact the DATEL Sales Dept. (Mansfield, MA, USA) directly to place orders and negotiate delivery schedules. Some products may require minimum order quantities and/or extended delivery. This varies over time so it is difficult to give an exact list of such products. To assure supply, we encourage customers to accept deliveries as soon as practical. As time passes, customers risk non-availability of an increasing number of products. After the customer accepts final order acknowledgement, all orders placed will be firm and noncancellable.
Warranty - DATEL's standard warranty terms apply except the warranty period. As the date of last shipments approach, warranty support and repairs will terminate on September 30, 2004. Customers must immediately perform a functional inspection on any shipments near this date. DATEL will have no technical or repair facilities after this date. Technical Support - Since some DATEL engineering resources have already been reallocated, support and repairs are currently limited and more will be withdrawn over time. We encourage users to get all support issues settled as soon as practical. Replacement Products - DATEL is not aware of any competitive manufactured products which are exact replacements for these products. However, there are numerous items with similar functions. These will require re-integration with your application. Manufacturing Rights - DATEL is not offering manufacturing rights on these products. The difficulty here is the complexity of technical support to fully transfer all comprehensive details of manufacturing (including test fixturing, component specifications and device programming). Most of these products would require considerable re-engineering by the user to resume production outside DATEL. Nor will we retain spare parts after September 30, 2004. Volume users should contact DATEL to discuss their needs. ******* As very large volume component users ourselves who are subject to frequent component obsolescence issues, DATEL sincerely regrets any inconvenience this Notice may cause our customers.
11 Cabot Blvd, Mansfield, MA, 02048 USA, website: www.datel.com Phone: 508-339-3000 FAX: 508-339-6356 E-mail: SALES@DATEL.COM
(R)
(R)
PC-414
High-Speed Analog Input Board for ISA Computers
FEATURES
* * * * * * * *
Now with Up to 10 MHz A/D sample rate LabVIEW(R) VI's Very low harmonic distortion Analog input comparator trigger Choice of 12, 14, or 16-bit A/D resolution Optional 2 to 8-channel simultaneous sampling On-board FIFO memory up to 16,384 samples Ideal for FFT's, DSP, or array processor "front ends" Non-bus burst parallel port for seamless recording
NEW
Offering very high system speed, the PC-414 is a multi-channel analog input board for ISA compatible computers. Input bandwidth is available up to 5 MHz and may be sampled at up to 10 MHz. A common motherboard is used, with the analog section contained in a pluggable 2" by 4" module. This allows for a family of several different Sample/Hold - A/D Converter speed and resolution options by exchanging analog modules. The analog input ranges of the A/D converter are selectable as unipolar 0 to +10 V, or bipolar 5 V, or 10 V depending on the model. Model PC-414E offers 16 single-ended or 8 differential high speed channels. Models PC-414F, G, J, K, L, M, and P include a simultaneous sampling section. This function acquires signals on parallel channels at the same time. This prevents phase errors and skewing of multichannel correlated signals. Applications include high speed cross-channel computation, beam-former coherency for sonar or acoustics, telemetry, multiple carrier demodulation, and highly concurrent system testing.
A/D data passes to an on-board First-In, First-Out (FIFO) data memory and then to the host computer bus interface under software control. The FIFO acts to uncouple the precise timing of the A/D section from the block-oriented data transfers on the bus. The design can continuously collect analog data with non-stop converter triggering while data is simultaneously read from the FIFO. This allows the collection of "seamless" wide-bandwidth signals of millions of samples or greater. Functions such as FFT sampling cannot tolerate lost samples without increases in "arithmetic" noise during computation processing. Data can be transferred to mass storage peripherals such as disk or magnetic tape. Applications include long-baseline studies in astrophysics, component life testing, and anomalous pattern search.
SSH Control
A/D
Analog Inputs
M U X
A/D
Pluggable Analog Section
C T L
Reset FIFO Memory Parallel Outport or DSP COMM Port Full Ready Output Acknowledge Input External Enable Input FIFO Flags D/A Output Digital I/O Base Address Select Half Full DMA T/C 8 out, 8 in Registers
A/D Start Clock EOC Trigger In D/A Out Channel Address Sequencer
Empty Half
D/A Converter Trigger Comparator Analog Trigger External Trigger Trigger Control ACQ
82C54 Programmable Interval Timer 8MHz
Interrupt Request
DMA Request
I/O Bus Interface
DC/DC Power Converter +5V
ISA BUS
Figure 1. Functional Block Diagram
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 * Email: sales@datel.com * Internet: www.datel.com
79
(R)
(R)
PC-414
The FIFO data output may also be routed under host software control to an on-board parallel data port instead of being sent to the computer bus. This parallel burst channel data may be read by an external processor at very high speeds and avoids possible speed restrictions of the computer bus. The outport uses a very simple ready/acknowledge transfer handshake which is adaptable to any remote parallel port including DT Connect(R). See model PC-414COM using a DSP COMM port interface. The analog section of the PC-414 is optimized for high signal quality and very low dynamic noise. The PC-414 is ideal as an FFT "front-end" or DSP quantizer for array processors. The A/D conversion timing section is designed for accurate multiscan data acquisition. Software programmable timers control the interval between each conversion and each multichannel scan. A programmable sample counter allows sample blocks of specified length independent of FIFO length. The timer/counter section uses a precision on-board crystal clock. Timeout and sample count activities may be monitored using I/O status registers and/or programmable interrupts. The interrupt method may be fully synchronized with software programmable DMA transfers directly to host computer memory. S/H - A/D triggering can originate from several sources under software control. The internal timebase is the normal trigger source although single conversions or scans may be directly commanded by host I/O register writes. An external trigger clock may also be used to precisely synchronize sampling with external events. This external trigger may start a single multichannel scan or "N" multiple scans separated by programmable delays. Analog sampling can also be level-triggered using an on-board analog comparator and an external level input. The reference trigger level to the comparator is derived from an on-board 12bit D/A converter. If preferred, the D/A converter may also be used as a general purpose analog output channel. The PC-414B, D, F, G, H, K, M, N, and P versions contain five SMA coaxial signal connectors. Four connectors are for the sampled analog channels. The fifth connector is used for external timebase clock input, external analog trigger signal, or for the analog output. The PC-414E, J, and L versions contain 25-pin "D" connectors (DB-25S). The burst channel parallel port uses an internal dual row header. The computer interface conforms to the PC-AT bus structure. All data transfers (control, status, and A/D data) use 16-bit transfers. Interrupt level selection is done via software. Interrupt servicing is generated for a variety of reasons such as A/D data read, DMA terminal count, sample count reached, FIFO half-full, or FIFO full. A/D output data coding is right-justified two's complement with sign extension, if desired, straight binary coding can also be selected making it directly compatible with high level computer languages such as "C", Visual C++, Borland C Builder, Visual Basic, and others.
Analog Inputs
Software The PC-414 can be controlled via optional DOS or Windows NT or 95/98 Control panels, third party software such as LabVIEW, or user written code in languages such as Visual C++, Borland C Builder, Visual Basic, etc. PC-414SET An MS-DOS based menu driven acquisition program. Includes setup and configuration functions, data acquisition via interrupt and DMA, D/A and counter timer control. Software also includes A/D and D/A calibration procedures. * Automatically configures to the display adapter, CPU, and mouse * Sets the I/O base address * Initializes the interrupt and DMA systems and D/A output * Allocates base or extended memory * Performs self-test and A/D-D/A calibration * Configures A/D sample rate, frame rate, and sample counter * Selects trigger mode and DMA or I/O block transfer * Selects disk file output format to integer binary, float binary, or ASCII float * Saves data to base memory, extended memory, or disk * Full source code in "C" and assembly is available * MS-DOS or WINDOWS version (visual "C" interface) PC-414SRC PC-414WIN PC-414NT Source code for PC-414SET, written in C. A Windows 95/98 or NT GUI control panel incorporates all the functions of the PC-414. Functions include configuration and setup, analog input to file or disk, analog output, analog and digital triggering, digital I/O, and calibration. Source code for PC-414WIN written in Borland C Builder. Bridge driver software to LabVIEW 4.0 and 3.1. Source code for PC-414LV allows users to reduce high level VI's to lower level VI's.
Remote receiver e.g. DSP board, memory board, etc. Parallel Port
PC-414WINS PC-414LV PC-414LVS
Display
Disk
PC-414
Start & Exit Mode
Host Memory Graphics Display
User written program PC-414SET * * * * * * * * * Window-driven user interface Configure hardware Start acquisition Send data over parallel port Store data to memory and /or disk file View data Access digital I/O port A/D and D/A calibration Update D/A D/A Converter
Figure 2. PC-414SET Software Operation
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 * Email: sales@datel.com * Internet: www.datel.com
80
(R)
(R)
PC-414
FUNCTIONAL SPECIFICATIONS (Typical at +25 C, dynamic conditions, gain = 1, unless noted) ANALOG INPUTS Number of Channels Input Configuration (non-isolated) [Note 19] Full Scale Input Ranges (user-selectable) (gain = 1) [Notes 1 & 16] Input Overvoltage (no damage, power on) Overvoltage Recovery Time, maximum Common Mode Voltage Range, maximum Input Impedance [Notes 6 &10] SAMPLE/HOLD Acquisition Time (FSR step to 0.01% of FSR, max.) Aperture Delay Aperture Delay Uncertainty A/D CONVERTER Resolution Conversion Period 14 bits 1.6 s 12 bits 200 ns 12 bits 500 ns 12 bits 400 ns 750 ns 20 ns 100 ps 50 ns 10 ns 7 ps 750 ns 20 ns 40 ps 165 ns 20 ns 40 ps PC-414B 4 (single A/D) Single Ended 0 to +10 V 10 V 5 V 15 V 2 s -- 10 M PC-414D 1 (single A/D) Differential 5 V PC-414E 16SE/8D [Note 8] (single A/D) SE or Diff. 0 to +10 V 10 V 5 V 15 V 2 s 10 V 100 M PC-414F 2 Simultaneous (two A/D's) Single Ended 0 to +10 V 5 V
15 V 2 s 1 V 2 k
15 V 2 s -- 1 k
SYSTEM DC CHARACTERISTICS [Note 7] Integral Non-linearity (LSB of FSR) Differential Non-linearity (LSB of FSR) Full Scale Temperature Coefficient (LSB per C) Zero or Offset Temperature Coefficient (LSB per C) 1.5 1 0.3 2 1 0.1 1 0.75 0.1 1 1 0.1
0.3
0.3
0.1
0.1
SYSTEM DYNAMIC PERFORMANCE [Note 2] Throughput to FIFO (single channel, gain = 1) Throughput to FIFO (sequential channels, gain = 1) Total Harmonic Distortion [Note 3] 500 kHz 5 MHz [Note 9] 2 MHz 500 kHz [Note 4] -72 dB 2 MHz 2 MHz/chan. (2 chans.) -70 dB
330 kHz -75 dB
-- -68 dB
The PC-414J in short-cycled addressing is recommended in place of the PC-414A. Model PC-414E can substitute for the PC-414C. ANALOG INPUTS Programmable Gains Common Mode Rejection (DC - 60 Hz) Addressing Modes See Note 1 -80 dB (g = 100) (414E) 1. Single channel 2. Simultaneous sampling 3. Sequential with autosequenced addressing 4. Random addressing by host software A/D CONVERTER Output Coding Positive-true, right justified, straight bin. (unipolar) or rightjustified 2's complement (bipolar) with sign extension thru bit 15 1. Local Pacer frame clock 2. External TTL frame clock 3. Analog threshold comp. 1. Internal programmable 82C54 timer 2. Ext. TTL input, active low
Trigger Sources (Software selectable) A/D Sample Clock (software selectable)
Please read all notes carefully.
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
81
(R)
(R)
PC-414
FUNCTIONAL SPECIFICATIONS (Typical at +25C, dynamic conditions, gain = 1, unless noted) ANALOG INPUTS Number of Channels Input Configuration (non-isolated) [Note 19] Full Scale Input Ranges (user-selectable) (gain = 1) [Notes 1 & 16] Input Overvoltage (no damage, power on) Overvoltage Recovery Time, maximum Common Mode Voltage Range, maximum Input Impedance [Notes 6 &10] SAMPLE/HOLD Acquisition Time (FSR step to 0.01% of FSR, max.) Aperture Delay Aperture Delay Uncertainty A/D CONVERTER Resolution Conversion Period 14 bits 500 ns 12 bits 100 ns 12 bits 2 s [Note 12] 12 bits 200 ns 350 ns [Note 11] 20 ns 70 ps 35 ns 10 ns 3 ps rms 400 ns -- -- 50 ns 10 ns 7 ps PC-414G 2 Simultaneous (two A/D's) Single Ended 5 V or 0 to +10 V (separate models) 15 V 2 s -- 1 M PC-414H 1 (single A/D) Differential 5 V (other ranges special order) 15 V 1 s 1 V 2 k PC-414J 8 Simultaneous A/D's [Note 8] Single Ended 5 V, 10 V [Note 13] PC-414K 2 Simultaneous (two A/D's) Limited Differential 0 to +10 V, 5 V (separate models)
15 V 3 s -- 8 k (bipolar)
15 V -- 1 V 1 k
SYSTEM DC CHARACTERISTICS [Note 7] Integral Non-linearity (LSB of FSR) Differential Non-linearity (LSB of FSR) Full Scale Temperature Coefficient (LSB per C) Zero or Offset Temperature Coefficient (LSB per C) 1.5 1 0.3 1.5 1 1 1 1 [Footnote 10] 2 1 0.1
0.3
1
[Footnote 10]
0.3
SYSTEM DYNAMIC PERFORMANCE [Note 2] Throughput to FIFO (single channel, gain = 1) Throughput to FIFO (sequential channels, gain = 1) Total Harmonic Distortion [Note 3] 1 MHz 1 MHz/chan. (2 chans.) -80 dB 10 MHz 400 kHz 5 MHz
-- -65 dB
250kHz/chan.** -75 dB
5 MHz/ch. -68 dB
**A 380 KHz per channel option is available on special order.
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
82
(R)
(R)
PC-414
FUNCTIONAL SPECIFICATIONS (Typical at +25C, dynamic conditions, gain = 1, unless noted) ANALOG INPUTS Number of Channels Input Configuration (non-isolated) [Note 19] Full Scale Input Ranges (user-selectable) (gain = 1) [Notes 1 & 16] Input Overvoltage (no damage, power on) Overvoltage Recovery Time, maximum Common Mode Voltage Range, maximum Input Impedance [Notes 6 &10] SAMPLE/HOLD Acquisition Time (FSR step to 0.01% of FSR, max.) Aperture Delay Aperture Delay Uncertainty A/D CONVERTER Resolution Conversion Period 12 bits 2 s [Note 12] 16 bits 5 s [Note 12] 14 bits 200 ns [Note 12] 14 bits 400 ns [Note 12] 400 ns -- -- -- -- -- 35 ns 10 ns 5 ps -- -- -- PC-414L 16 Simultaneous A/D's Single Ended 5 V, 10 V, (user selectable) [Note 13] 15 V -- -- 8 k PC-414M 4 Simultaneous A/D's Single Ended 10 V PC-414N 2 Simultaneous A/D's Single Ended 2.5 V PC-414P 4 Simultaneous A/D's Single Ended 2.5 V or 0 to +5 V (user selectable) 7 V -- -- 1000
12 V -- -- 10 M
15V -- -- 10 M or 50
SYSTEM DC CHARACTERISTICS [Note 7] Integral Non-linearity (LSB of FSR) Differential Non-linearity (LSB of FSR) Full Scale Temperature Coefficient (LSB per C) Zero or Offset Temperature Coefficient (LSB per C) 2 1 [Note 10] 4 3 1 1 1 0.5 3 1.5 0.5
[Note 10]
1
0.5
0.5
SYSTEM DYNAMIC PERFORMANCE [Note 2] Throughput to FIFO (single channel, gain = 1) Throughput to FIFO (sequential channels, gain = 1) Total Harmonic Distortion [Note 3] 400 kHz 200 kHz 5 MHz 3 MHz* min.
190 kHz/chan. -75 dB
200 kHz/chan. -83 dB
5 MHz/chan. -75 dB
2.5 MHz/chan. -75 dB
* The sample rate to published specifications is 3 MHz. The A/D is functional to 5 MHz. Valid data output per channel is delayed by 4 samples after the start of the sample clock. Please make note of this for products such as the PC-414P, PC-430P, and DVME-614P which use non-continuous A/D sampling. Data output is pipelined meaning that the first four samples per channel should be discarded. For all 4 channels, discard 16 samples. The design is intended for semi-continuous sampling of wideband signals and is less suitable for low speed data acquisition. Approximately 5 dB SFDR improvement can be achieved by directly connecting an external A/D sample clock. Contact DATEL for details.
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
83
(R)
(R)
PC-414
SPECIFICATIONS, CONTINUED (Typical @ +25C, dynamic conditions, unless noted) A/D MEMORY Architecture Memory Capacity TRIGGER CONTROL Programmable Interval Timer Type Functions 82C54 1. A/D sample count reached 2. A/D start rate (16 bit divisor) 3. SSH sample counter (414A) 3 to 65,536 samples. Drives the Acquire flag/interrupt gate for A/D start pulses. Internal 8 MHz crystal clock 125, 250, or 500 KHz 10 V (not avail. 414D) 2 s to set status flag 40 mV First-In, First-Out (FIFO) 1024, 4096, or 16,384 A/D samples. 64 K on request. Number of Interrupts (software selectable) Bus Interrupt Sources 1 interrupt, software selectable on level 7, 9 thru 11, or 15. Scan acquire flag (sample count), FIFO full or half full, DMA terminal count from bus.
PARALLEL DATA PORT Outport Type 16 data output lines, TTL levels from A/D FIFO. Includes handshake signals and FIFO flags. The outport does not provide addressing. Asynchoronous master to external slave receiver. 4 modes are included, offering internal/external clocking (to 10 MHz), synchronous/ asynchronous handshaking. Sequencing is compatible with DT Connect(R). 24 mA out, 1.6 mA in. The data outputs may be tri-stated for shared bus connection. 2-row 26-pin header type mounted on board interior. 0.100" pin spacing suitable for flat cable. Pinout is compatible with DT Connect(R) and existing 414 format. 4 MHz max. Data may be transferred up to 10 MHz with external clocking.
Operating Modes
Pacer Sample Counter
82C54 Clock Source Scan Trigger Clock Analog Trigger Input Range [Note 5] Analog Trigger Response Analog Trigger Hysteresis ANALOG OUTPUT Number of Channels Function (user-selectable) [Note 5] Resolution Output Voltage Range (user-selectable) Linearity Settling Time (10 V step) Input Coding (user-selectable) ISA BUS INTERFACE Architecture
Parallel Port Loading
Parallel Port Connector One 1. General purpose analog output 2. Threshold comparator for A/D trigger 12 bits 0 to +10 V, 5 V and 10 V at 5 mA max. 0.05% of FSR 5 microseconds to 0.05% Same as A/D section
Port Data Rate
DIGITAL I/O PORT Connector Dual row, 26-pin header mounted on board interior. Uses 0.100" pin spacing suitable for flat cable. Includes +5 Vdc and digital ground connections. 8 digital outputs, 8 digital inputs (unlatched) Buffered, TTL levels. 10 output loads. 50 ns max. after write operation
I/O Mapping Data Transfer Data Bus Direct Memory Access
DMA Request Conditions (software selectable) Control/Status Functions
I/O mapped, pluggable to IBM-PC/AT, and compatibles. Decodes eight 16-bit I/O registers. Decodes I/O address lines A9 - A0 I/O transfer or host DMA, software selectable 16 bits 1 channel, selectable on channels 5, 6, or 7, set by software FIFO full, half full, not empty, scan acquire flag (sample count reached) Board reset, FIFO flags, interrupt select and status, DMA select and status, trigger source, timer control and period, sample count load, parallel outport enable, A/D enable, MUX auto-sequence
Configuration Levels Outport Settling Time MISCELLANEOUS Analog Section Modularity
Analog Section Adjustments
Analog Input Connectors
The MUX-S/H-A/D module is socketed for function interchange. Offset and gain per channel for SSH on PC-414F, G, H, K, M, N, and P. A single offset and gain pot is provided on PC-414B, D, and E. Recommended recalibration interval is 90 days in stable conditions. Four SMA miniature coaxial, mounted on rear slot. [Note 8]
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
84
(R)
(R)
PC-414
Multipurpose Connector [Note 8] 5th SMA user-selectable for: 1. Pacer trigger input 2. Analog threshold comparator input 0 to +60C, forced cooling recommended. -25 to +85C 10% to 90%, non-condensing. 0 to 10,000 feet. +5V @ 3.5A max. from ISA bus 4.5 x 10.5 x 0.625 inches, compatible to PC/ISA bus 9. 5 MHz sampling on PC-414D requires an external clock. Maximum on-board sampling is 4 MHz.
Operating Temp. Range Storage Temp. Range Humidity Altitude Power Required Outline Dimensions
10. Input impedance is shown with power on. Impedance with power off is 1.5 k or less. 11. PC-414G acquisition time is 350 ns to 0.01% of FSR. 12. All channels in simultaneous sampling. 13. PC-414J and L bipolar input is user-selectable 5 V or 10 V per channel (default). Total full scale error over temperature range is 4 LSB maximum. Total zero/offset error over temperature range is 2 LSB maximum. Monotonicity: no missing codes over temperature range. 14. Avoid mixing external triggers which are a close submultiple of the internal A/D start clock to prevent lost samples. 15. Models PC-414D, H, K, and M use a single channel 12-bit A/D converter with 5 V inputs. An external A/D clock is required above 4 MHz and the 82C54 timer must be bypassed. 10 MHz sampling may continue until the FIFO memory is full. 16. Input polarity. Some models are fixed as bipolar only whereas others are user-selectable unipolar or bipolar. Still others require separate model numbers. 17. Models F, G, J, K, L, M, N, and P use one A/D converter per channel. 18. The customer must use shielded cables to insure EMC compliance. 19. A/D-per-channel boards (models F, G, J, K, L, M, N, P) may be operated in "software differential" mode. Two A/D's are applied to the high and low legs of a single differential input channel. The two data values are then algebraically subtracted, either on the fly in real time or after all samples have been stored. Channel capacity in "software differential" is one-half the number of singleended channels. This technique offers excellent bandwidth, high common mode rejection and optional mix of single-ended and differential channels.
NOTES 1. Resistor-programmed gain from x1 to x100 is available on PC-414E with increased settling delay at higher gain. Total throughput includes MUX settling time after changing the channel address, S/H acquisition time to rated specifications, A/D conversion, and FIFO transfer. Total throughput is not delayed by host software whenever the FIFO is not full. THD test conditions are: A. Input freq. 500 kHz (414F) 200 kHz (414B,E,G) 50 kHz (414J,L,M) 1 MHz (414D,K,N,P) 2 MHz (414H) B. Generator/filter THD is -90 dB minimum. C. THD computed by FFT to 5th harmonic. ( V22 + V32 + V42 + V52 )0.5 THD = 20 log10 Vin D. Inputs are half full scale less 0.5 dB. No channel advance. E. A/D sample rate = 500 kHz (414B,E,G), 4 MHz (414D,K), 2 MHz (414F), 10 MHz (414H), 250 kHz (414J), 190 kHz (414L,M), 2.5 MHz (414P)
2.
3.
(
)
4.
The rates shown for sequential sampling are the maximum A/D converter start rates and include MUX sequencing and settling. For example, if four channels of the PCI-414E were scanned, the maximum sample rate on any one channel would be 2 s x 4 channels = 8 s (125 kHz per channel). For fastest response on the analog comparator trigger, keep the reference voltage near the trip input voltage. To avoid overload recovery delays, do not let the trip input (or any other analog input) exceed 10V. The input impedance of 10 M minimum avoids attenuation errors from external input source resistance. For many applications, an in-line coaxial 50 shunt, inserted adjacent to the front connectors, is recommended to reduce reflections and standing wave errors. Allow 20 minutes warmup time to rated specifications for models PC-414B,G,M,N. A 25-pin DB-25S connector is used for the PC-414E, J, and L.
5.
6.
7.
8.
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
85
(R)
(R)
PC-414
I/O Register Mapping The base address may be selected anywhere up to 3F0h on 16-byte boundaries. I/O Address (hex) Base + 0 Base + 0 Base + 2 Base + 2 Base Base Base Base Base Base Base +4 +6 +6 +8 + 0Ah + 0Ch + 0Eh FIFO Data Format A/D data is delivered as a stream from the FIFO memory. For multichannel inputs, this means that data is multiplexed. For example, for 4-channel inputs, the output channel sequence is 0, 1, 2, 3, 0, 1, . . . Some applications may need this data demultiplexed by software so that each channel's data is placed in its own separate buffer.
Direction Write Read Write Read Write Write Read Read/Write Read/Write Read/Write Read/Write
Description Command Register Status Register Channel Address/Digital Output [Note 12] Digital Input Register [Note 12] D/A Data Register FIFO Reset Register FIFO A/D Data Register Counter #0 (82C54) Counter #1 (82C54) Counter #2 (82C54) Control Register (82C54)
Binary A/D Data Analog Inputs Parallel Port
See model PC-414COM using a DSP COMM port interface.
MUX FIFO MEM Array Processor Board
A/D PC-414
Transfer Speeds ISA bus transfer rates are host-dependent and should be determined by testing. For example, a Compaq computer achieved 800 nanoseconds instantaneous sample-to-sample timing to base memory using the REP INSW instruction. A faster CPU will not increase the ISA bus speed. To optimize throughput, disable all possible interrupts. For higher speed continuous (non-stop) A/D sampling, consider using a parallel port.
DSP Arrays PC/AT Bus
CPU
Disk Controller Display Controller
Mass Storage Graphics Display
Figure 3. Array Preprocessing
Internal or external trigger rate
TRIGGER Internal or external start rate A/D START CONVERT 0 END OF SCAN* (Internal (Signal) 1 2 3 Fixed or sequential channel addressing up to 64k samples per trigger
ACQUIRE FLAG
SSH (Internal) [BASE + 0 bit 2 = 1] (414A only)
HOLD SAMPLE Maskable Interrupt and Status
Figure 4. PC-414 Timing DIagram
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 * Email: sales@datel.com * Internet: www.datel.com
86
(R)
(R)
PC-414
Figure 5. PC-414VB-CONSOLE
PC-414VB CONSOLE This example application was written in Visual Basic 5.0, using the PC-414LVS as the callable DLL. Created by Eiichi Itagaki, Software Engineer of DATEL KK Technical and Jeffrey Greenberg, Marketing Applications Engineer DATEL, Inc. USA. For users preferring to create applications in Visual Basic, the DLL and source code found in the PC-414LVS offers the Visual Basic programmer a wealth of information and tools in creating applications quickly and easily. The PC-414VB-CONSOLE is a sample program showing how to implement most of the functions of the PC-414 Series. Included is the source code for all the forms and the code modules. To receive your FREE copy of PC-414VB-CONSOLE, purchase PC-414LVS with any PC-414 Series board and contact DATEL at 1-800-233-2765. Example Declarations: Declare Sub SetIOBase Lib "P414LV32.DLL" (ByVal io_base_address As Integer) Declare Sub init_414 Lib "P414LV32.DLL" (ByVal fsize As Integer, ByVal port As Integer, ByVal trigger_src As Integer, ByVal trigger_pol As Integer, ByVal clock_src As Integer, ByVal md As Integer) Declare Sub set_mode Lib "P414LV32.DLL" (ByVal samples_trigger As Integer, ByVal scan_enable As Integer, ByVal scan_count As Integer, ByVal auto_incr As Integer, ByVal cahnnel As Integer, ByVal sample_rate As Long, ByVal trigger_rate As Long) Declare Sub StartAD Lib "P414LV32.DLL" () Declare Sub StopAD Lib "P414LV32.DLL"() Declare Function read_status_reg Lib "P414LV32.DLL" () As Integer Declare Sub get_status_flags Lib "P414LV32.DLL" (half_full_f As Long, full_f As Long, empty_f As Long, acquire_f As Long) Declare Sub reset_fifo_reg Lib "P414LV32.DLL" () Declare Sub read_FIFO Lib "P414LV32.DLL" (ByVal count As Integer, buffer As Integer)
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 * Email: sales@datel.com * Internet: www.datel.com
87
(R)
(R)
PC-414
PC-414LV FEATURES * Supports DATEL's PC-414 family of high-speed analog input boards * Runs under Microsoft Windows(R), uses Dynamic Data Exchange (DDE) * Adaptable to all LabVIEW applications * Easy-to-use visual programming eliminates low level software * Interactive, customizable front panel controls * Integrates data acquisition, processing, display, and storage * A/D sampling rates to 10 MHz * Optional multi-channel simultaneous sampling PC-414LV GENERAL DESCRIPTION National Instruments' LabVIEW transforms the PC-414 family of high speed analog input boards into easy-to-use virtual instruments (VI's) that acquire, analyze, display, and store analog signals in real time. Low level software development is replaced by an intuitive visual programming system that harnesses all the power of Microsoft Windows - graphic user interface (GUI), access to more host memory (16 megabytes), multi-tasking, and inter-process communications using DDE. Applications include highly concurrent system testing, process monitoring and control, telemetry, radar, sonar, acoustics, DSP front end quantizer, education, and research. The PC-414 LabVIEW package from DATEL consists of a set of inexpensive VI's for low level control of the board. These integrate into the LabVIEW package which the user must purchase from National Instruments. Once installed, these VI's appear as icons on the LabVIEW menues. DATEL's VI's are offered in two versions. Model PC-414LV is the executable binary-only configuration which can be fully integrated into the user-written block diagram. Model PC-414LVS is the full source to model PC-414LV and also includes all binaries. The source code should be considered by a programmer who wishes to extend or modify the existing VI's or just wants to more fully understand their operation. LabVIEW's feature-rich program development system combined with DATEL's library of VI functions for the PC-414 provide the essential building blocks to create any conceivable LabVIEW applications. Graphical programming works like a flowchart - when the flowchart is accurate and complete, the program is done. PC-414LV off-loads as much programming as possible into the LabVIEW environment so the user has maximum control. It creates a library of fast, simple, highly modular VI functions for the PC-414 that do not sacrifice board performance. The user builds VI's to configure the data acquisition hardware, process the data, and ultimately display and store that data without writing programs. Similar VI's can be created to update the analog output and to read and write the digital I/O port.
A/D data to remote receivers Analog and Digital I/O
Windows LabVIEW LabVIEW Initialize PC-414 Start A/D Read FIFO Input Signal Amplitude
Parallel Port PC-414 High speed analog input board (includes D/A and digital I/O)
Timebase Input Channel
Single Multi SS&H
10101010 OFF
Digital Out
Real Time Processing and Display Loop On/ Off
1024
Analog Out
ON
Host Computer
Front Panel Controls
Visual Programming Diagram
Figure 6. PC-414LV LabVIEW System Diagram
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
88
(R)
(R)
PC-414
All VI's are assembled graphically using a mouse and can be edited at any time to modify functionality or appearance. Nonstop, seamless data acquisition continues on the PC-414 while LabVIEW simultaneously maintains the GUI and handles the A/D data stream in real time. Easily customized, interactive user interfaces can be created from the vast library of front panel controls and displays offered by LabVIEW. The PC-414LV includes extensive Dynamic Linked Library (DLL) functions that perform the PC-414 low level hardware control and monitor operations transparently. The software provides VI functions that poll PC-414 status flags independent of, and simultaneous with, data acquisition and data transfer. Control is retained by the user as long as LabVIEW continues to execute correctly. The multi-window, visual programming environment facilitates building and accessing hierarchical VI programs. Multi-tasking allows context switches to other concurrent Windows applications without disrupting PC-414 operation or control. The PC-414/LabVIEW system optimizes two concurrent processes - the PC-414 acquiring data while LabVIEW further processes or stores the uploaded data stream. The entire PC-414/LabVIEW combination uses only a few VI functions that are easy to understand and incorporate into a "block diagram" program. The basic concept is to initialize the PC-414 hardware, reset the FIFO memory, start data acquisition, and upload blocks of data from the FIFO to LabVIEW memory buffers on the host - or to remote receivers over the DT Connect I compatible output port. These data blocks can then be further processed as screen displays, indicators, graphs, sent to printers or plotters, or simply archived to disk file for later analysis. The A/D continues running and no data will be lost as long as LabVIEW uploads the A/D data faster than the data is being acquired. Virtual Instrument Library In summary, PC-414LV includes the following VI functions: PC-414 Initialize Operating Mode Clear FIFO Start/Stop A/D Read Status Read FIFO Initialize the PC-414 hardware - board model, I/O base address, etc. Specify A/D trigger rate, A/D sample rate, and analog input channel. Reset the FIFO memory Enable and disable the A/D. Read hardware status flags - FIFO flags, acquisition done, oversampling. Read blocks of A/D data from the FIFO on the PC-414 and fill a LabVIEW buffer on the host. Update the analog output channel. Read/write the 8-bit digital I/O port. Complete data acquisition demonstration VI, includes real time signal display.
Write DAC Inport/Outport PC-414 Demo
Demultiplex Buffers Unravel a multi-channel data buffer and extract data from one channel only.
Figure 7. PC-414LV Visual Program
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
89
(R)
(R)
PC-414
ORDERING INFORMATION
Hardware:
PC-414
Input Channels, A/D Resolution B = 4SE chans., 14 bits D = 1D chan., 12 bits E = 16SE/8D chans., 12 bits F = 2SE simul. chans., 12 bits G = 2SE simul. chans., 14 bits H = 1D chan., 12 bits J = 8SE simul. chans., 12 bits K = 2SE simul. chans., 12 bits L = 16SE simul. chans., 12 bits M = 4SE simul. chans., 16 bits N = 2SE simul. chans., 14 bits P = 4SE simul. chans., 14 bits
FIFO Memory Size 1 = 1,024 A/D samples 2 = 4,096 A/D samples 3 = 16,384 A/D samples
Input Polarity A = Bipolar or selectable B = Unipolar For models with userselectable polarity use the "A" designator. CAUTION: Read the input range specifications carefully.
Example: PC-414F3 Two simultaneous A/D's, 2 MHz, 12-bit resolution, 16,384 FIFO samples. 61-7342340 PC-490B PC-414xCOMx SMA male to BNC male coaxial cable, 1 meter length. One cable required per channel. DB-25 screw termination adapter (cable not included). Not recommended for high-frequency signals. PC-414 with DSP COMM port interface. See PC-414COM data sheet.
Each board is power-cycle burned-in, tested and calibrated. All models include a user's manual. An example program disk is available on request at no charge. Software: PC-414SET PC-414SRC PC-414WIN PC-414WINS PC-414LV PC-414LVS PC-414NT PC-414NTS Call DATEL Call DATEL
Setup/configuration data-collection program for MS-DOS. Executables only. Source code for setup and configuration program on MS-DOS disks. Includes "C" and assembly source code and window driver library. Documentation is on disk. Setup/configuration program for Microsoft Windows 3.1. Executables only. Source code for PC-414WIN, written with Borland Delphi. Bridge driver software to National Instruments' LabVIEW(R). See PC-414LV data sheet. Source code for PC-414LV Setup/configuration program for Microsoft Windows NT. Executables only. Source code for PC-414NT, written with Borland Delphi. Free example programs for the PC-414, written in Visual Basic 5. Contact Systems Application Dept. Free example programs for the PC-414, written in Microsoft QuickBASIC. Contact System Application Dept.
Pentium is an Intel trademark Windows and MS-DOS are Microsoft trademarks LabVIEW is a National Instruments trademark DT Connect is a Data Translation trademark
DATEL, Inc., Mansfield, MA 02048 (USA) * Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 *
Email: sales@datel.com * Internet: www.datel.com
90

▲Up To Search▲

Price & Availability of PC-414WINS

	To Download PC-414WINS Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .