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NTE65101 Integrated Circuit 256 x 4-Bit Static Random Access Memory (SRAM)
Description: The NTE65101 is a CMOS 1024-bit device organized in 256 words by 4 bits in a 22-Lead DIP type package. This device offers ultra low power and fully static operation with a single 5V supply. Separate data inputs and data outputs permit maximum flexibility in bus-oriented systems. Data retention at a power supply as low as 2V over temperature readily allows design into applications using battery backup for nonvolatility. The NTE65101 is fully static and does not require clocking in standby mode. Features: D Organized as 256 Bytes of 4-Bits D Static Operation D Low Standby Power D Three-State Output D Single 5V Power Supply D Data Retention to 2V D TTL Compatible D Maximum Access Time: 450ns Absolute Maximum Ratings: (Voltages referenced to VSS Pin8) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to +7V Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to VCC +0.3V Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to +85C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to +150C Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
DC Electrical Characteristics: (VCC = 5V 5%, TA = 0 to +70C unless otherwise specified)
Parameter Input Current Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output Leakage Current Operating Current Symbol Iin VIH VIL VOH VOL ILO ICC1 ICC2 Standby Current ICCL IOH = -1mA IOL = 2mA CE1 = 2.2V, VOL = 0V to VCC, Note 3 Vin = VCC, except CE1 0.65V, Outputs open Vin = 2.2V, except CE1 0.65V, Outputs open CE2 0.2V, Note 3, Note 4 Note 3 Test Conditions Min - 2.2 -0.3 2.4 - - - - - Typ 5.0 - - - - - 9.0 13 - Max - VCC 0.65 - 0.4 1.0 22 27 10 Unit nA V V V V A mA mA A
Note 2. Typical values are TA = +25C and nominal voltage. Note 3. Current through all inputs and outputs included in ICCL measurement. Note 4. Low current state is for CE2 = 0 only. Capacitance:
Parameter Input Capacitance Output Capacitance Symbol Cin Cout Vin = 0V Vout = 0V Test Conditions Min - - Typ 4.0 8.0 Max 8.0 12.0 Unit pF pF
Note 2. Typical values are TA = +25C and nominal voltage. Low VCC Retention Characteristics: (TA = 0 to +70C unless otherwise specified)
Parameter VCC for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time Symbol VDR ICCDR1 tCDR tR Note 5 CE2 0.2V, VDR = 2V Test Conditions Min 2.0 - 0 tRC Typ - 0.14 - - Max - 10 - - Unit V A ns ns
Note 2. Typical values are TA = +25C and nominal voltage. Note 5. tRC = Read Cycle Time. AC Operating Conditions and Characteristics: (Full operating voltage and temperature unless otherwise specified) AC Test Conditions:
Condition Input Pulse Levels Input Rise and Fall Times Output Load - Timing Measurement Reference Level Value +0.65V to 2.2V 20ns 1 TTL Gate and CL = 100pF 1.5V
AC Operating Conditions and Characteristics (Cont'd): (Full operating voltage and temperature unless otherwise specified) Read Cycle:
Parameter Read Cycle Time Access Time Symbol Min tRC tA 450 - Max Unit - 450 ns ns
Read Cycle (Cont'd):
Parameter Address Setup Time Address Hold Time Chip Enable (CE1) to Output Chip Enable (CE2) to Output Output Disable to Output Data Output to High Z State Previous Read Data Valid with Respect to Address Change Previous Read Data Valid with Respect to Chip Enable Symbol Min tAS tAH tCO1 tCO2 tOD tDF tOH1 tOH2 20 0 - - - 0 0 0 Max - - 400 500 250 130 - - Unit ns ns ns ns ns ns ns ns
Write Cycle:
Parameter Write Cycle Write Delay Chip Enable (CE1) to Write Chip Enable (CE2) to Write Data Setup Data Hold Write Pulse Write Recovery Output Disable Setup Symbol Min tWC tAW tCW1 tCW2 tDW tDH tWP tWR tDS 450 130 350 350 250 50 250 50 130 Max - - - - - - - - - Unit ns ns ns ns ns ns ns ns ns
Truth Table:
CE1 H X X L L L CE2 X L X H H H OD X X H H L L R/W X X H L L H Din X X X X X X Output High Z High Z High Z High Z Din Dout Mode Not Selected Not Selected Output Disable Write Write Read
Pin Connection Diagram
A3 A2 A1 A0 A5 A6 A7 GND DI 1 DO 1 DI 2
1 2 3 4 5 6 7 8 9 10 11
22 21 20 19 18 17 16 15 14 13 12
VCC A4 R/W CE 1 OD CD 2 DO 4 DI 4 DO 3 DI 3 DO 2
22
12 .410 (11.41)
1
11
1.300 (33.0) .216 (5.5)
.400 (10.16)
.100 (2.54) 1.000 (25.4)
.110 (2.79)

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