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FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current: 10A (Max.) @ VDS = 100V Lower RDS(ON): 0.101 (Typ.)
IRLR/U130A
BVDSS = 100 V RDS(on) = 0.12 ID = 13 A
D-PAK
2 1 3 1
I-PAK
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25C) Continuous Drain Current (TC=100C) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TA=25C) * Total Power Dissipation (TC=25C) Linear Derating Factor TJ , TSTG TL Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds
(2) (1) (1) (3) (1)
Value 100 13 8 45 20 225 13 4.6 6.5 2.5 46 0.37 - 55 to +150
Units V A A V mJ A mJ V/ns W W W/C
C 300
Thermal Resistance
Symbol RJC RJA RJA Characteristic Junction-to-Case Junction-to-Ambient * Junction-to-Ambient Typ. ---Max. 2.7 50 110 C/W Units
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
(c)1999 Fairchild Semiconductor Corporation
1
IRLR/U130A
Electrical Characteristics (TC=25C unless otherwise specified)
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain ( Miller ) Charge Min. Typ. Max. Units 100 -1.0 -----------------0.1 ------10.1 580 140 60 10 11 29 15 16.9 2.7 9.7 --2.0 100 -100 10 100 0.12 -755 175 75 30 30 70 40 24 --nC ns pF A V V nA
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Test Condition VGS=0V,ID=250A
V/C ID=250A VGS=20V VGS=-20V VDS=100V
See Fig 7
VDS=5V,ID=250A
VDS=80V,TC=150C VGS=5V,ID=6.5A VDS=40V,ID=6.5A
(4) (4)
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=50V,ID=14A, RG=6
See Fig 13
VDS=80V,VGS=5V, ID=14A
(4) (5)
See Fig 6 & Fig 12 (4) (5)
Source-Drain Diode Ratings and Characteristics
Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
(1) (4)
Min. Typ. Max. Units --------109 0.41 13 45 1.5 --A V ns C
Test Condition Integral reverse pn-diode in the MOSFET TJ=25C,IS=13A,VGS=0V TJ=25C,IF=14A diF/dt=100A/s
(4)
Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature (2) L=2mH, IAS=13A, VDD=25V, RG=27, Starting TJ =25C (3) ISD 14A, di/dt 350A/s, VDD BV DSS , Starting TJ =25C (4) Pulse Test: Pulse Width = 250s, Duty Cycle 2% (5) Essentially Independent of Operating Temperature
2
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IRLR/U130A
Fig 2. Transfer Characteristics
Fig 1. Output Characteristics
12 0
V Top :
GS
7.0V 6.0 V
ID , Drain Current [A]
5.5 V
ID , Drain Current [A]
5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0V
11 0
11 0
1 0 oC 5 10 0 2 oC 5 @ Nt s: oe 1 V =0 V . GS 2 V =4 V . DS 0 3 2 0 s P l e T s .5 us et 4 6 8 1 0
10 0 1 -1 0 10 0
@Nts: oe 1 2 0 s P l e T s .5 us et 2 T = 2 oC .C 5 11 0
- 5 oC 5 1 -1 0 0 2
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
02 .0
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
Drain-Source On-Resistance
01 .5
V =5V GS
11 0
RDS(on) , [ ]
01 .0
V =1 V 0 GS 00 .5 @Nt :T =2 C oe J 5 00 .0 0 1 5
D
o
10 0 @ Nt s: oe 1 V =0 V . GS us et 2 2 0 s P l e T s .5 10 . 12 . 14 . 16 . 18 . 20 . 22 .
1 0 oC 5 2 oC 5 1 -1 0 04 . 06 . 08 .
3 0
4 5
6 0
I , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
10 00 C = C + C (C = s o t d ) iss gs gd ds h r e C =C +C oss ds gd C =C rss gd 6
Fig 6. Gate Charge vs. Gate-Source Voltage
80 0
C iss
V =2 V 0
VGS , Gate-Source Voltage [V]
DS
Capacitance [pF]
V =5 V 0 DS V =8 V 0 DS 4
60 0 C oss 40 0 C rss 20 0 @Nts: oe 1 V =0V . GS 2 f=1Mz . H
2
@ Nt s: I =1 A oe 4 D 0 0 3
G
0 10 0
1 0
1
6
9
1 2
1 5
1 8
VDS , Drain-Source Voltage [V]
Q , Total Gate Charge [nC]
IRLR/U130A
Fig 7. Breakdown Voltage vs. Temperature
12 . 25 .
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Fig 8. On-Resistance vs. Temperature
Drain-Source Breakdown Voltage
RDS(on) , (Normalized)
11 .
Drain-Source On-Resistance
20 .
BVDSS , (Normalized)
15 .
10 .
10 . @Nts: oe 1 V =5V . GS 2 I =7A .D
09 .
@ Nt s: oe 1 V =0 V . GS 2 I = 2 0 A .D 5
05 .
08 . -5 7
-0 5
-5 2
0
2 5
5 0
7 5
10 0
15 2
10 5
15 7
00 . -5 7
-0 5
-5 2
0
2 5
5 0
7 5
10 0
15 2
10 5
15 7
TJ , Junction Temperature [oC]
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
12 0 O ea in i Ti Ae pr t o n h s r a i L m t d b R DS(on) s i ie y 1 0 s 0 11 0 1m 0s D C 1 0
0
Fig 10. Max. Drain Current vs. Case Temperature
1 5
ID , Drain Current [A]
1m s
ID , Drain Current [A]
12 0
1 2
9
@ Nt s: oe 1 T = 2 oC .C 5 2 T = 1 0 oC .J 5 3 S nl Pl e . ig e us
6
3
1 -1 0 0 1 0
11 0
0 2 5
5 0
c
7 5
10 0
15 2
10 5
VDS , Drain-Source Voltage [V]
T , Case Temperature [oC]
Fig 11. Thermal Response
Thermal Response
D=0.5 100 0.2 0.1 0.05 10- 1 0.02 0.01 single pulse
JC
@ Notes : 1. Z J C (t)=2.7 o C/W Max.
2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z
PDM t1 t2
JC
(t)
Z (t) ,
10- 2 - 5 10
10- 4
10- 3
10- 2
10- 1
100
101
t
1
, Square Wave Pulse Duration
[sec]
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IRLR/U130A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
50k 12V 200nF 300nF
Same Type as DUT
VGS Qg
10V
VDS VGS DUT
3mA
Qgs
Qgd
R1
Current Sampling (IG) Resistor
R2
Current Sampling (ID) Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL Vout Vin RG DUT Vin 5V
td(on) t on tr td(off) t off tf 10%
Vout VDD
( 0.5 rated VDS )
90%
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
LL VDS
Vary tp to obtain required peak ID
BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD
tp
ID
RG DUT 5V
tp
ID (t) VDS (t) Time
5
IRLR/U130A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
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DUT
+ VDS --
IS L Driver RG VGS
Same Type as DUT
VGS
VDD
dv/dt controlled by RG IS controlled by Duty Factor D
VGS ( Driver )
Gate Pulse Width D = -------------------------Gate Pulse Period
5V
IFM , Body Diode Forward Current
IS ( DUT ) IRM
di/dt
Body Diode Reverse Current
VDS ( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode Forward Voltage Drop
6
DPAK Package Dimensions
DPAK (FS PKG CODE AA)
6.60 0.20 5.34 0.30 (0.50) (4.34) (0.50) 0.70 0.20 2.30 0.10 0.50 0.10
0.60 0.20
6.10 0.20
2.70 0.20
9.50 0.30
0.91 0.10
0.80 0.20
MAX0.96 2.30TYP [2.300.20]
0.76 0.10 2.30TYP [2.300.20]
0.89 0.10
0.50 0.10 1.02 0.20 2.30 0.20
(0.70)
(0.90) (0.10) (3.05)
6.10 0.20
9.50 0.30
2.70 0.20
(2XR0.25)
0.76 0.10
Dimensions in Millimeters
September 1999, Rev B
(1.00)
6.60 0.20 (5.34) (5.04) (1.50)
MIN0.55
IPAK Package Dimensions
IPAK (FS PKG CODE AL)
6.60 0.20 5.34 0.20 (0.50) (4.34) (0.50) 0.50 0.10 2.30 0.20
0.60 0.20
0.70 0.20
0.80 0.10
6.10 0.20
1.80 0.20
MAX0.96 0.76 0.10
9.30 0.30
2.30TYP [2.300.20]
2.30TYP [2.300.20]
0.50 0.10
Dimensions in Millimeters
September 1999, Rev B
16.10 0.30
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. E

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