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PD - 9.1344
PRELIMINARY
IRLIZ24N
D
HEXFET(R) Power MOSFET
l l l l l l
Logic-Level Gate Drive Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated
VDSS = 55V
G S
RDS(on) = 0.06 ID = 14A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design for which HEXFET Power MOSFETs are well known, provides the designer with an extremely efficient device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Current Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw.
Max.
14 9.9 72 26 0.17 20 68 11 4.5 4.6 -55 to + 175 300 (1.6mm from case) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient
Min.
---- ----
Typ.
---- ----
Max.
5.8 65
Units
C/W
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IRLIZ24N
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss C
Min. 55 --- --- --- --- 1.0 8.3 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.061 --- --- --- --- --- --- --- --- --- --- --- --- 7.1 74 20 29
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.060 VGS = 10V, ID = 8.4A 0.075 VGS = 5.0V, ID = 8.4A 0.105 VGS = 4.0V, ID = 7.0A 2.0 V VDS = VGS, ID = 250A --- S VDS = 25V, I D = 11A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, T J = 150C 100 VGS = 20V nA -100 VGS = -20V 15 ID = 11A 3.7 nC VDS = 44V 8.5 VGS = 5.0V, See Fig. 6 and 13 --- VDD = 28V --- ID = 11A ns --- RG = 12, VGS = 5.0V --- RD = 2.4, See Fig. 10 Between lead, 4.5 --- 6mm (0.25in.) nH from package 7.5 --- and center of die contact 480 --- VGS = 0V 130 --- pF VDS = 25V 61 --- = 1.0MHz, See Fig. 5 12 --- = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD t rr Q rr Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 60 130 14 A 72 1.3 90 200 V ns nC
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 8.4A, VGS = 0V TJ = 25C, IF = 11A di/dt = 100A/s
D
G S
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. t=60s, =60Hz
Uses IRLZ24N data and test conditions
VDD = 25V, starting TJ = 25C, L = 790H
RG = 25, IAS = 11A. (See Figure 12)
ISD 11A, di/dt 290A/s, VDD V(BR)DSS,
TJ 175C
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IRLIZ24N
100
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
100
ID , Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
10
10
2.5V
1
1
2.5V 20s PULSE WIDTH TJ = 25C
0.1 1 10
0.1
A
0.1 0.1 1
20s PULSE WIDTH TJ = 175C
10
A
100
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics, T J = 25oC
Fig 2. Typical Output Characteristics, TJ = 175oC
100
3.0
TJ = 25C
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = 18A
I D , Drain-to-Source Current (A)
2.5
TJ = 175C
10
2.0
1.5
1
1.0
0.5
0.1 2 3 4 5 6
V DS= 15V 20s PULSE WIDTH
7 8 9 10
A
0.0 -60 -40 -20
VGS = 10V
0 20 40 60
A
8 0 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRLIZ24N
800
VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
600
Ciss
V GS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + C gd
15
I D = 11A VDS = 44V VDS = 28V
12
9
400
C oss
6
200
Crss
3
0 1 10 100
A
0 0 4 8
FOR TEST CIRCUIT SEE FIGURE 13
12 16 20
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
I SD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
I D , Drain Current (A)
TJ = 175C TJ = 25C
10
100 10s
10
100s
1 0.4 0.8 1.2 1.6
VGS = 0V
A
1 1
TC = 25C TJ = 175C Single Pulse
10
1ms 10ms 100
2.0
A
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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IRLIZ24N
VDS
14
RD
VGS
12
D.U.T.
+
RG
I D, Drain Current (Amps)
-VDD
10
5.0V
8 Pulse Width 1 s Duty Factor 0.1 %
6
Fig 10a. Switching Time Test Circuit
VDS 90%
4
2
0 25 50 75 100 125 150
A
175
TC , Case Temperature (C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
10
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
D = 0.50
1
0.20 0.10 0.05 0.02 0.01
P DM
0.1
SINGLE PULSE (THERMAL RESPONSE)
Notes: 1. Duty factor D = t
t
1 t2
1
/t
2
0.01 0.00001
2. Peak TJ = P DM x Z thJC + T C
A
10
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLIZ24N
L
E AS , Single Pulse Avalanche Energy (mJ)
VDS D.U.T. RG + V - DD
5.0 V
140
120
ID 4.5A 7.8A BOTTOM 11A TOP
100
IAS tp
0.01
80
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp VDD VDS
60
40
20
0
VDD = 25V
25 50 75 100 125 150
A
175
Starting TJ , Junction Temperature (C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
5.0 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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IRLIZ24N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
D.U.T
+
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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IRLIZ24N
Package Outline -- TO-220 Fullpak
Dimensions are shown in millimeters (inches)
10.60 (.417) 10.40 (.409)
o
3.40 (.133) 3.10 (.123) -A -
4.80 (.189) 4.60 (.181)
2.80 (.110) 2.60 (.102) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE
3.70 (.145) 3.20 (.126)
7.10 (.280) 6.70 (.263)
16.00 (.630) 15.80 (.622)
1.15 (.045) MIN. 1 2 3
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982 2 CONTROLLING DIMENSION: INCH.
3.30 (.130) 3.10 (.122) -B13.70 (.540) 13.50 (.530) C D
A 1.40 (.055) 3X 1.05 (.042) 2.54 (.100) 2X 0.90 (.035) 3X 0.70 (.028) 0.25 (.010) M AM B 3X 0.48 (.019) 0.44 (.017)
B
2.85 (.112) 2.65 (.104)
MINIMUM CREEPAGE DISTANCE BETWEEN A-B-C-D = 4.80 (.189)
Part Marking
EXAMPLE : THIS IS AN IRFI840G WITH ASSEMBLY LOT CODE E401
A
INTERNATIONAL RECTIFIER IRFI840G LOGO
E401 9245
PART NUMBER
ASSEMBLY LOT CODE
DATE CODE (YYWW) YY = YEAR WW = WEEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 4/96
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