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Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR FEATURES * 1 LVCMOS/LVTTL output, 15 output impedance * Crystal oscillator interface designed for 18pF parallel resonant crystals * Output frequency range: 70MHz - 170MHz * VCO range: 560MHz - 680MHz * RMS phase jitter at 155.52MHz (1.875MHz - 20MHz): 0.48ps (typical) * RMS phase noise at 155.52MHz Offset Noise Power 100Hz ............... -99.7 dBc/Hz 1KHz ................ -120 dBc/Hz 10KHz ................ -128 dBc/Hz 100KHz ................ -127 dBc/Hz * 3.3V or 2.5V operating supply * -40C to 85C ambient operating temperature * Lead-Free fully RoHS compliant GENERAL DESCRIPTION The ICS840051I is a Gigabit Ethernet Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS840051I can synthesize 10 Gigabit Ethernet, SONET, or Serial ATA reference clock frequencies with the appropriate choice of crystal and output divider. The ICS840051I has excellent phase jitter performance and is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. ICS FREQUENCY TABLE Inputs Crystal Frequency (MHz) 20.141601 20.141601 19.53125 19.53125 19.44 19.44 18.75 18.75 FREQ_SEL 0 1 0 1 0 1 0 1 Output Frequency (MHz) 161.132812 80.566406 156.25 78.125 155.52 77.76 15 0 75 BLOCK DIAGRAM OE Pullup FREQ_SEL Pulldown PIN ASSIGNMENT VDDA OE XTAL_OUT XTAL_IN Q0 1 2 3 4 8 7 6 5 VDD Q0 GND FREQ_SEL XTAL_IN OSC XTAL_OUT Phase Detector VCO 560MHz-680MHz 0 /4 (default) 1 /8 ICS840051I 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View /32 (fixed) 840051AGI www.icst.com/products/hiperclocks.html 1 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR Type Power Input Input Input Power Description TABLE 1. PIN DESCRIPTIONS Number 1 2 3, 4 5 6 7 8 Name VDDA OE XTAL_OUT, XTAL_IN FREQ_SEL GND Q0 VDD Analog supply pin. Output enable pin. When HIGH, Q0 output is enabled. When LOW, Pullup forces Q0 to HiZ state. LVCMOS/LVTTL interface levels. See Table 3A. Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. See Table 3B. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. 15 output impedance. Core supply pin. Output Power NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN CPD RPULLUP RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Input Pulldown Resistor Output Impedance VDD, VDDA = 3.465V VDD, VDDA = 2.625V Test Conditions Minimum Typical 4 7 7 51 51 15 Maximum Units pF pF pF K K TABLE 3A. CONTROL FUNCTION TABLE Control Input OE 0 1 Output Q0 Hi-Z Active TABLE 3B. FREQ_SEL FUNCTION TABLE Control Input FRE_SEL 0 1 N Divider /4 (default) /8 840051AGI www.icst.com/products/hiperclocks.html 2 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR 4.6V -0.5V to VDD + 0.5 V -0.5V to VDD + 0.5V 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 Maximum 3.465 3.465 60 10 Units V V mA mA TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 2.375 2.375 Typical 2.5 2.5 Maximum 2.625 2.625 55 10 Units V V mA mA TABLE 4C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current FREQ_SEL OE FREQ_SEL OE VDD = VIN = 3.465V or 2.625V VDD = VIN = 3.465V or 2.625V VDD = 3.465V or 2.625V, VIN = 0V VDD = 3.465V or 2.625V, VIN = 0V VDD = 3.465V VDD = 2.625V -5 -150 2.6 1.8 0.5 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 0.8 150 5 Units V V A A A A V V V Output High Voltage; NOTE 1 VOL Output Low Voltage; NOTE 1 VDD = 3.465V or 2.625V NOTE 1: Outputs terminated with 50 to VDD/2. See Parameter Measurement Information Section, "Output Load Test Circuit" diagrams. 840051AGI www.icst.com/products/hiperclocks.html 3 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR Test Conditions Minimum 17.5 Typical Fundamental 21.25 50 7 MHz pF Maximum Units TABLE 5. CRYSTAL CHARACTERISTICS Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance TABLE 6A. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C Symbol fOUT Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 155.52MHz, Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 70 0.48 150 48 500 52 Typical Maximum 170 Units MHz ps ps % tjit(O) tR / tF odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots. TABLE 6B. AC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C Symbol fOUT Parameter Output Frequency RMS Phase Jitter ( Random); NOTE 1 Output Rise/Fall Time Test Conditions 155.52MHz, Integration Range: 1.875MHz - 20MHz 20% to 80% Minimum 70 0.50 200 49 600 51 Typical Maximum 170 Units MHz ps ps % tjit(O) tR / tF odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plots. 840051AGI www.icst.com/products/hiperclocks.html 4 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR TYPICAL PHASE NOISE AT 155.52MHZ (3.3V) 0 -10 -20 -30 -40 -50 NOISE POWER dBc Hz -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.48ps (typical) Raw Phase Noise Data Phase Noise Result by adding 10GigE Filter to raw data 100k 1M 10M 100M OFFSET FREQUENCY (HZ) TYPICAL PHASE NOISE AT 155.52MHZ (2.5V) -10 -20 -30 -40 -50 10GigE Filter 155.52MHz RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.50ps (typical) 0 NOISE POWER dBc Hz -60 -70 -80 -90 -100 -110 Raw Phase Noise Data -120 -130 -140 -150 -160 -180 -190 100 840051AGI 1k 10k OFFSET FREQUENCY (HZ) www.icst.com/products/hiperclocks.html 5 REV. A JANUARY 14, 2005 -170 Phase Noise Result by adding 10GigE Filter to raw data 100k 1M 10M 100M 10GigE Filter 155.52MHz Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 1.65V 5% 1.25V5% VDD, VDDA SCOPE Qx VDD, VDDA SCOPE Qx LVCMOS GND LVCMOS GND -1.65V 5% -1.25V5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT 2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT Phase Noise Plot V DD Q0 Pulse Width t 2 Noise Power Phase Noise Mask PERIOD odc = t PW t PERIOD f1 Offset Frequency f2 RMS Jitter = Area Under the Masked Phase Noise Plot OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD RMS PHASE JITTER 80% 20% tR 80% 20% tF Clock Outputs OUTPUT RISE/FALL TIME 840051AGI www.icst.com/products/hiperclocks.html 6 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION POWER SUPPLY FILTERING TECHNIQUES As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840051I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin. 3.3V or 2.5V VDD .01F 10 V DDA .01F 10F FIGURE 1. POWER SUPPLY FILTERING CRYSTAL INPUT INTERFACE The ICS840051I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 26.04167MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts. XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 22p Figure 2. CRYSTAL INPUt INTERFACE 840051AGI www.icst.com/products/hiperclocks.html 7 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR RELIABILITY INFORMATION TABLE 7. JAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP JA by Velocity (Meters per Second) 0 Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W 1 90.5C/W 2.5 89.8C/W TRANSISTOR COUNT The transistor count for ICS840051I is: 1927 840051AGI www.icst.com/products/hiperclocks.html 8 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR 8 LEAD TSSOP PACKAGE OUTLINE - G SUFFIX FOR TABLE 8. PACKAGE DIMENSIONS SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum Reference Document: JEDEC Publication 95, MO-153 840051AGI www.icst.com/products/hiperclocks.html 9 REV. A JANUARY 14, 2005 Integrated Circuit Systems, Inc. ICS840051I FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR Marking 051AI 051AI TBD TBD Package 8 Lead TSSOP 8 Lead TSSOP 8 Lead "Lead-Free" TSSOP 8 Lead "Lead-Free" TSSOP Shipping Packaging tube 2500 tape & reel tube 2500 tape & reel Temperature -40C to 85C -40C to 85C -40C to 85C -40C to 85C TABLE 9. ORDERING INFORMATION Part/Order Number ICS840051AGI ICS840051AGIT ICS840051AGILF ICS840051AGILFT The aforementioned trademarks, HiPerClockSTM and FemtoClocksTM are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840051AGI www.icst.com/products/hiperclocks.html 10 REV. A JANUARY 14, 2005 |
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