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HYR16xx49G 64MB & 128MB Rambus RIMM Modules
Direct RDRAM RIMM Modules (with 288 Mbit RDRAMs)
Overview The Direct RambusTM RIMMTM module is a general purpose high-performance memory subsystem suitable for use in a broad range of applications including computer memory, personal computers, workstations, and other applications where high bandwidth and low latency are required. The Direct Rambus RIMM module consists of 288 Mbit Direct Rambus DRAM (Direct RDRAMTM) devices. These are extremely high-speed CMOS DRAMs organized as 16M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10 ns per sixteen bytes). The RDRAM architecture enables the highest sustained bandwidth for multiple, simultaneous, randomly addressed, memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The RDRAM's 32-bank architecture supports up to four simultaneous transactions per device. Form Factor These family of 64MByte and 128MByte Rambus RIMM modules are offered in a 184-pad 1 mm edge connector pad pitch form factor suitable for 184 contact RIMM connectors. The RIMM module is suitable for desktop and other system applications. The next figure shows an eight device Rambus RIMM module without heat spreader.
Features * 64 MByte and 128 MByte non-ECC versions * High speed 800 & 600 MHz RDRAM storage * 184 edge connector pads with 1 mm pad spacing * Maximum module PCB size: 133.5 mm x 31.75 mm x 1.37 mm (5.25" x 1.25" x 0.05") * Each RDRAM has 32 banks, for a total of 128 or 64 banks on each 128 MB or 64 MB module respectively.
,
* Gold plated edge connector pad contacts * Serial Presence Detect (SPD) support * Operates from a 2.5 V supply ( 5%) * Low power and powerdown self refresh modes * Separate Row and Column buses for higher efficiency
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HYR16xx49G 64MB & 128MB Rambus RIMM Modules
Part Number Designators Organization Capacity 64 MB
32 MB x 16 32 MB x 16 64 MB 64 MB 128 MB 128 MB 600 800 600 800 HYR163249G-653 HYR163249G-840 HYR166449G-653 HYR166449G-845 2 2 4 4 288 Mbit 288 Mbit
I/O Frequency [MHz]
Part Designator
# of RDRAMs
RDRAM Density
128 MB
64 MB x 16 64 MB x 16
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Pin Configuration PIN A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 Pin Name GND LDQA8 GND LDQA6 GND LDQA4 GND LDQA2 GND LDQA0 GND LCTMN GND LCTM GND N.C. GND LROW1 GND LCOL4 GND LCOL2 GND LCOL0 GND LDQB1 GND LDQB3 GND LDQB5 GND LDQB7 GND PIN B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 Pin Name GND LDQA7 GND LDQA5 GND LDQA3 GND LDQA1 GND LCFM GND LCFMN GND N.C. GND LROW2 GND LROW0 GND LCOL3 GND LCOL1 GND LDQB0 GND LDQB2 GND LDQB4 GND LDQB6 GND LDQB8 GND 3 PIN A47 A48 A48 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 Pin Name N.C. N.C. N.C. N.C. PIN B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 Pin Name N.C. N.C. N.C. N.C.
VREF
VREF
GND SCL
GND SA0
VDD
SDA SVdd SWP
VDD
SA1 SVdd SA2
VDD
RSCK GND RDQB7 GND RDQB5 GND RDQB3 GND RDQB1 GND RCOL0 GND RCOL2 GND RCOL4 GND RROW1 GND N.C. GND RCTM
VDD
RCMD GND RDQB8 GND RDQB6 GND RDQB4 GND RDQB2 GND RDQB0 GND RCOL1 GND RCOL3 GND RROW0 GND RROW2 GND N.C. 9.01
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HYR16xx49G 64MB & 128MB Rambus RIMM Modules
Pin Configuration (cont'd) PIN A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 Pin Name LSCK PIN B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 Pin Name LCMD PIN A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 Pin Name GND RCTMN GND RDQA0 GND RDQA2 GND RDQA4 GND RDQA6 GND RDQA8 GND PIN B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 Pin Name GND RCFMN GND RCFM GND RDQA1 GND RDQA3 GND RDQA5 GND RDQA7 GND
VCMOS
SOUT
VCMOS
SIN
VCMOS
N.C. GND N.C.
VCMOS
N.C. GND N.C.
VDD VDD
N.C. N.C. N.C. N.C.
VDD VDD
N.C. N.C. N.C. N.C.
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Module Connector Pad Description Signal GND Module Connector Pads A1, A3, A5, A7, A9, A11, A13, A15, A17, A19, A21, A23, A25, A27, A29, A31, A33, A39, A52, A60, A62, A64, A66, A68, A70, A72, A74, A76, A78, A80, A82, A84, A86, A88, A90, A92, B1, B3, B5, B7, B9, B11, B13, B15, B17, B19, B21, B23, B25, B27, B29, B31, B33, B39, B52, B60, B62, B64, B66, B68, B70, B72, B74, B76, B78, B80, B82, B84, B86, B88, B90, B92 B10 I/O - Type - Description Ground reference for RDRAM core and interface. 72 PCB connector pads.
LCFM
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. Serial Command used to read from and write to the control registers. Also used for power management. Column bus. 5-bit bus containing control and address information for column accesses. Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LDQA8 is non-functional on modules with x16 RDRAM devices.
LCFMN
B12
I
RSL
LCMD
B34
I
VCMOS
LCOL4 ... LCOL0 LCTM
A20, B20, A22, B22, A24
I
RSL
A14
I
RSL
LCTMN
A12
I
RSL
LDQA8 ... LDQA0
A2, B2, A4, B4, A6, B6, A8, B8, A10
I/O
RSL
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Module Connector Pad Description (cont'd) Signal LDQB8 ... LDQB0 Module Connector Pads B32, A32, B30, A30, B28, A28, B26, A26, B24 I/O I/O Type RSL Description Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LDQB8 is non-functional on modules with x16 RDRAM devices. Row bus. 3-bit bus containing control and address information for row accesses. Serial Clock input. Clock source used to read from and write to the RDRAM control registers. These pads are not connected. These connector pads are reserved for future use.
LROW2 ... LROW0 LSCK
B16, A18, B18
I
RSL
A34
I
VCMOS
N.C.
A16, B14, A38, B38, A40, B40, A77, B79;A43, B43, A44, B44, A45, B45, A46, B46, A47, B47, A48, B48, A49, B49, A50, B50 B83
-
-
RCFM
I
RSL
Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. Serial Command Input used to read from and write to the control registers. Also used for power management. Column bus. 5-bit bus containing control and address information for column accesses. Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RDQA8 is non-functional on modules with x16 RDRAM devices. 9.01
RCFMN
B81
I
RSL
RCMD
B59
I
VCMOS
RCOL4 ... RCOL0 RCTM
A73, B73, A71, B71, A69
I
RSL
A79
I
RSL
RCTMN
A81
I
RSL
RDQA8 ... RDQA0
A91, B91, A89, B89, A87, B87, A85, B85, A83
I/O
RSL
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HYR16xx49G 64MB & 128MB Rambus RIMM Modules
Module Connector Pad Description (cont'd) Signal RDQB8 ... RDQB0 Module Connector Pads B61, A61, B63, A63, B65, A65, B67, A67, B69 I/O I/O Type RSL Description Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RDQB8 is non-functional on modules with x16 RDRAM devices. Row bus. 3-bit bus containing control and address information for row accesses. Serial Clock input. Clock source used to read from and write to the RDRAM control registers. Serial Presence Detect Address 0. Serial Presence Detect Address 1. Serial Presence Detect Address 2. Serial Presence Detect Clock. Serial Presence Detect Data (Open Collector I/O). Serial I/O for reading from and writing to the control registers. Attaches to SIO0 of the first RDRAM on the module. Serial I/O for reading from and writing to the control registers. Attaches to SIO1 of the last RDRAM on the module. SPD Voltage. Used for signals SCL, SDA, SWE, SA0, SA1 and SA2. Serial Presence Detect Write Protect (active high). When low, the SPD can be written as well as read. CMOS I/O Voltage. Used for signals CMD, SCK, SIN, SOUT. Supply voltage for the RDRAM core and interface logic. Logic threshold reference voltage for RSL signals.
RROW2 ... RROW0 RSCK
B77, A75, B75
I
RSL
A59
I
VCMOS
SA0 SA1 SA2 SCL SDA SIN
B53 B55 B57 A53 A55 B36
I I I I I/O I/O
SVDD SVDD SVDD SVDD SVDD
VCMOS
SOUT
A36
I/O
VCMOS
SVDD SWP
A56, B56 A57
- I
- SVDD
VCMOS VDD VREF
A35, B35, A37, B37 A41, A42, A54, A58, B41, B42, B54, B58 A51, B51
- - -
- - -
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1 per 2 R AM DR s puls one near C onnector 0.1 F
2 per RR D AM 0.1 F
1 per 2 R AM DR s 0.1 F
N
2
4
VC OS M
M odule Capacity
GN D
GD N
Vd d
GD N
Vref
UN
U1
U2
U3
128M B
64M B
0.1F
N ote 1: Ram bus C hannel signals form a loop through the RIM mod M ule, w the exception of the SIO ith chain. N ote 2: Se Serial Presence D ction Sp e ete ecification for information on the SPD de vice and its contents.
RIMM Module Functional Diagram
SIN LSCK LC MD VR EF
SO T U
RK SC
RM CD
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SIO1 SIO0 SCK CMD VREF SIO1 SIO0 SCK CMD VREF SIO1 SIO0 SCK CMD VREF SIO1 SIO0 SCK CMD VREF
LDQ A8 LDQ A7 LDQ A6 LDQ A5 LDQ A4 LDQ A3 LDQ A2 LDQ A1 LDQ A0 LC FM LC FMN LC TM LC TMN LR W O2 LR W O1 LR W O0 LC L4 O LC L3 O LC L2 O LC L1 O LC L0 O LDQ B0 LDQ B1 LDQ B2 LDQ B3 LDQ B4 LDQ B5 LDQ B6 LDQ B7 LDQ B8 D QA8 D QA7 D QA6 D QA5 D QA4 D QA3 D QA2 D QA1 D QA0 C FM C FMN C TM C TMN RW O2 RW O1 RW O0 C4 OL C3 OL C2 OL C1 OL C0 OL D QB0 D QB1 D QB2 D QB3 D QB4 D QB5 D QB6 D QB7 D QB8
D A8 Q D A7 Q D A6 Q D A5 Q D A4 Q D A3 Q D A2 Q D A1 Q D A0 Q C FM CN FM C TM CN TM RW O2 RW O1 RW O0 C L4 O C L3 O C L2 O C L1 O C L0 O D B0 Q D B1 Q D B2 Q D B3 Q D B4 Q D B5 Q D B6 Q D B7 Q D B8 Q
D A8 Q D A7 Q D A6 Q D A5 Q D A4 Q D A3 Q D A2 Q D A1 Q D A0 Q C FM CN FM C TM CN TM RW O2 RW O1 RW O0 C L4 O C L3 O C L2 O C L1 O C L0 O D B0 Q D B1 Q D B2 Q D B3 Q D B4 Q D B5 Q D B6 Q D B7 Q D B8 Q
DQ A8 DQ A7 DQ A6 DQ A5 DQ A4 DQ A3 DQ A2 DQ A1 DQ A0 CFM CFM N CTM CTM N RW O2 RW O1 RW O0 CO L4 CO L3 CO L2 CO L1 CO L0 DQ B0 DQ B1 DQ B2 DQ B3 DQ B4 DQ B5 DQ B6 DQ B7 DQ B8
RQ D A8 RQ D A7 RQ D A6 RQ D A5 RQ D A4 RQ D A3 RQ D A2 RQ D A1 RQ D A0 R FM C R FM CN R TM C R TM CN RO 2 RW RO 1 RW RO 0 RW RO C L4 RO C L3 RO C L2 RO C L1 RO C L0 RQ D B0 RQ D B1 RQ D B2 RQ D B3 RQ D B4 RQ D B5 RQ D B6 RQ D B7 RQ D B8
Serial Presence D etect
SVdd
. . .
Direct RDRAM (288 Mb)
Direct RDRAM (288 Mb)
Direct RDRAM (288 Mb)
Direct RDRAM (288 Mb)
SD A
Vcc SD A
SC L
A[0:2]
U0
Gnd
SA[0:2]
SVdd
SW P
SC L
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HYR16xx49G 64MB & 128MB Rambus RIMM Modules
Absolute Maximum Ratings Symbo Parameter l Limit Values min. - 0.3 - 0.5 - 50 max. Unit V V
VI,ABS VDD,ABS TSTORE
Voltage applied to any RSL or CMOS signal pad with respect to GND Voltage on V DD with respect to GND Storage temperature
VDD + 0.3 VDD + 1.0
100
C
DC Recommended Electrical Conditions Symbol Parameter and Conditions min. Limit Values max. 2.50 + 0.13 2.5 + 0.25 1.8 + 0.2 1.4 + 0.2 V V V V V V V V V V 2.50 - 0.13 2.5 - 0.13 1.8 - 0.1 1.4 - 0.2 Unit
VDD VCMOS
Supply voltage CMOS I/O power supply at pad for 2.5 V controllers: CMOS I/O power supply at pad for 1.8 V controllers: Reference voltage RSL input low voltage RSL input high voltage CMOS input low voltage CMOS input high voltage
VREF VIL VIH VIL,CMOS VIH,CMOS
VREF - 0.5 VREF + 0.2
- 0.3 -
VREF - 0.2 VREF + 0.5
0.5 VCMOS - 0.25 0.3 - 10 x no. RDRAMs1) 10 x no. RDRAMs1) 10.0
0.5 V CMOS + 0.25 VCMOS + 0.7
VOL,CMOS CMOS output low voltage @ IOL,CMOS = 1 mA VOH,CMOS CMOS output high voltage @ IOH,CMOS = - 0.25 mA IREF ISCK,CMD ISIN,SOUT VREF current @ VREF,MAX
CMOS input leakage current @ (0 VCMOS VDD ) CMOS input leakage current @ (0 VCMOS VDD )
VCMOS - 0.3
- 10 x no. RDRAMs1) - 10 x no. RDRAMs1) - 10.0
A A A
1) The table below shows the number of 288 Mbit RDRAM devices contained in a RIMM module of
listed memory storage capacity. RIMM Module Capacity Number of 288 Mbit RDRAM devices 64MB 2 128 MB 4
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AC Electrical Specifications Symbol Z Parameter and Conditions min. Module Impedance Average clock delay from finger of all RSL clock nets (CTM, CTMN, CFM and CFMN) Propagation delay variation of RSL signals with respect to TPD2)3 ) for 4 and 8 device modules Propagation delay variation of RSL signals with respect to TPD2)3 ) for 16 device modules 25.2 - - 21 - 24 - 100 - - - Limit Values typ. 28 - - - - - - - max. 30.8 See Table1) 21 24 100 See Table1) See Table1) See Table1) Unit
ns ps ps ps % % %
TPD
TPD
TPD-CMOS Propagation delay variation of SCK and CMD signals with respect to an average clock delay2)
VA /VIN VXF/VIN VXB /VIN
Attenuation Limit Forward crosstalk coefficient (300 ps input rise time @ 20%-80%) Backward crosstalk coefficient (300 ps input rise time @ 20%-80%)
1) Table below lists parameters and specifications for different storage capacity RIMM Modules that use 288 Mbit RDRAM devices. 2) Average clock delay is defined as the average delay from finger to finger of all RSL clock nets (CTM, CTMN, .....CFM and CFMN). 3.) If the RIMM module meets the folowwing specifications, then it is compliant to the specification. If the RIMM .....module does not meet these specifications, then the specification can be adjusted by the "Adjusted TPD.....Specification" table.
Adjusted TPD Specfication
Symbol
Parameter and Conditions
Adjusted Min/Max
Absolute Min /Max -30 30
Unit
TPD
Propagation delay variation of RSL signals a with respect to TPD for 4 and 8 device modules +/-[17+(18*N*Z0)] Propagation delay variation of RSL signals with respect to TPD for 16 device modules +/-[24+(18*N*Z0)]
ps
-50
50
ps
a) Where: N = Nuber of RDRAM devices installed on the RIMm module DZ0 = delta Z0% =(max Z0 - minZ0)/(min Z0) (max Z= and min Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers on the modules)
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AC Electrical Specifications for RIMM Modules 64 MB 2 Symbo RIMM Module Capacity: No. of 288 Mbit RDRAMs: l Parameter and Conditions for -800, 711& -600 RIMM Modules 128 MB 4 max. 1.28 1.28 12 10.5 2 1.5 0.6 ns ns % % % % Unit
max. 1.28 1.28 12 10.5 2 1.5 0.6
TPD VA /VIN VXF/VIN VXB /VIN RDC
Propagation Delay, all RSL signals -800 Propagation Delay, all RSL signals -600 Attenuation Limit -800 Attenuation Limit -600 Forward crosstalk coefficient (300 ps input rise time @ 20% - 80%) -800, -600 Backward crosstalk coefficient (300 ps input rise time @ 20%-80%) -800, -600 DC Resistance Limit -800, -600
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RIMM Module Current Profile
No. of 288 Mbit RDRAMs:
RIMM Modules Power Conditionsa)
Freq. -800 -600 -800 -600 -800 -600 -800 -600 -800 -600 -800 -600
max. 932 794 1038 764 1107 946 932 794 1038 764 1107 946
64 MB 2
IDD
RIMM Module Capacity:
128 MB 4 max. 940 812 1257 974 1465 1258 940 812 1257 974 1465 1258
Unit
IDD1 IDD2 IDD3 IDD4 IDD5 IDD6
One RDRAM in Readb, balance in NAP mode One RDRAM in Readb, balance in Standby mode One RDRAM in Read , balance in Active mode One RDRAM in Write, balance in Active mode One RDRAM in Write, balance in Standby mode One RDRAM in Write, balance in Active mode
b
mA mA mA mA mA mA mA mA mA mA mA mA
a) Actual power will depend on individual memory controller and usage pattern. Power does not include Refresh Current. b) I/O power is a function of the percentage of 1's, to add I/O power for 50% 1's for a x 16 need to add 257mA per module for the following: VDD = 2.5V, VTERM = 1.8V, VREF = 1.4V and VDIL = VREF = 0.5V.
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The following defines the RIMM module dimensions. All units are in millimeters.
Fig.2 : RIMM Module PCB Physical Description
RIMM Module PCB Physical Description Dimension Description min. A B C D E F G PCB length PCB height Center-center pad width from pad A1 to A46, A47 to A92, B1 to B46 or B47 to B92 Spacing from PCB left edge to connector key notch Spacing from contact pad PCB edge to side edge retainer notch PCB thickness Heat spreader thickness from PCB surface (one side) to heat spreader top surface 133.20 5.244 - - 55.10 2.169 - 1.17 0.046 - Limit Values nom. 133.35 5.250 - - 55.175 2.172 - 1.27 0.050 - max. 133.50 5.256 31.75 1.25 45.00 1.770 55.25 2.175 17.78 0.700 1.37 0.054 3.02 0.119 mm in mm in mm in mm in mm in mm in mm in Unit
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Standard RIMM Module Marking The RIMM modules available from INFINEON Technoligies will be marked per Figure 3 below. This marking will help OEMs and users identify the Rambus RIMM modules when used in specific system applications. This will assist OEMs or users to specify and correctly verify if the correct RIMM modules are installed in their systems. In the diagram, a label is shown attached to the RIMM module's heat spreader.
F
A
B
C
G
D
E
Fig.3 Standard RIMM Module Marking
Label Field A B C Module Memory Capacity
Description Number of 8-bit MBytes of RDRAM storage in RIMM module
Marked Text 128MB, 64MB 4, 2 blank = 8-bit Byte
Unit MB RDRAM devices -
Number of RDRAMs Number of RDRAM devices contained in the RIMM module ECC Support Indicates whether the RIMM module supports 8-bit (no ECC) or 9-bit (ECC) Bytes Data transfer speed for RDRAM RIMM module Row Access Time INFINEON part number
D E F G
Memory Speed tRAC Part Number
800, 600 -45, -53
MHz ns
Manufacturing Code Date Code etc.
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