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September 2005 rev 0.5 3.3V Zero Delay Buffer
Features
Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer "ASM5P2304B Configurations Table". Input frequency range: 4MHz to 20MHz Multiple low-skew outputs. Output-output skew less than 200pS. Device-device skew less than 500pS. Two banks of four outputs. Less than 200pS Cycle-to-Cycle jitter (-1, -1H, -2, -2H). Available in space saving, 8-pin 150 mil SOIC Package. 3.3V operation. Advanced 0.35 CMOS technology. Industrial temperature available.
ASM5P2304B
has an on-chip PLL, which locks to an input clock, presented on the REF pin. The PLL feedback is required to be driven to FBK pin, and can be obtained from one of the outputs. The input-to-output propagation delay is guaranteed to be less than 250pS, and the output-to-output skew is guaranteed to be less than 200pS. The ASM5P2304B has two banks of two outputs each. Multiple ASM5P2304B devices can accept the same input clock and distribute it. In this case the skew between the outputs of the two devices is guaranteed to be less than 500pS. The ASM5P2304B is available in two different
configurations (Refer "ASM5P2304B Configurations Table). The ASM5P2304B-1 is the base part, where the output frequencies equal the reference if there is no counter in the feedback path. The ASM5P2304B-1H is the high-drive version of the -1 and the rise and fall times on this device are much faster. The ASM5P2304B-2 allows the user to obtain REF and 1/2X or 2X frequencies on each output bank. The exact configuration and output frequencies depend on which output drives the feedback pin. high-speed clocks in PC,
Functional Description
ASM5P2304B is a versatile, 3.3V zero-delay buffer designed to distribute workstation, datacom, telecom and other high-performance applications. It is available in an 8 pin package. The part
Block Diagram
FBK CLKA1 REF PLL
CLKA2
/2
Extra Divider (-2)
CLKB1
CLKB2
Alliance Semiconductor 2575 Augustine Drive * Santa Clara, CA * Tel: 408.855.4900 * Fax: 408.855.4999 * www.alsc.com
Notice: The information in this document is subject to change without notice.
September 2005 rev 0.5
ASM5P2304B Configurations
ASM5P2304B
Device
ASM5P2304B-1 ASM5P2304B-1H ASM5P2304B-2 ASM5P2304B-2 ASM5P2304B-2H ASM5P2304B-2H
Feedback From
Bank A or Bank B Bank A or Bank B Bank A Bank B Bank A Bank B
Bank A Frequency
Reference Reference Reference 2 X Reference Reference 2 X Reference
Bank B Frequency
Reference Reference Reference /2 Reference Reference /2 Reference
Zero Delay and Skew Control
For applications requiring zero input-output delay, all outputs must be equally loaded.
1500
1000
REF-Input to CLKA/CLKB Delay (pS)
500
0 -30 -500 -25 -20 -15 -10 -5 0
5
10
15
20
25
30
-1000
-1500
Output Load Difference: FBK Load - CLKA/CLKB Load (pF)
REF Input to CLKA/CLKB Delay Vs Difference in Loading between FBK pin and CLKA/CLKB pins
To close the feedback loop of the ASM5P2304B, the FBK pin can be driven from any of the four available output pins. The output driving the FBK pin will be driving a total load of 7pF plus any additional load that it drives. The relative loading of this output (with respect to the remaining outputs) can adjust the input output delay. This is shown in the above graph. For applications requiring zero input-
output delay, all outputs including the one providing feedback should be equally loaded. If input-output delay adjustments are required, use the above graph to calculate loading differences between the feedback output and remaining outputs. For zero output-output skew, be sure to load outputs equally.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Pin Configuration
REF CLKA1 CLKA2 GND 1 2 3 4 8 7 6 5 FBK VDD CLKB2 CLKB1
ASM5P2304B
ASM5P2304B
Pin Description for ASM5P2304B Pin #
1 2 3 4 5 6 7 8
Notes: 1. Weak pull-down. 2. Weak pull-down on all outputs.
Pin Name
REF1 CLKA12 CLKA22 GND CLKB12 CLKB2 2 VDD FBK
Description
Input reference frequency, 5V tolerant input Buffered clock output, bank A Buffered clock output, bank A Ground Buffered clock output, bank B Buffered clock output, bank B 3.3V supply PLL feedback input
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Absolute Maximum Ratings Parameter
Supply Voltage to Ground Potential DC Input Voltage (Except REF) DC Input Voltage (REF) Storage Temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B)
reliability.
ASM5P2304B
Min
-0.5 -0.5 -0.5 -65
Max
+7.0 VDD + 0.5 7 +150 260 150 2000
Unit
V V V C C C V
Note: These are stress ratings only and functional usage is not implied. Exposure to absolute maximum ratings for prolonged periods can affect device
Operating Conditions for ASM5P2304B Commercial Temperature Devices Parameter
VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance, from 4MHz to 20MHz Input Capacitance
3
Description
Min
3.0 0
Max
3.6 70 30 7
Unit
V C pF pF
Electrical Characteristics for ASM5P2304B Commercial Temperature Devices Parameter
VIL VIH IIL IIH VOL VOH
Description
Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage4 Output HIGH Voltage4 VIN = 0V VIN = VDD
Test Conditions
Min
Max
0.8
Unit
V V
2.0 50.0 100.0 0.4 2.4
A A V V
IOL = 8mA (-1, -2) IOH = 12mA (-1H, -2H) IOL = -8mA (-1, -2) IOH = -12mA (-1H, -2H) Unloaded outputs, 20MHz REF (-1,-1H, -2,-2H)
IDD
Supply Current
10
mA
Note: 3. Applies to both Ref Clock and FBK. 4. Parameter is guaranteed by design and characterization. Not 100% tested in production.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Switching Characteristics for ASM5P2304B Commercial Temperature Devices Parameter
1/t1
ASM5P2304B
Description
Output Frequency 5 Duty Cycle = (t2 / t1) * 100 (-1, -2, -1H, -2H) 5 Duty Cycle = (t2 / t1) * 100 (-1, -2,-1H, -2H) 5 Output Rise Time (-1, -2) 5 Output Rise Time (-1, -2) 5 Output Rise Time (-1H, -2H) 5 Output Fall Time (-1, -2) 5 Output Fall Time (-1, -2) 5 Output Fall Time (-1H, -2H) Output-to-output skew on same bank (-1, -2) Output-to-output skew (-1H, -2H) Output bank A -to- output bank B skew (-1, -2H) Output bank A to output bank b skew (-2) Delay, REF Rising Edge to FBK Rising 5 Edge Device-to-Device Skew 5 Output Slew Rate5
Test Conditions
30pF load, -1,-1H,-2, -2H devices Measured at 1.4V, FOUT = 20MHz 30pF load Measured at 1.4V, FOUT = <20MHz 15pF load Measured between 0.8V and 2.0V 30pF load Measured between 0.8V and 2.0V 15pF load Measured between 0.8V and 2.0V 30pF load Measured between 2.0V and 0.8V 30pF load Measured between 2.0V and 0.8V 15pF load Measured between 2.0V and 0.8V 30pF load All outputs equally loaded All outputs equally loaded All outputs equally loaded All outputs equally loaded Measured at VDD /2 Measured at VDD/2 on the FBK pins of the device Measured between 0.8V and 2.0V using Test Circuit #2 Measured at 20MHz, loaded outputs, 15pF load Measured at 20MHz, loaded outputs, 30pF load Measured at 20MHz, loaded outputs, 15pF load Measured at 20MHz, loaded outputs, 30pF load Measured at 20MHz, loaded outputs, 15pF load Stable power supply, valid clock presented on REF and FBK pins
Min Typ Max Unit
4 40.0 45.0 50.0 50.0 20 60.0 55.0 2.20 1.50 1.50 2.20 1.50 1.25 200 200 200 400 0 0 1 175 200 100 400 pS 375 1.0 mS pS 250 500 pS pS V/nS pS MHz % % nS nS nS nS nS nS
t3 t3 t3 t4 t4 t4
t5
t6 t7 t8
tJ
Cycle-to-cycle jitter 5 (-1, -1H, -2H)
tJ
Cycle-to-cycle jitter 5 (-2) PLL Lock Time 5
tLOCK
Note:
5. Parameter is guaranteed by design and characterization. Not 100% tested in production.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Operating Conditions for ASM5I2304B Industrial Temperature Devices Parameter
VDD TA CL CIN
Note: 6. Applies to both Ref Clock and FBK.
ASM5P2304B
Description
Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance, from 4MHz to 20MHz Input Capacitance
6
Min
3.0 -40
Max
3.6 85 30 7
Unit
V C pF pF
Electrical Characteristics for ASM5I2304B Industrial Temperature Devices Parameter
VIL VIH IIL IIH VOL VOH IDD
Note: 7. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Description
Input LOW Voltage Input HIGH Voltage Input LOW Current Input HIGH Current Output LOW Voltage7 Output HIGH Voltage7 Supply Current VIN = 0V VIN = VDD
Test Conditions
Min
2.0
Max
0.8 50.0 100.0 0.4
Unit
V V A A V V
IOL = 8mA (-1, -2) IOH = 12mA (-1H, -2H) IOL = -8mA (-1, -2) IOH = -12mA (-1H, -2H) Unloaded outputs, 20MHz REF (-1, -1H, -2, -2H) 2.4
10
mA
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Switching Characteristics for ASM5I2304B Industrial Temperature Devices
All parameters are specified with loaded outputs
ASM5P2304B
Parameter
t1
Description
Output Frequency 8 Duty Cycle = (t2 / t1) * 100 (-1, -2, -1H, -2H) 8 Duty Cycle = (t2 / t1) * 100 (-1, -2, -1H, -2H) 8 Output Rise Time (-1, -2) 8 Output Rise Time (-1, -2) 8 Output Rise Time (-1H, -2H) 8 Output Fall Time (-1, -2) 8 Output Fall Time (-1, -2) 8 Output Fall Time (-1H, -2H) Output-to-output skew on same bank (-1, -2)8 Output-to-output skew (-1H, -2H) Output bank A -to- output bank B skew (-1, -2H) Output bank A -to- output bank B skew (-2) Delay, REF Rising Edge to FBK Rising 8 Edge Device-to-Device Skew 8 Output Slew Rate8
Test Conditions
30pF load,-1, -1H,-2, -2H devices Measured at 1.4V, FOUT = <20MHz 30pF load Measured at 1.4V, FOUT = <20MHz 15pF load Measured between 0.8V and 2.0V 30pF load Measured between 0.8V and 2.0V 15pF load Measured between 0.8V and 2.0V 30pF load Measured between 2.0V and 0.8V 30pF load Measured between 2.0V and 0.8V 15pF load Measured between 2.0V and 0.8V 30pF load All outputs equally loaded All outputs equally loaded All outputs equally loaded All outputs equally loaded Measured at VDD /2 Measured at VDD/2 on the FBK pins of the device Measured between 0.8V and 2.0V using Test Circuit #2 Measured at 20MHz, loaded outputs, 15pF load Measured at 20MHz, loaded outputs, 30pF load Measured at 20MHz, loaded outputs, 15pF load Measured at 20MHz, loaded outputs, 30pF load Measured at 20MHz, loaded outputs, 15pF load Stable power supply, valid clock presented on REF and FBK pins
Min Typ Max Unit
4 20 MHz % % nS nS nS nS nS ns 40.0 50.0 60.0 45.0 50.0 55.0 2.50 1.50 1.50 2.50 1.50 1.25 200 200 pS 200 400 0 0 1 180 200 100 400 pS 380 1.0 mS pS 250 pS 500 pS V/nS
t3 t3 t3 t4 t4 t4
t5
t6 t7 t8
tJ
Cycle-to-cycle jitter 8 (-1, -1H, -2H)
tJ
Cycle-to-cycle jitter8 (-2) PLL Lock Time8
tLOCK
Note:
8. Parameter is guaranteed by design and characterization. Not 100% tested in production.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Switching Waveforms Duty Cycle Timing
t1 t
2
ASM5P2304B
1.4 V
1.4 V
1.4 V
All Outputs Rise/Fall Time
OUTPUT 2.0 V 0.8 V t3 t4 2.0 V 0.8 V 3.3 V 0V
Output - Output Skew
1.4 V OUTPUT 1.4 V OUTPUT t5
Input - Output Propagation Delay
VDD /2
INPUT
OUTPUT
VDD /2
t6
Device - Device Skew
CLKOUT, Device 1
V DD /2
CLKOUT, Device 2 t
7
V DD /2
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Test Circuits
ASM5P2304B
TEST CIRCUIT # 1 VDD 0.1uF CLKOUT OUTPUTS VDD 0.1uF GND GND CLOAD 0.1uF 0.1uF
TEST CIRCUIT # 2 VDD OUTPUTS VDD GND GND 1K 10pF 1K
For parameter t8 (output skew rate) on -1H devices
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Package Information 8-lead (150-mil) SOIC Package
ASM5P2304B
E
H
D
A2
A
e B A 1
C L
D
Dimensions
Symbol Min
A1 A A2 B C D E e H L
Inches Max
0.010 0.069 0.059 0.020 0.010 0.004 0.053 0.049 0.012 0.007
Millimeters Min Max
0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0 1.27 8 0.25 1.75 1.50 0.51 0.25
0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0 0.050 8
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Ordering Codes Ordering Code
ASM5P2304B-1-08-SR ASM5P2304B-1-08-ST ASM5I2304B-1-08-SR ASM5I2304B-1-08-ST ASM5P2304B-1H-08-SR ASM5P2304B-1H-08-ST ASM5I2304B-1H-08-SR ASM5I2304B-1H-08-ST ASM5P2304B-2-08-SR ASM5P2304B-2-08-ST ASM5I2304B-2-08-SR ASM5I2304B-2-08-ST ASM5P2304B-2H-08-SR ASM5P2304B-2H-08-ST ASM5I2304B-2H-08-SR ASM5I2304B-2H-08-ST ASM5P2304BF-1-08-SR ASM5P2304BF-1-08-ST ASM5I2304BF-1-08-SR ASM5I2304BF-1-08-ST ASM5P2304BF-1H-08-SR ASM5P2304BF-1H-08-ST ASM5I2304BF-1H-08-SR ASM5I2304BF-1H-08-ST ASM5P2304BF-2-08-SR ASM5P2304BF-2-08-ST ASM5I2304BF-2-08-SR ASM5I2304BF-2-08-ST ASM5P2304BF-2H-08-SR ASM5P2304BF-2H-08-ST ASM5I2304BF-2H-08-SR ASM5I2304BF-2H-08-ST ASM5P2304BG-1-08-SR ASM5P2304BG-1-08-ST ASM5I2304BG-1-08-SR ASM5I2304BG-1-08-ST
ASM5P2304B
Marking
5P2304B-1 5P2304B-1 5I2304B-1 5I2304B-1 5P2304B-1H 5P2304B-1H 5I2304B-1H 5I2304B-1H 5P2304B-2 5P2304B-2 5I2304B-2 5I2304B-2 5P2304B-2H 5P2304B-2H 5I2304B-2H 5I2304B-2H 5P2304BF-1 5P2304BF-1 5I2304BF-1 5I2304BF-1 5P2304BF-1H 5P2304BF-1H 5I2304BF-1H 5I2304BF-1H 5P2304BF-2 5P2304BF-2 5I2304BF-2 5I2304BF-2 5P2304BF-2H 5P2304BF-2H 5I2304BF-2H 5I2304BF-2H 5P2304BG-1 5P2304BG-1 5I2304BG-1 5I2304BG-1
Package Type
8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Pb free 8-pin 150-mil SOIC-TUBE, Pb free 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green
Operating Range
Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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Ordering Codes (cont'd) Ordering Code
ASM5P2304BG-1H-08-SR ASM5P2304BG-1H-08-ST ASM5I2304BG-1H-08-SR ASM5I2304BG-1H-08-ST ASM5P2304BG-2-08-SR ASM5P2304BG-2-08-ST ASM5I2304BG-2-08-SR ASM5I2304BG-2-08-ST ASM5P2304BG-2H-08-SR ASM5P2304BG-2H-08-ST ASM5I2304BG-2H-08-SR ASM5I2304BG-2H-08-ST
ASM5P2304B
Marking
5P2304BG-1H 5P2304BG-1H 5I2304BG-1H 5I2304BG-1H 5P2304BG-2 5P2304BG-2 5I2304BG-2 5I2304BG-2 5P2304BG-2H 5P2304BG-2H 5I2304BG-2H 5I2304BG-2H
Package Type
8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green 8-pin 150-mil SOIC-TAPE & REEL, Green 8-pin 150-mil SOIC-TUBE, Green
Operating Range
Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial Commercial Commercial Industrial Industrial
Device Ordering Information
ASM5P2304BF-08-SR
R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70
ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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September 2005 rev 0.5
ASM5P2304B
Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright (c) Alliance Semiconductor All Rights Reserved Part Number: ASM5P2304B Document Version: 0.5
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semicon
(c) Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
3.3V Zero Delay Buffer
Notice: The information in this document is subject to change without notice.
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