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74V2G74 SINGLE D-TYPE FLIP FLOP WITH PRESET AND CLEAR s s s s s s s s s HIGH SPEED: fMAX = 170 MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 A (MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V FUNCTION COMPATIBLE WITH 74 SERIES 74 IMPROVED LATCH-UP IMMUNITY SOT23-8L SOT323-8L ORDER CODES PACKAGE SOT23-8L SOT323-8L T&R 74V2G70STR 74V2G70CTR DESCRIPTION The 74V2G74 is an advanced high-speed CMOS SINGLE D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transfered to the Q and Q OUTPUTS during the positive going transition of the clock pulse. CLEAR and PRESET are independent of the clock and accomplished by a low setting on the appropriate input. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS December 2001 1/13 74V2G74 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 6 2 1 SYMBOL CLR D CK NAME AND FUNCTION Asyncronous Reset Direct Input Data Input Clock Input (LOW to HIGH, Edge Triggered) Asyncronous Set - Direct Input True Flip-Flop Output Complement Flip-Flop Output Ground (0V) Positive Supply Voltage 7 5 3 4 8 PR Q Q GND VCC TRUTH TABLE INPUTS CLR L H L H H H X= Don't care OUTPUTS FUNCTION D X X X L H X CK X X X Q L H H L H Qn Q H L H H L Qn NO CHANGE CLEAR PRESET PR H L L H H H LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/13 74V2G74 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 - 20 25 50 -65 to +150 300 Unit V V V mA mA mA mA C C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 1) (VCC = 3.3 0.3V) (VCC = 5.0 0.5V) Parameter Value 2 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 100 0 to 20 Unit V V V C ns/V 1) VIN from 30% to 70% of V CC 3/13 74V2G74 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 VOL Low Level Output Voltage 2.0 3.0 4.5 3.0 4.5 II ICC Input Leakage Current Quiescent Supply Current 0 to 5.5 5.5 IO=-50 A IO=-50 A IO=-50 A IO=-4 mA IO=-8 mA IO=50 A IO=50 A IO=50 A IO=4 mA IO=8 mA VI = 5.5V or GND VI = VCC or GND TA = 25C Min. 1.5 0.7VCC 0.5 0.3VCC 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 0.1 2 2.0 3.0 4.5 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 1 20 Typ. Max. Value -40 to 85C Min. 1.5 0.7VCC 0.5 0.3VCC 1.9 2.9 4.4 2.4 3.7 0.1 0.1 0.1 0.55 0.55 1 20 A A V V Max. -55 to 125C Min. 1.5 0.7VCC 0.5 0.3VCC V V Max. Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL VOH 4/13 74V2G74 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 3.3(*) 3.3 5.0 tPLH tPHL Propagation Delay Time PR or CLR to Q or Q (*) (**) Value TA = 25C Min. Typ. 6.7 9.2 4.6 6.1 7.6 10.1 4.8 6.3 6.0 5.0 6.0 5.0 6.0 5.0 0.5 0.5 5.0 3.0 Max. 11.9 15.4 7.3 9.3 12.3 15.8 7.7 9.7 -40 to 85C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 7.0 5.0 7.0 5.0 7.0 5.0 0.5 0.5 5.0 3.0 125 75 170 115 70 45 110 75 Max. 14.0 17.5 8.5 10.5 14.5 18.0 9.0 11.0 -55 to 125C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 7.0 5.0 7.0 5.0 7.0 5.0 0.5 0.5 5.0 3.0 70 45 110 75 MHz Max. 14.0 17.5 8.5 10.5 14.5 18.0 9.0 11.0 ns ns ns Unit CL (pF) 15 50 15 50 15 50 15 50 tPLH tPHL Propagation Delay Time CK to Q or Q 5.0(**) 3.3(*) 3.3 5.0 tW tW ts th tREM fMAX CK Pulse Width HIGH or LOW PR or CLR Pulse Width LOW (*) (**) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0 (**) ns Setup Time D to CK 3.3(*) HIGH or LOW 5.0(**) Hold Time D to CK 3.3(*) HIGH or LOW 5.0(**) Removal Time 3.3(*) PR or CLR to CK 5.0(**) Maximum Clock 3.3(*) Frequency 3.3(*) 5.0 (**) ns ns ns 15 50 15 50 80 50 130 90 5.0(**) (*) Voltage range is 3.3V 0.3V (**) Voltage range is 5.0V 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 3.3 3.3 fIN = 10MHz TA = 25C Min. Typ. 4 22 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 5/13 74V2G74 TEST CIRCUIT CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50) WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (D TO CK), CK MAXIMUM FREQUENCY , CK MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle) 6/13 74V2G74 WAVEFORM 2: PROPAGATION DELAYS MINIMUM PULSE WIDTH (CLR AND PR) (f=1MHz; 50% duty cycle) WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle) 7/13 74V2G74 WAVEFORM 4: PULSE WIDTHS 8/13 74V2G74 SOT23-8L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.22 0.09 2.80 2.60 1.50 0 .65 1.95 0.55 13.7 TYP MAX. 1.45 0.15 1.30 0.38 0.20 3.00 3.00 1.75 MIN. 35.4 0.0 35.4 8.6 3.5 110.2 102.3 59.0 25.6 76.7 21.6 TYP. MAX. 57.1 5.9 51.2 14.9 7.8 118.1 118.1 68.8 mils 9/13 74V2G74 SOT323-8L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.10 0.80 0.00 0.80 0.13 0.10 1.80 1.80 1.15 0.5 1.5 0.30 3.9 TYP MAX. 1.10 0.10 1.00 0.28 0.18 2.20 2.40 1.35 MIN. 31.5 0.0 31.5 5.1 3.9 70.9 70.9 45.3 19.7 59.0 11.8 TYP. MAX. 43.3 3.9 34.9 11.0 7.1 86.6 94.5 53.1 mils 10/13 74V2G74 Tape & Reel SOT23-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.13 3.07 1.27 3.9 3.9 3.23 3.17 1.37 4.0 4.0 12.8 20.2 60 14.4 3.33 3.27 1.47 4.1 4.1 0.123 0.120 0.050 0.153 0.153 0.127 0.124 0.054 0.157 0.157 13.0 TYP MAX. 180 13.2 0.504 0.795 2.362 0.567 0.131 0.128 0.0.58 0.161 0.161 0.512 MIN. TYP. MAX. 7.086 0.519 inch 11/13 74V2G74 Tape & Reel SOT323-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.98 3.98 2.25 2.7 1.2 4 4 4.2 4.2 0.156 0.156 175 12.8 20.2 59.5 60 60.5 14.4 0.088 0.106 0.047 0.157 0.157 0.165 0.165 TYP 180 13 MAX. 185 13.2 MIN. 6.889 0.504 0.795 2.362 0.567 TYP. 7.086 0.512 MAX. 7.283 0.519 inch 12/13 74V2G74 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com 13/13 |
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