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| (R) EMIF03-SIM01F2 3 LINES EMI FILTER INCLUDING ESD PROTECTION IPADTM MAIN PRODUCT APPLICATIONS: EMI filtering and ESD protection for: SIM Interface (Subscriber Identify Module) UIM Interface (Universal Identify Module) DESCRIPTION The EMIF03-SIM01F2 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF03 flip chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Lead free package Very low PCB space consuming: 1.42mm x 1.42mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 15kV (air discharge) 8kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3 Flip-Chip (8 Bumps) Table 1: Order Code Part Number EMIF03-SIM01F2 Marking FC Figure 1: Pin Configuration (Ball side) 3 RST in 2 RST out 1 A CLT out CLT in Gnd B C Data in VCC Data out Figure 2: Configuration VCC 100 RST in R1 47 CLK in R2 100 Data in R3 Data out CLK out RST out Cline = 35pF max. GND TM: IPAD is a trademark of STMicroelectronics. December 2004 REV. 2 1/7 EMIF03-SIM01F2 Table 2: Absolute Ratings (limiting values) Symbol Tj Top Tstg Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 - 40 to + 85 - 55 to + 150 Unit C C C Table 3: Electrical Characteristics (Tamb = 25C) Symbol VBR IRM VRM VCL Rd IPP RI/O Cline Symbol VBR IRM Rd R1 R2 R3 Cline @ 0V 95 44.65 95 Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Series resistance between Input & Output Input capacitance per line Test conditions IR = 1 mA VRM = 3V per line 1.5 100 47 100 105 49.35 105 35 Min. 6 1 Typ. Max. Unit V A pF IPP VCL VBR VRM IRM IR VF V IF I Figure 3: S21 (dB) attenuation measurement Aplac 7.60 User: STMicroelectronics Feb 22 2001 0.00 dB -5.00 -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 100.0k 1.0M 10.0M f/Hz B3_B1(CLK) A3_A2(RST) C3_C1(DAT) Figure 4: Analog crosstalk measurements dB 100.0M 1.0G MHz 2/7 EMIF03-SIM01F2 Figure 5: Digital crosstalk measurement Figure 6: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) V(in1) V(out1) Figure 7: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout) Figure 8: Line capacitance versus applied voltage (typical) V(in1) 35 30 25 20 C(pF) F=1MHz Vosc=30mV Tj=25C V(out1) 15 VR(V) 10 0 1 2 3 4 5 6 3/7 EMIF03-SIM01F2 Figure 9: Aplac model Rseries Port1 50 MODEL = demif03 MODEL = demif03 Port2 50 sub sub Vcc DEMIF03 diodes Model - RS = 1.2 - CJO = 17p - M = 0.3333 - VJ = 0.6 - ISR = 100p - BV = 6.8 - IBV = 1m - TT = 100n 50p 0.05 MODEL = demif03_Vcc 0.08nH Rseries = 47R (CLK line) = 100R (RST & Data lines) DEMIF03_Vcc diode Model - RS = 1.5 - CJO = 20p - M = 0.3333 - VJ = 0.6 - ISR = 100p - BV = 6.8 - IBV = 1m - TT = 100n sub 0.1 4/7 EMIF03-SIM01F2 Figure 10: Ordering Information Scheme EMIF EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip-Chip x = 1: 500m, Bump = 315m = 2: Leadfree Pitch = 500m, Bump = 315m = 3: Leadfree Pitch = 400m, Bump = 250m yy - xxx zz Fx Figure 11: FLIP-CHIP Package Mechanical Data 500m 50 650m 65 315m 50 500m 50 1.42mm 50m Figure 12: Foot print recommendations Figure 13: Marking 1.42mm 50m 365 Dot, ST logo xx = marking z = packaging location yww = datecode (y = year ww = week) 240 365 Copper pad Diameter : 250m recommended , 300m max E Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 315m copper pad diameter xxz y ww 40 220 All dimensions in m 5/7 EMIF03-SIM01F2 Figure 14: FLIP-CHIP Tape and Reel Specification Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm Table 4: Ordering Information Ordering code EMIF03-SIM01F2 Marking FC Package Flip-Chip Weight 2.9 mg Base qty 5000 Delivery mode Tape & reel 7" Note: More informations are available in the application notes: AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements" 8 +/- 0.3 STE STE STE xxz yww User direction of unreeling xxz yww xxz yww 4 +/- 0.1 Table 5: Revision History Date 08-Oct-2004 13-Dec-2204 Revision 1 2 First issue Table 4 on page 6: Flip-Chip weight corrected from 3.3 mg to 2.9 mg. Description of Changes 6/7 EMIF03-SIM01F2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
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