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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
D Wide Bandwidth (BW = 350 MHz Min) D Low Differential Crosstalk D Low Power Consumption (ICC = 3 mA Max) D Bidirectional Data Flow, With Near-Zero D D D D
Propagation Delay Low ON-State Resistance (ron = 5 W Typ) Rail-to-Rail Switching on Data I/O Ports (0 to VCC) VCC Operating Range From 3 V to 3.6 V Ioff Supports Partial-Power-Down Mode Operation
D, DBQ, DGV, OR PW PACKAGE (TOP VIEW)
D Data and Control Inputs Have Undershoot D D
Clamp Diodes Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 - 2000-V Human-Body Model (A114-B, Class II) - 1000-V Charged-Device Model (C101) Suitable for Both 10 Base-T/100 Base-T Signaling
(XTALK = -68 dB Typ)
D
RGY PACKAGE (TOP VIEW)
S IA0 IA1 YA IB0 IB1 YB GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC E ID0 ID1 YD IC0 IC1 YC
1
16 15 E 14 ID0 13 ID1 12 YD 11 IC0 10 IC1
IA0 IA1 YA IB0 IB1 YB
2 3 4 5 6 7 8 9
GND
description/ordering information
The TI TS3L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E) input. When E is low, the switch is enabled and the I port is connected to the Y port. When E is high, the switch is disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data path of the multiplexer/demultiplexer. ORDERING INFORMATION
TA QFN - RGY SOIC - D 0 C 70C 0C to 70 C SSOP (QSOP) - DBQ TSSOP - PW PACKAGE Tape and reel Tube Tape and reel Tape and reel Tube Tape and reel ORDERABLE PART NUMBER TS3L100RGYR TS3L100D TS3L100DR TS3L100DBQR TS3L100PW TS3L100PWR TK100 TS3L100 TK100 TOP-SIDE MARKING TK100
TVSOP - DGV Tape and reel TS3L100DGVR TK100 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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YC
Copyright 2004, Texas Instruments Incorporated
VCC
S
1
SCDS161 - MAY 2004
TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
description/ordering information (continued)
This device can be used to replace mechanical relays in LAN applications. This device has low ron, wide bandwidth, and low differential crosstalk, making it suitable for 10 Base-T, 100 Base-T, and various other LAN applications. This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, E should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE INPUTS E L L H S L H X INPUT/OUTPUT YX IX0 IX1 Z PIN DESCRIPTIONS PIN NAME IAn-IDn S E YA-YD DESCRIPTION Data I/Os Select input Enable input Data I/Os FUNCTION YX = IX0 YX = IX1 Disconnect
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
logic diagram (positive logic)
4 YA 3 IA1 7 5 IB0 6 IB1 9 YC 10 11 2 IA0
YB
IC0 IC1
YD
12
14
ID0 ID1
13
S E
1 15 Control Logic
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SCDS161 - MAY 2004
TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Control input voltage range, VIN (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Switch I/O voltage range, VI/O (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Control input clamp current, IIK (VIN < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA I/O port clamp current, II/OK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA ON-state switch current, II/O (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Continuous current through VCC or GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 5): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82C/W DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground, unless otherwise specified. 2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. VI and VO are used to denote specific conditions for VI/O. 4. II and IO are used to denote specific conditions for II/O. 5. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 6)
MIN VCC VIH VIL TA Supply voltage High-level control input voltage (E, S) Low-level control input voltage (E, S) Operating free-air temperature 3 2 0 0 MAX 3.6 VCC 0.8 70 UNIT V V V C
NOTE 6: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
electrical characteristics over recommended VCC = 3.3 V + 0.3 V (unless otherwise noted)
PARAMETER VIK Vhys IIH IIL IOZ IOS Ioff ICC ICC ICCD CIN COFF CON ron ron E, S I port Y port VI = 0, VI = 0, VCC = 3 V VI = 3 V, E, S E, S E, S E, S E, S VCC = 3.6 V, VCC = 3.6 V, VCC = 3.6 V, VCC = 3.6 V, VCC = 0, VCC = 3.6 V, VCC = 3.6 V, VCC = 3.6 V, f = 1 MHz f = 1 MHz, Outputs open, f = 1 MHz, Outputs open, VI = 0 V, VI = 2 V, Switch ON, VIN = VCC VIN = GND VO = 0 to 3.6 V, VI = 0, VO = 0 to 0.5 VCC, VI = 0, VO = 0 to 3.6 V, II/O = 0, One input at VCC - 0.6 V, I and Y ports open, VCC = 3 V, TEST CONDITIONS IIN = -18 mA
operating
free-air
temperature
MIN TYP 150 1 1 MAX -1.8
range,
UNIT V mV A A A mA
Switch OFF Switch ON VI = 0 Switch ON or OFF Other inputs at VCC or GND VIN input switching 50% duty cycle 3 5 Switch OFF Switch ON IO = 48 mA IO = 15 mA IO = 15 mA 10 17 5 10 1 50
1
15 0.1 3 750 0.45
A A A mA/ MHz pF pF pF
7 15

VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25C. For I/O ports, the parameter IOZ includes the input leakage current. The IOS test is applicable to only one ON channel at a time. The duration of this test is less than one second.
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V + 0.3 V, RL = 100 , CL = 35 pF (unless otherwise noted) (see Figure 4)
PARAMETER tON tOFF FROM (INPUT) S S TO (OUTPUT) Y Y MIN 1 1 MAX 7.5 3.5 UNIT ns ns
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25C.
dynamic characteristics over recommended VCC = 3.3 V + 0.3 V (unless otherwise noted)
PARAMETER XTALK(Diff) XTALK OIRR BW RL = 100 , RL = 100 , RL = 100 , RL = 100 , see Figure 5 f = 10 MHz, see Figure 8, f = 30 MHz, see Figure 6 f = 30 MHz, see Figure 7
operating
free-air
temperature
TYP
range,
UNIT dB dB dB MHz
TEST CONDITIONS tr = tf = 2 ns
-55 -68 -42 350
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25C.
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SCDS161 - MAY 2004
TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
OPERATING CHARACTERISTICS
0 -1 -2 -3 Gain - dB Gain -4 -40 Phase 0 -10 -20
-30 Phase - Deg
J
-5 -6 -7 -8 -9 1 10 Frequency - MHz 100
Y
-50 -60 -70
-80 -90 600
Y Gain 3 dB at 450 MHz J Phase at 3-dB Frequency, -43 Degrees
Figure 1. Gain/Phase vs Frequency
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
OPERATING CHARACTERISTICS
0 160
-10 -20
140
120
Off Isolation - dB
Phase -40
J Y
80
-50 Off Isolation -60
60
40
-70
20
-80
1
10 Frequency - MHz
100
0 600
Y Off Isolation at 30 MHz, -44.6 dB J Phase at 30 MHz, 84.41 Degrees
Figure 2. Off Isolation vs Frequency
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Phase - Deg 7
-30
100
SCDS161 - MAY 2004
TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
OPERATING CHARACTERISTICS
0 -20 -40 -60 Crosstalk - dB -80 -100 -120 Phase -140 -160 -180 -200 1 Crosstalk 250 200 150 100 50 0 -50 -100 -150 -200 -250 600 Phase - Deg
Y
J
10 Frequency - MHz
100
Y Crosstalk at 30 MHz, -67.3 dB J Phase at 30 MHz, -118.4 Degrees
Figure 3. Crosstalk vs Frequency
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
PARAMETER MEASUREMENT INFORMATION
VCC Input Generator VS 50 VG1 50 IX0 DUT VX0 YX IX1 VX1 E CL (see Note A) RL VO S
TEST tON tOFF
VCC 3.3 V + 0.3 V 3.3 V + 0.3 V 3.3 V + 0.3 V 3.3 V + 0.3 V
RL 100 100 100 100
CL 35 pF 35 pF 35 pF 35 pF
VX0 GND 3V GND 3V
VX1 3V GND 3V GND
TEST CIRCUIT Output Control (VS) tON Analog Output Waveform (VO) 90% 3V 50% 50% 0V tOFF 90% VOH 0V VOLTAGE WAVEFORMS tON AND tOFF TIMES NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. C. The outputs are measured one at a time, with one transition per measurement.
Figure 4. Test Circuit and Voltage Waveforms
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES)
P1
P2
VCC YA IA0 RL = 100 S DUT VS E VE
Figure 5. Test Circuit for Frequency Response (BW) Frequency response is measured at the output of the ON channel. For example, when VS = 0, VE = 0, and YA is the input, the output is measured at IA0. All unused analog I/O ports are left open.
HP8753ES setup
Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES)
P1
P2
VCC YA S VS E VE YB IB0 RL = 100 DUT IA0 RL = 100 50
A 50- termination resistor is needed for the network analyzer.
Figure 6. Test Circuit for Crosstalk (XTALK) Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VS = 0, VE = 0, and YA is the input, the output is measured at IB0. All unused analog input (Y) ports are connected to GND and output (I) ports are connected to GND through 50- pulldown resistors.
HP8753ES setup
Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES)
P1
P2
VCC YA IA0 RL = 100 S VS IA1 E VE A 50- termination resistor is needed for the network analyzer. RL = 100 50 DUT
Figure 7. Test Circuit for Off Isolation (OIRR) OFF isolation is measured at the output of the OFF channel. For example, when VS = VCC, VE = 0, and YA is the input, the output is measured at IA0. All unused analog input (Y) ports are left open and output (I) ports are connected to GND through 50- pulldown resistors.
HP8753ES setup
Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM
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TS3L100 QUAD SPDT WIDE BANDWIDTH LAN SWITCH WITH LOW ON STATE RESISTANCE
SCDS161 - MAY 2004
PARAMETER MEASUREMENT INFORMATION
VCC = 3.3 V Oscilloscope S IA0 VO+ IA1 YA 100 100 VO- IB0 IB1 YB GND 1 2 3 4 TS3L100 5 6 7 8 12 11 10 9 16 15 14 13 VCC E ID0 ID1 YD IC0 IC1 YC VI- 100 100 Pulse Generator VI+ 0.1 F
Figure 8. Differential Crosstalk Measurement Differential crosstalk is a measure of coupling noise between a transmit and receive pair in the LAN application. Differential crosstalk depends on the edge rate, frequency, and load. This is calculated from the equation, XTALK(Diff) db = 20 log VO(Diff)/VI(Diff), where VO(Diff) is the differential output voltage and VI(Diff) is the differential input voltage.
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MECHANICAL DATA
MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000
DGV (R-PDSO-G**)
24 PINS SHOWN 0,23 0,13 13
PLASTIC SMALL-OUTLINE
0,40 24
0,07 M
0,16 NOM 4,50 4,30 6,60 6,20
Gage Plane
0,25 0- 8 1 A 12 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,08
PINS ** DIM A MAX A MIN
14 3,70 3,50
16 3,70 3,50
20 5,10 4,90
24 5,10 4,90
38 7,90 7,70
48 9,80 9,60
56 11,40 11,20
4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194
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MECHANICAL DATA
MSOI002B - JANUARY 1995 - REVISED SEPTEMBER 2001
D (R-PDSO-G**)
8 PINS SHOWN 0.050 (1,27) 8 5 0.020 (0,51) 0.014 (0,35) 0.010 (0,25)
PLASTIC SMALL-OUTLINE PACKAGE
0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81)
0.008 (0,20) NOM
Gage Plane 1 A 4 0- 8 0.044 (1,12) 0.016 (0,40)
0.010 (0,25)
Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)
PINS ** DIM A MAX A MIN
8 0.197 (5,00) 0.189 (4,80)
14 0.344 (8,75) 0.337 (8,55)
16 0.394 (10,00) 0.386 (9,80)
4040047/E 09/01 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012
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MECHANICAL DATA
MSOI004E JANUARY 1995 - REVISED MAY 2002
DBQ (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
0.025 (0,64) 24
0.012 (0,30) 0.008 (0,20) 13
0.005 (0,13)
0.157 (3,99) 0.150 (3,81)
0.244 (6,20) 0.228 (5,80)
0.008 (0,20) NOM
Gauge Plane 1 A 0-8 0.069 (1,75) MAX 0.035 (0,89) 0.016 (0,40) 12 0.010 (0,25)
Seating Plane 0.010 (0,25) 0.004 (0,10) 0.004 (0,10)
PINS ** DIM A MAX
16 0.197 (5,00) 0.189 (4,80)
20 0.344 (8,74) 0.337 (8,56)
24 0.344 (8,74) 0.337 (8,56)
28 0.394 (10,01) 0.386 (9,80)
A MIN
D
M0-137 VARIATION
AB
AD
AE
AF
4073301/F 02/2002 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-137.
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1
MECHANICAL DATA
MTSS001C - JANUARY 1995 - REVISED FEBRUARY 1999
PW (R-PDSO-G**)
14 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,65 14 8
0,30 0,19
0,10 M
0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0- 8 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,10
PINS ** DIM A MAX
8
14
16
20
24
28
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153
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