View SMMS498A_1003889.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
D D D D D D D D
Organization . . . 4 194 304 x 8 Single 5-V Power Supply (10% Tolerance) 30-Pin Single-In-Line Memory Module (SIMM) for Use With Sockets Utilizes Two 16-Megabit Dynamic RAMs in Plastic Small-Outline J-Lead (SOJ) Packages Long Refresh Period 32 ms (2048 Cycles) All Inputs, Outputs, Clocks Fully TTL Compatible 3-State Output Performance Ranges:
ACCESS TIME tRAC (MAX) '497GU8-60 60 ns '497GU8-70 70 ns '497GU8-80 80 ns ACCESS ACCESS READ OR TIME TIME WRITE tAA tCAC CYCLE (MAX) (MAX) (MIN) 30 ns 15 ns 110 ns 35 ns 18 ns 130 ns 40 ns 20 ns 150 ns
U SINGLE-IN-LINE PACKAGE ( TOP VIEW )
D D D D
Common CAS Control for Eight Common Data-In and Data-Out Lines Low Power Dissipation Operating Free-Air Temperature Range 0C to 70C Enhanced Page-Mode Operation With CAS-Before-RAS ( CBR), RAS-Only, and Hidden Refresh
VCC CAS DQ1 A0 A1 DQ2 A2 A3 VSS DQ3 A4 A5 DQ4 A6 A7 DQ5 A8 A9 A10 DQ6 W VSS DQ7 NC DQ8 NC RAS NC NC VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
description
The TM497GU8 is a 4M-byte dynamic random-access memory module organized as 4 194 304 x 8 bits in a 30-pin leadless single-in-line memory module (SIMM). The SIMM is composed of two TMS417400DJ, 4 194 304 x 4-bit dynamic RAMs in 24/26-lead plastic small-outline J-lead (SOJ) packages mounted on a substrate with decoupling capacitors. The TM497GU8 is available in the U single-sided, leadless module for use with sockets and is characterized for operation from 0C to 70C.
PIN NOMENCLATURE A0 - A10 CAS DQ1 - DQ8 NC RAS VCC VSS W Address Inputs Column-Address Strobe Data In / Data Out No Internal Connection Row-Address Strobe 5-V Supply Ground Write Enable
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1995, Texas Instruments Incorporated
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
1
TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
operation
The TM497GU8 operates as two TMS417400DJs connected as shown in the functional block diagram. Refer to the TMS417400 data sheet for details of its operation. The common I/O feature of the TM497GU8 dictates the use of early-write cycles to prevent contention on D and Q. power up To achieve proper operation, an initial pause of 200 s followed by a minimum of eight initialization cycles is required after full VCC level is achieved. These eight initialization cycles need to include at least one refresh (RAS-only orCBR) cycle.
single-in-line memory module and components
PC substrate: 1,27 mm (0.05 inch) nominal thickness; 0.005 inch/inch maximum warpage Bypass capacitors: Multilayer ceramic Contact area for socketable devices: Nickel plate and solder plate over copper
functional block diagram
A0 - A10 RAS CAS W 11 4M x 4 A0 - A10 DQ1 RAS DQ2 DQ3 CAS DQ4 W OE DQ1 DQ2 DQ3 DQ4
11
4M x 4 A0 - A10 DQ1 RAS DQ2 DQ3 CAS W DQ4 OE
DQ5 DQ6 DQ7 DQ8
2
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 1 V to 7 V Voltage range on any pin (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 1 V to 7 V Short-circuit output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 W Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to VSS.
recommended operating conditions
MIN VCC VIH VIL TA Supply voltage High-level input voltage Low-level input voltage (see Note 2) Operating free-air temperature 4.5 2.4 -1 0 NOM 5 MAX 5.5 6.5 0.8 70 UNIT V V V C
NOTE 2: The algebraic convention, where the more negative (less positive) limit is designated as minimum, is used for logic-voltage levels only.
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER VOH VOL II IO ICC1 High-level output voltage Low-level output voltage Input current (leakage) Output current (leakage) Read- or write-cycle current (see Note 3) TEST CONDITIONS IOH = - 5 mA IOL = 4.2 mA VCC = 5 V, VI = 0 V to 6.5 V, All other pins = 0 V to VCC VCC = 5.5 V, CAS high VCC = 5.5 V, VO = 0 V to VCC, Minimum cycle '497GU8 - 60 MIN 2.4 0.4 10 10 220 MAX '497GU8 - 70 MIN 2.4 0.4 10 10 200 MAX '497GU8 - 80 MIN 2.4 0.4 10 10 180 MAX UNIT V V A A mA
ICC2
Standby current
VIH = 2.4 V (TTL), After 1 memory cycle, RAS and CAS high VIH = VCC - 0.2 V (CMOS), After 1 memory cycle, RAS and CAS high VCC = 5.5 V, RAS cycling, VCC = 5.5 V, RAS low, Minimum cycle, CAS high tPC = MIN, CAS cycling
4
4
4
mA
2
2
2
mA
ICC3 ICC4
Average refresh current (RASonly or CBR) (see Note 3) Average page current (see Note 4)
220 140
200 120
180 100
mA mA
NOTES: 3. Measured with a maximum of one address change while RAS = VIL 4. Measured with a maximum of one address change while CAS = VIH
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
3
TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
capacitance over recommended ranges of supply voltage and operating free-air temperature, f = 1 MHz (see Note 5)
PARAMETER Ci(A) Ci(RC) Ci(W) Co Input capacitance, A0 - A10 Input capacitance, CAS and RAS Input capacitance, W Output capacitance, DQ1 - DQ8 MIN MAX 10 14 14 7 UNIT pF pF pF pF
NOTE 5: VCC = 5 V 0.5 V, and the bias on the pin under test is 0 V.
switching characteristics over recommended ranges of supply voltage and operating free-air temperature
PARAMETER tAA tCAC tCPA tRAC tCLZ tOH Access time from column address Access time from CAS low Access time from column precharge Access time from RAS low CAS to output in low-impedance state Output disable time from start of CAS high 0 3 0 15 '497GU8 - 60 MIN MAX 30 15 35 60 0 3 0 18 '497GU8 - 70 MIN MAX 35 18 40 70 0 3 0 20 '497GU8 - 80 MIN MAX 40 20 45 80 UNIT ns ns ns ns ns ns ns
tOFF Output disable time after CAS high (see Note 6) NOTE 6: tOFF is specified when the output is no longer driven.
4
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
timing requirements over recommended ranges of supply voltage and operating free-air temperature
'497GU8 - 60 MIN tRC tPC tRASP tRAS tCAS tCP tRP tWP tASC tASR tDS tRCS tCWL tRWL tWCS tWRP tCAH tDH tRAH tRCH tRRH tWCH tWRH tRHCP tCHR tCRP tCSH tCSR tRAD tRAL tCAL tRCD tRPC tRSH tREF tT Cycle time, random read or write (see Note 7) Cycle time, page-mode read or write (see Notes 7 and 8) Pulse duration, RAS low, page mode Pulse duration, RAS low, nonpage mode Pulse duration, CAS low Pulse duration, CAS high Pulse duration, RAS high (precharge) Pulse duration, W low Setup time, column address before CAS low Setup time, row address before RAS low Setup time, data before CAS low Setup time, W high before CAS low Setup time, W low before CAS high Setup time, W low before RAS high Setup time, W low before CAS low Setup time, W high before RAS low (CBR refresh only) Hold time, column address after CAS low Hold time, data after CAS low Hold time, row address after RAS low Hold time, W high after CAS high (see Note 9) Hold time, W high after RAS high (see Note 9) Hold time, W low after CAS low Hold time, W high after RAS low (CBR refresh only) Hold time, RAS high from CAS precharge Delay time, RAS low to CAS high (CBR refresh only) Delay time, CAS high to RAS low Delay time, RAS low to CAS high Delay time, CAS low to RAS low (CBR refresh only) Delay time, RAS low to column address (see Note 10) Delay time, column address to RAS high Delay time, column address to CAS high Delay time, RAS low to CAS low (see Note 10) Delay time, RAS high to CAS low Delay time, CAS low to RAS high Refresh time interval Transition time All cycle times assume tT = 5 ns. To assure tPC min, tASC should be tCP. Either tRRH or tRCH must be satisfied for a read cycle. The maximum value is specified only to assure access time 3 110 40 60 100 000 60 15 10 40 10 0 0 0 0 15 15 0 10 10 10 10 0 0 10 10 35 10 5 60 5 15 30 30 20 0 15 32 30 3 45 30 10 000 10 000 MAX '497GU8 - 70 MIN 130 45 70 70 18 10 50 10 0 0 0 0 18 18 0 10 15 15 10 0 0 15 10 40 10 5 70 5 15 35 35 20 0 18 32 30 3 52 35 100 000 10 000 10 000 MAX '497GU8 - 80 MIN 150 50 80 100 000 80 20 10 60 10 0 0 0 0 20 20 0 10 15 15 10 0 0 15 10 45 10 5 80 5 15 40 40 20 0 20 32 30 60 40 10 000 10 000 MAX UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ns
NOTES: 7. 8. 9. 10.
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
5
TM497GU8 4194304-WORD BY 8-BIT DYNAMIC RAM MODULE
SMMS498A- APRIL 1994 - REVISED JUNE 1995
device symbolization
TM497GU8 -SS YYMMT
YY MM T -SS
= = = =
Year Code Month Code Assembly Site Code Speed
NOTE: The location of the part number may vary.
6
POST OFFICE BOX 1443
* HOUSTON, TEXAS 77251-1443
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1998, Texas Instruments Incorporated

▲Up To Search▲

Price & Availability of SMMS498A

	To Download SMMS498A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .