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Features
TC7662A
Package Type
8-Pin PDIP 8-Pin CERDIP
NC C+ GND C- 1 2 8 VDD
Charge Pump DC-to-DC Converter
* Wide Operating Range - 3V to 18V * Increased Output Current (40mA) * Pin Compatible with ICL7662/SI7661/TC7660/ LTC1044 * No External Diodes Required * Low Output Impedance @ IL = 20mA - 40 Typ. * No Low-Voltage Terminal Required * CMOS Construction * Available in 8-Pin PDIP and 8-Pin CERDIP Packages
TC7662A
3 4
7 OSC 6 NC 5 VOUT
General Description
The TC7662A is a pin-compatible upgrade to the industry standard TC7660 charge pump voltage converter. It converts a +3V to +18V input to a corresponding -3V to -18V output using only two lowcost capacitors, eliminating inductors and their associated cost, size and EMI. In addition to a wider power supply input range (3V to 18V versus 1.5V to 10V for the TC7660), the TC7662A can source output currents as high as 40mA. The on-board oscillator operates at a nominal frequency of 12kHz. Operation below 12kHz (for lower supply current applications) is also possible by connecting an external capacitor from OSC to ground. The TC7662A directly is recommended for designs requiring greater output current and/or lower input/ output voltage drop. It is available in 8-pin PDIP and CERDIP packages in commercial and extended temperature ranges.
Applications
* * * * Laptop Computers Disk Drives Process Instrumentation P-based Controllers
Device Selection Table
Part Number TC7662ACPA TC7662AEPA TC7662AIJA TC7662AMJA Package 8-Pin PDIP 8-Pin PDIP 8-Pin CERDIP 8-Pin CERDIP Operating Temp. Range 0C to +70C -40C to +85C -25C to +85C -55C to +125C
2002 Microchip Technology Inc.
DS21468B-page 1
TC7662A
Functional Block Diagram
8 I OSC 7 Level Shift P SW1 2 CAP + VDD
TC7662A
Q + - F/F C Q
Comparator with Hysteresis VREF
Level Shift
N SW4
+ CP EXT GND 3
+ Level Shift OUT N SW2 4 - CR EXT
CAP
RL
Level Shift
N SW3 5 VOUT
DS21468B-page 2
2002 Microchip Technology Inc.
TC7662A
1.0 ELECTRICAL CHARACTERISTICS
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings*
Supply Voltage VDD to GND................................. +18V Input Voltage (Any Pin) .........(VDD + 0.3) to (VSS - 0.3) Current into Any Pin ............................................ 10mA Output Short Circuit ........... Continuous (at 5.5V Input) ESD Protection ................................................ 2000V Package Power Dissipation (TA 70C) 8-Pin CERDIP .......................................... 800mW 8-Pin PDIP ............................................... 730mW Package Thermal Resistance CPA, EPA JA ......................................... 140C/W IJA, MJA JA ............................................ 90C/W Operating Temperature Range C Suffix............................................ 0C to +70C I Suffix .......................................... -25C to +85C E Suffix......................................... -40C to +85C M Suffix ...................................... -55C to +125C Storage Temperature Range.............. -65C to +150C
TC7662A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD = 15V, TA = +25C, Test circuit (Figure 3-1) unless otherwise noted. Symbol VDD IS Parameter Supply Voltage Supply Current Min 3 -- -- -- -- -- -- -- -- -- -- -- 93 -- 99 -- 96 Typ -- -- 510 560 650 190 210 210 40 50 100 12 97 -- 99.9 -- -- Max 18 -- 700 -- -- -- -- -- 50 60 125 -- -- -- -- -- -- Units V
A
Test Conditions RL = VDD = +15V 0C TA +70C -55C TA +125C VDD = +5V 0C TA +70C -55C TA +125C IL = 20mA, VDD = +15V IL = 40mA, VDD = +15V IL = 3mA, VDD = +5V VDD = +15V RL = 2k VDD = +15V RL = Over operating temperature range.
RO
Output Source Resistance
FOSC PEFF VEFF
Oscillator Frequency Power Efficiency Voltage Efficiency
kHz % %
2002 Microchip Technology Inc.
DS21468B-page 3
TC7662A
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin No. (8-Pin PDIP, CERDIP) 1 2 3 4 5 6 7 8
PIN FUNCTION TABLE
Symbol NC C+ GND C
-
Description No connection. Charge pump capacitor positive terminal. Ground terminal. Charge pump capacitor negative terminal. Output voltage. No connection. Oscillator control input. Bypass with an external capacitor to slow the oscillator. Power supply positive voltage input.
VOUT NC OSC VDD
DS21468B-page 4
2002 Microchip Technology Inc.
TC7662A
3.0 DETAILED DESCRIPTION
3.1
The TC7662A is a capacitive charge pump (sometimes called a switched-capacitor circuit), where four MOSFET switches control the charge and discharge of a capacitor. The functional block diagram shows how the switching action works. SW1 and SW2 are turned on simultaneously, charging CP to the supply voltage, VDD. This assumes that the ON resistance of the MOSFETs in series with the capacitor produce a charging time (3 time constants) less than the ON time provided by the oscillator frequency, as shown: 3 (RDS(ON) CP) Theoretical Power Efficiency Considerations
In theory, a voltage converter can approach 100% efficiency if certain conditions are met: 1. 2. 3. The drive circuitry consumes minimal power. The output switches have extremely low ON resistance and virtually no offset. The impedances of the pump and reservoir capacitors are negligible at the pump frequency.
The TC7662A approaches these conditions for negative voltage conversion if large values of CP and CR are used. Note: Energy is lost only in the transfer of charge between capacitors if a change in voltage occurs.
The energy lost is defined by: E = 1/2 CP (V12 - V22) V1 and V2 are the voltages on CP during the pump and transfer cycles. If the impedances of CP and CR are relatively high at the pump frequency (refer to Figure 31), compared to the value of RL, there will be a substantial difference in voltages V1 and V2. Therefore, it is desirable not only to make CR as large as possible to eliminate output voltage ripple, but also to employ a correspondingly large value for CP in order to achieve maximum efficiency of operation.
3.2
Dos and Don'ts
FIGURE 3-1:
NC + 10F 1 2 CP 3 4
TC7662A TEST CIRCUIT
IS 8 7 VDD IL (+5V) NC COSC RL VOUT (-5V) CR + 10F
TC7662A 6
5
* Do not exceed maximum supply voltages. * Do not short circuit the output to V+ supply for voltages above 5.5V for extended periods; however, transient conditions including start-up are okay. * When using polarized capacitors in the inverting mode, the + terminal of CP must be connected to pin 2 of the TC7662A and the + terminal of CR must be connected to GND (pin 3). * If the voltage supply driving the TC7662A has a large source impedance (25-30 ohms), then a 2.2F capacitor from pin 8 to ground may be required to limit the rate of rise of the input voltage to less than 2V/sec.
2002 Microchip Technology Inc.
DS21468B-page 5
TC7662A
4.0
4.1
TYPICAL APPLICATIONS
Simple Negative Voltage Converter
Combining the four RSWX terms as RSW, we see that:
RO 2 x RSW + 1 + 4 x ESRCP + ESRCR fPUMP x CP
The majority of applications will undoubtedly utilize the TC7662A for generation of negative supply voltages. Figure 4-1 shows typical connections to provide a negative supply where a positive supply of +3V to +18V is available.
FIGURE 4-1:
SIMPLE NEGATIVE CONVERTER AND ITS OUTPUT EQUIVALENT
VDD
1 + 10F 2 3 4
8 7
TC7662A
RSW, the total switch resistance, is a function of supply voltage and temperature (See Section 5.0, Typical Characteristics "Output Source Resistance" graphs), typically 23 at +25C and 5V. Careful selection of CP and CR will reduce the remaining terms, minimizing the output impedance. High value capacitors will reduce the 1/(fPUMP x CP) component, and low ESR capacitors will lower the ESR term. Increasing the oscillator frequency will reduce the 1/(fPUMP x CP) term, but may have the side effect of a net increase in output impedance when CP > 10F and there is not enough time to fully charge the capacitors every cycle. In a typical application when fOSC = 12kHz and C = CP = CR = 10F:
RO 2 x 23 + 1 + 4 x ESRCP + ESRCR (5 x 123 x 10 x 10-6)
6 RO 5 - 10F + VOUT = -V+ - VDD VDD VDD + VOUT
RO (46 + 20 + 5 x ESRC)
A
B
The output characteristics of the circuit in Figure 4-1 are those of a nearly ideal voltage source in series with a resistance as shown in Figure 4-1b. The voltage source has a value of -(VDD). The output impedance (RO) is a function of the ON resistance of the internal MOS switches (shown in the Functional Block Diagram), the switching frequency, the value of CP and CR, and the ESR (equivalent series resistance) of CP and CR. A good first order approximation for RO is:
RO 2(RSW1 + RSW2 + ESRCP) + 2(RSW3 + RSW4 + 1 + ESRCR ESRCP) + fPUMP x CP fOSC, R (fPUMP = SWX = MOSFET switch resistance) 2
Since the ESRs of the capacitors are reflected in the output impedance multiplied by a factor of 5, a high value could potentially swamp out a low 1/(fPUMP x CP) term, rendering an increase in switching frequency or filter capacitance ineffective. Typical electrolytic capacitors may have ESRs as high as 10.
DS21468B-page 6
2002 Microchip Technology Inc.
TC7662A
4.2 Output Ripple 4.3 Paralleling Devices
ESR also affects the ripple voltage seen at the output. The total ripple is determined by 2 voltages, A and B, as shown in Figure 4-2. Segment A is the voltage drop across the ESR of CR at the instant it goes from being charged by CP (current flowing into CR) to being discharged through the load (current flowing out of CR). The magnitude of this current change is 2 x IOUT, hence the total drop is 2 x IOUT x ESRCR volts. Segment B is the voltage change across CR during time t2, the half of the cycle when CR supplies current to the load. The drop at B is IOUT x t2/CR volts. The peak-to-peak ripple voltage is the sum of these voltage drops: VRIPPLE 2 x f + 2 x ESRCR x IOUT PUMP x CR Any number of TC7662A voltage converters may be paralleled to reduce output resistance (Figure 4-3). The reservoir capacitor, CR, serves all devices, while each device requires its own pump capacitor, CP. The resultant output resistance would be approximately: ROUT = ROUT (of TC7662A) n (number of devices)
4.4
Cascading Devices
(
1
)
The TC7662A may be cascaded as shown (Figure 4-4) to produce larger negative multiplication of the initial supply voltage. However, due to the finite efficiency of each device, the practical limit is 10 devices for light loads. The output voltage is defined by: VOUT = - n (VIN) where n is an integer representing the number of devices cascaded. The resulting output resistance would be approximately the weighted sum of the individual TC7662A ROUT values.
FIGURE 4-2:
OUTPUT RIPPLE
t2 t1
0
B
V A
-(VDD)
FIGURE 4-3:
PARALLELING DEVICES LOWERS OUTPUT IMPEDANCE
VDD 1 2 C1 8 7
TC7662A
3 4 "1" 6 5 C1
1 2
8 7 RL
TC7662A
3 4 "n" 6 5
+
C2
FIGURE 4-4:
INCREASED OUTPUT VOLTAGE BY CASCADING DEVICES
VDD 1 2 + 10F 3 4 "1" 8 7
TC7662A
6 5 + 10F
1 2 3 4 "n"
8
TC7662A
7 6 5 + VOUT* 10F
10F
*VOUT = -nVDD
2002 Microchip Technology Inc.
DS21468B-page 7
TC7662A
4.5 Changing the TC7662A Oscillator Frequency 4.7 Combined Negative Voltage Conversion and Positive Supply Multiplication
It is possible to increase the conversion efficiency of
the TC7662A at low load levels by lowering the oscillator frequency. This reduces the switching losses, and is shown in Figure 4-5. However, lowering the oscillator frequency will cause an undesirable increase in the impedance of the pump (CP) and reservoir (CR) capacitors; this is overcome by increasing the values of CP and CR by the same factor that the frequency has been reduced. For example, the addition of a 100pF capacitor between pin 7 (OSC) and VDD will lower the oscillator frequency to 2kHz from its nominal frequency of 12kHz (multiple of 6), and thereby necessitate a corresponding increase in the value of CP and CR (from 10F to 68F).
Figure 4-7 combines the functions shown in Figure 4-1 and Figure 4-6 to provide negative voltage conversion and positive voltage doubling simultaneously. This approach would be, for example, suitable for generating +9V and -5V from an existing +5V supply. In this instance, capacitors C1 and C3 perform the pump and reservoir functions, respectively, for the generation of the negative voltage, while capacitors C2 and C4 are pump and reservoir, respectively, for the doubled positive voltage. There is a penalty in this configuration which combines both functions, however, in that the source impedances of the generated supplies will be somewhat higher due to the finite impedance of the common charge pump driver at pin 2 of the device.
FIGURE 4-5:
LOWERING OSCILLATOR FREQUENCY
VDD
FIGURE 4-7:
COMBINED NEGATIVE CONVERTER AND POSITIVE DOUBLER
VDD VOUT = -(VDD - VF)
1 2 10F + 3 4
8 7
1 8 7
TC7662A
6 5
COSC VOUT 10F +
+ C1
2
TC7662A
3 4 + C2 6 5
D1
+
C3
D2
VOUT = (2 VDD) - (2 VF) + C4
4.6
Positive Voltage Doubling 4.8 Voltage Splitting
The TC7662A may be employed to achieve positive voltage doubling using the circuit shown in Figure 4-6. In this application, the pump inverter switches of the TC7662A are used to charge CP to a voltage level of VDD - VF (where VDD is the supply voltage and VF is the forward voltage on CP plus the supply voltage (VDD) applied through diode D2 to capacitor CR). The voltage thus created on CR becomes (2 VDD) - (2 VF), or twice the supply voltage minus the combined forward voltage drops of diodes D1 and D2. The source impedance of the output (VOUT) will depend on the output current, but for VDD = 5V and an output current of 10 mA, it will be approximately 60.
The same bidirectional characteristics can be used to split a higher supply in half, as shown in Figure 4-8. The combined load will be evenly shared between the two sides. Because the switches share the load in parallel, the output impedance is much lower than in the standard circuits, and higher currents can be drawn from the device. By using this circuit, and then the circuit of Figure 4-4, +15V can be converted (via +7.5V and -7.5V) to a nominal -15V, though with rather high series resistance (~250).
FIGURE 4-8:
FIGURE 4-6:
POSITIVE VOLTAGE MULTIPLIER
VDD
+ RL1 VOUT = VDD - V - 50 F 2 RL2 + - 50F -
SPLITTING A SUPPLY IN HALF
VDD
1 2
8 7
1 2 3 4
8 7 D1 D2 + CP + CR VOUT = (2 VDD) - (2 VF)
+ -
TC7662A
3 4 6 5
TC7662A
6 5
50F
V-
DS21468B-page 8
2002 Microchip Technology Inc.
TC7662A
5.0
Note:
TYPICAL CHARACTERISTICS
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Circuit of Figure 3-1, CP = CR = 10F, CESRCP CESRCR 1, TA = 25C unless otherwise noted.
Supply Current vs. Temperature
700
Oscillator Frequency vs. COSC
TA = +25C 10k
SUPPLY CURRENT (A)
600 500 400 300 200 100 0 -60 -40 -20 VDD = 5V VDD = 15V
FREQUENCY (Hz)
1k
100
10
0 20 40 60 80 TEMPERATURE (C)
100 120 140
1
10
100 1000 CAPACITANCE (pF)
10,000
Frequency vs. Temperature
20
OUTPUT RESISTANCE ( ) 160 140 120
Output Resistance vs. Temperature
18 FREQUENCY (kHz) 16 14 12 10 8 6 -60 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 140
VDD = 5V, IL = 3mA 100 80 60 40 20 -60 -40 -20 VDD = 15V, IL = 20mA
0 20 40 60 80 TEMPERATURE (C)
100 120 140
Power Conversion Efficiency vs. ILOAD
POWER CONVERSION EFFICIENCY (%) 110 100 90 80 70 60 50 40 30 20 10 0 8 16 24 32 40 48 56 LOAD CURRENT (mA)
TA = +25C
Output Resistance vs. Input Voltage
165 150
110 100 OUTPUT RESISTANCE ()
SUPPLY CURRENT (mA)
TA = +25C
135 Efficiency 120 105 90 Supply Current 75 60 45 30 15 0 80
90 80 70 60 50 40 30 20 10 0 2 4 6 10 8 12 14 INPUT VOLTAGE (V) 16 18 20
IL = 20mA
64
72
2002 Microchip Technology Inc.
DS21468B-page 9
TC7662A
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Package marking data not available at this time.
6.2
Package Dimensions
8-Pin Plastic DIP
PIN 1
.260 (6.60) .240 (6.10)
.045 (1.14) .030 (0.76) .400 (10.16) .348 (8.84) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92)
.070 (1.78) .040 (1.02)
.310 (7.87) .290 (7.37)
.040 (1.02) .020 (0.51)
.015 (0.38) .008 (0.20) .400 (10.16) .310 (7.87)
3 MIN.
.110 (2.79) .090 (2.29)
.022 (0.56) .015 (0.38)
Dimensions: inches (mm)
8-Pin CDIP (Narrow)
.110 (2.79) .090 (2.29) PIN 1
.300 (7.62) .230 (5.84)
.055 (1.40) MAX. .400 (10.16) .370 (9.40) .200 (5.08) .160 (4.06) .200 (5.08) .125 (3.18)
.020 (0.51) MIN. .320 (8.13) .290 (7.37) .040 (1.02) .020 (0.51) .015 (0.38) .008 (0.20) .400 (10.16) .320 (8.13) .065 (1.65) .020 (0.51) .045 (1.14) .016 (0.41) Dimensions: inches (mm)
.150 (3.81) MIN.
3 MIN.
DS21468B-page 10
2002 Microchip Technology Inc.
TC7662A
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2002 Microchip Technology Inc.
DS21468B-page11
TC7662A
NOTES:
DS21468B-page12
2002 Microchip Technology Inc.
TC7662A
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2002 Microchip Technology Inc.
DS21468B-page 13
M
WORLDWIDE SALES AND SERVICE
AMERICAS
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03/01/02
' !"
DS21468B-page 14
'
2002 Microchip Technology Inc.


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