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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
D D D D D D D D D D
Source Driver LSI for Active-Matrix LCDs Compatible With Dot Reverse Driving and Source Line Reverse Driving No Precharging Liquid Crystal Drive Outputs: 384 Fine Pitch/TCP Driver With Internal 8-Bit Digital Input DAC (16.77 Million Colors) Maximum Operating Clock Frequencies: 55 MHz (Logic Section Power Supply Voltage: 2.5 V - 3.6 V) Dual-Port Input Allows for Input Data Reversing Gamma Correction: 7+7 or 8+8 is Selectable as a TCP Option
D D D D D D
No Need for an External Reference Voltage Generation Circuit (or for Ramp Voltage or a Multi-Value Power Supply) Low-Power Consumption Is Achieved by Automatically Stopping the Clock After a Fixed Amount of Data has Been Captured Lower System Power Consumption Can Be Accomplished Using the Low-Power Mode Can Handle Heavy Loads Using the LCD Capacity Switching Mode Logic Section Power Supply Voltage: 2.5 V - 3.6 V Liquid Crystal Drive Section Power Supply Voltage: 13.5 V Maximum
description
The MPT57571 is a source driver LSI that drives an active-matrix LCD panel, as well as a 256-gradation driver that implements multi-pin configuration and reduced power consumption. The MPT57571 has 384 panel-drive outputs. Because it is expandable, the MPT57571 can easily be used in multiple applications, its screen can be enlarged, and its L/R (shift-direction switching) terminals can be used to simplify LCD panel interconnection. The device has a large output dynamic range (13.1 VPP) that makes the reverse driving of opposing electrodes in the LCD panel unnecessary; this reduces system power consumption and produces a high-quality picture. The device is also compatible with single-sided mounting, dot reverse driving, and source line reverse driving. The MPT57571s 384 outputs ensure XGA/VGA compatibility, making it useful in a wider range of applications. The maximum operating clock frequency of the MPT57571 is 55 MHz when the power supply voltage for the logic section is between 2.5 V and 3.6 V and the single-side driving of an LCD panel has been implemented.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright (c) 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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1
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
OUT384
OUT230
OUT11
MPT57571
GMA9 V DD1 V DD1 V SS1
SHC RS LP V DD2
OUT1 D10 D07 D20 D17
GMA16
GMA1 V SS2 CLK TP1 POL REV2 REV1 D27
EIO2
NOTES: A. This figure shows the copper foil side. The TAB outline is not described. B. There are 80 input terminals and 384 output terminals.
2
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GMA8
EI01
D57
D50 D47
D40 D37
D30
D00
L/R
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
functional block diagram
OUT1 OUT2 OUT3 OUT383 OUT384
RS LP
1 1 1 Output Buffer TP1, POL
384
GMA16 - GMA1 SHC
16 Digital-To-Analog Converter
8
8
8
8
8
384 x 8 Bit x 2-Line Latch
Rev 1,2 8 8 Latch 8 8 8 8 1 EIO1 EIO2 Address Shift Register (64 Bit) 64
D00 - D07 D10 - D17 D20 - D27 D30 - D37 D40 - D47 D50 - D57
L/R
CLK
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
Terminal Functions
TERMINAL NAME D00 - D07 D10 - D17 D20 - D27 D30 - D37 D40 - D47 D50 - D57 FUNCTION Port 1 Image signal input terminal Port 2 Image signal input terminal I/O DESCRIPTION
I
I
Image signal input terminal Inputs image signals with a 48-bit width: 8-bit gradation data x 6 dots (for 2 pixels) 48 bit 8 bit pixels). Dn0: LSB, Dn7: MSB
Internal shift register's start pulse I/O terminal EIO1 EIO2 Start pulse I/O terminal I/O L/R = H EIO1 EIO2 L/R Shift direction selection signal input terminal Shift clock input terminal I Right-shift input Right-shift output L/R =L Left-shift output Left-shift input
Shift direction selection signal Right shift (OUT1 OUT 384): H Left shift (OUT384 OUT1): L Shift register transfer clock input terminal Writes the display data to the data register at the leading edge. Power supply for analog circuits VDD1 (*1) is used as the analog circuit reference potential Stable electric potential must be supplied. VDD1 (*2) is used for output circuits, etc. Power supply for digital circuits Potential input terminal for gamma correction Reference potential should be maintained when outputting the gradation voltage. See recommended operating conditions for potential-related information. 7+7 GMA input is possible by processing GMA11 and GMA6 in the TCP option. Latches the data register contents with the leading edge, transfers it to the D/A converter, and outputs the gradation voltage with the trailing edge. POL = L: odd-numbered outputs GMA1-GMA8 and even-numbered outputs GMA9-GMA16 are reference power supplies. POL = H: odd-numbered outputs GMA9-GMA16 and even-numbered outputs GMA1-GMA8 are reference power supplies. Selects reversal/nonreversal of input data: REV1: controls reversal/nonreversal of port 1. REV1: controls reversal/nonreversal of port 2. REV1,2 = H: reversal REV1,2 = L: nonreversal This terminal can be processed within TCP. H and L are identified at the leading edge of each CLK, like the data (Dxx). Subpixel output, provides 256 gray-scale signals to the LCD panel. Signal used for output circuit control. Switched LCD drive capacity: RS = H: heavy-load mode RS = L: spec-load mode Reduces charge and discharge current to a load: LP = H: low-power mode LP = L: normal mode See application Information for details.
CLK VDD1 (*1) VDD1 (*2) VSS1 VDD2, VSS2 GMA1...GMA16
I
Analog power supply
I
Digital power supply Gamma correction reference potential input terminal Latch input terminal
I
I
TP1
I
POL
Polarity reversal terminal
I
REV1 REV2
Input data reversal terminal
I
OUT1 - OUT384 SHC
LCD control output terminal Output circuit control signal input terminal LCD drive capacity switching terminal
O I
RS
I
LP
Low-power mode selection terminal
I
4
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
detailed description
image signal capture EIOn = H (n = 1 or n = 2) is captured internally at the leading edge of CLK. After the decay of EIOn, the image signal data are captured in the internal latch with the rise of the next CLK. After all data (that is, 384 channels of data) have been captured, the device automatically switches to the standby state. New data are not captured until EIOn receives another input, even if there is a CLK input. If EIOn receives an input in the meantime, new image signal data is captured at the rise of the next CLK after EIOn decays. It is possible to reverse the input data for each port by means of the REV1 and REV2 signals. output expansion The number of image signal output terminals can be expanded by cascading these devices, thereby enabling compatibility with large screens. Expansion is controlled by using the L/R terminal: L/R = L: the previous-stage EIO1 terminal is connected to the next-stage EIO2, and input terminals other than EIO1 and EIO2 are connected together on each device. L/R = H: the previous-stage EIO2 terminal is connected to the next-stage EIO1, and input terminals other than EIO1 and EIO2 are connected together on each device. relationship between input data values and output voltage The output voltage is determined by the input data value and the 16 gamma-correction potentials (GMA[1-16]). Also, since the output voltage is compatible with dot-reverse driving, it is possible to output gradation voltages for the opposing-electrode voltages with polarities that differ for even and odd-numbered outputs. Input potentials with the same polarity relative to the opposing-electrode voltages should be applied for GMA1-8 and GMA9-16 of the gamma-correction reference power supply. Reference potential inputs for correction (GMA[1-16]) should be applied externally as desired. Reference potential should be maintained during gradation voltage output. Refer to the recommended operating conditions for the relative magnitude of each potential. An 8+8 or 7+7 correction reference potential input is selectable as a TCP option. When a 7+7 correction reference is used, processing is performed internally to the TCP without GMA6 and GMA11. In this case, the relation between the GMAs and the input data is used as an output after dividing input data CO through FE by the IC's internal resistance. Details of Pixel Signal Data: Data format: 8-bits x 2 RGB Input width: 48 bits (2-pixel data)
MSB Dx7 Dx6 Dx5 Dx4 Dx3 Dx2 Dx1 LSB Dx0
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
detailed description (continued)
Relationship between shift direction and output data: L/R = H (right shift)
Output Data Out 1 D00~D07 Out 2 D10~D17 Out 3 D20~D27 Out 4 D30~D37 Out 5 D40~D47 Out 6 D50~D57 ... Out 384 D50~D57
L/R = L (left shift)
Output Data VDD1 Out 1 D00~D07 Out 2 D10~D17 Out 3 D20~D27 Out 4 D30~D37 Out 5 D40~D47 Out 6 D50~D57 ... Out 384 D50~D57
GMA2 GMA3 GMA4 GMA5 GMA6 GMA7 GMA8 GMA9 GMA10 GMA11 GMA12 GMA13 GMA14 GMA15
GMA16
VSS1
00
20
40
80
CO
FO FE FF
Input Data (HEX) NOTE: For input terminals GMA6 and GMA11, the TCP option can be used for internal processing.
Figure 1. Conceptual Drawing of Gamma Correction
6
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
detailed description (continued)
GMA1 R1
Positive Polarity External
Power R7 Supply GMA8 GMA9 for R8
Reference
Power Negative Polarity
R14 GMA16 R1, R14 R2, R13 R3, R12 R4, R11 R5, R10 R6, R9 R7, R8 218 70 64 64 76 87 29
NOTE: GMA6 and GMA11 are processed within the TCP after selecting the TCP option 7+7. The internal resistances between GMA5 - 7 and between GMA10 - 12 become R5 + R6 and R9 + R10.
Figure 2. Resistance Between Reference Potential Input Terminals for Gamma Correction (Reference)
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity For 8x8 gamma correction reference potential:
DATA (H) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA1 GMA2+(GMA1-GMA2)x197/218 GMA2+(GMA1-GMA2)x176/218 GMA2+(GMA1-GMA2)x161/218 GMA2+(GMA1-GMA2)x146/218 GMA2+(GMA1-GMA2)x135/218 GMA2+(GMA1-GMA2)x124/218 GMA2+(GMA1-GMA2)x116/218 GMA2+(GMA1-GMA2)x108/218 GMA2+(GMA1-GMA2)x100/218 GMA2+(GMA1-GMA2)x92/218 GMA2+(GMA1-GMA2)x84/218 GMA2+(GMA1-GMA2)x76/218 GMA2+(GMA1-GMA2)x71/218 GMA2+(GMA1-GMA2)x66/218 GMA2+(GMA1-GMA2)x61/218 GMA2+(GMA1-GMA2)x56/218 GMA2+(GMA1-GMA2)x52/218 GMA2+(GMA1-GMA2)x48/218 GMA2+(GMA1-GMA2)x44/218 GMA2+(GMA1-GMA2)x40/218 GMA2+(GMA1-GMA2)x36/218 GMA2+(GMA1-GMA2)x32/218 GMA2+(GMA1-GMA2)x28/218 GMA2+(GMA1-GMA2)x24/218 GMA2+(GMA1-GMA2)x21/218 GMA2+(GMA1-GMA2)x18/218 GMA2+(GMA1-GMA2)x15/218 GMA2+(GMA1-GMA2)x12/218 GMA2+(GMA1-GMA2)x9/218 GMA2+(GMA1-GMA2)x6/218 GMA2+(GMA1-GMA2)x3/218 GMA2 GMA3+(GMA2-GMA3)x67/70 GMA3+(GMA2-GMA3)x64/70 GMA3+(GMA2-GMA3)x61/70 GMA3+(GMA2-GMA3)x58/70 GMA3+(GMA2-GMA3)x55/70 GMA3+(GMA2-GMA3)x52/70 GMA3+(GMA2-GMA3)x49/70 GMA3+(GMA2-GMA3)x47/70 GMA3+(GMA2-GMA3)x45/70 GMA3+(GMA2-GMA3)x43/70 GMA3+(GMA2-GMA3)x41/70 GMA3+(GMA2-GMA3)x39/70 GMA3+(GMA2-GMA3)x37/70 GMA3+(GMA2-GMA3)x35/70 GMA3+(GMA2-GMA3)x33/70
8
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA3+(GMA2-GMA3)x31/70 GMA3+(GMA2-GMA3)x29/70 GMA3+(GMA2-GMA3)x27/70 GMA3+(GMA2-GMA3)x25/70 GMA3+(GMA2-GMA3)x23/70 GMA3+(GMA2-GMA3)x21/70 GMA3+(GMA2-GMA3)x19/70 GMA3+(GMA2-GMA3)x17/70 GMA3+(GMA2-GMA3)x15/70 GMA3+(GMA2-GMA3)x13/70 GMA3+(GMA2-GMA3)x11/70 GMA3+(GMA2-GMA3)x9/70 GMA3+(GMA2-GMA3)x7/70 GMA3+(GMA2-GMA3)x5/70 GMA3+(GMA2-GMA3)x3/70 GMA3+(GMA2-GMA3)x1/70 GMA3 GMA4+(GMA3-GMA4)x63/64 GMA4+(GMA3-GMA4)x62/64 GMA4+(GMA3-GMA4)x61/64 GMA4+(GMA3-GMA4)x60/64 GMA4+(GMA3-GMA4)x59/64 GMA4+(GMA3-GMA4)x58/64 GMA4+(GMA3-GMA4)x57/64 GMA4+(GMA3-GMA4)x56/64 GMA4+(GMA3-GMA4)x55/64 GMA4+(GMA3-GMA4)x54/64 GMA4+(GMA3-GMA4)x53/64 GMA4+(GMA3-GMA4)x52/64 GMA4+(GMA3-GMA4)x51/64 GMA4+(GMA3-GMA4)x50/64 GMA4+(GMA3-GMA4)x49/64 GMA4+(GMA3-GMA4)x48/64 GMA4+(GMA3-GMA4)x47/64 GMA4+(GMA3-GMA4)x46/64 GMA4+(GMA3-GMA4)x45/64 GMA4+(GMA3-GMA4)x44/64 GMA4+(GMA3-GMA4)x43/64 GMA4+(GMA3-GMA4)x42/64 GMA4+(GMA3-GMA4)x41/64 GMA4+(GMA3-GMA4)x40/64 GMA4+(GMA3-GMA4)x39/64 GMA4+(GMA3-GMA4)x38/64 GMA4+(GMA3-GMA4)x37/64 GMA4+(GMA3-GMA4)x36/64 GMA4+(GMA3-GMA4)x35/64 GMA4+(GMA3-GMA4)x34/64 GMA4+(GMA3-GMA4)x33/64
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA4+(GMA3-GMA4)x32/64 GMA4+(GMA3-GMA4)x31/64 GMA4+(GMA3-GMA4)x30/64 GMA4+(GMA3-GMA4)x29/64 GMA4+(GMA3-GMA4)x28/64 GMA4+(GMA3-GMA4)x27/64 GMA4+(GMA3-GMA4)x26/64 GMA4+(GMA3-GMA4)x25/64 GMA4+(GMA3-GMA4)x24/64 GMA4+(GMA3-GMA4)x23/64 GMA4+(GMA3-GMA4)x22/64 GMA4+(GMA3-GMA4)x21/64 GMA4+(GMA3-GMA4)x20/64 GMA4+(GMA3-GMA4)x19/64 GMA4+(GMA3-GMA4)x18/64 GMA4+(GMA3-GMA4)x17/64 GMA4+(GMA3-GMA4)x16/64 GMA4+(GMA3-GMA4)x15/64 GMA4+(GMA3-GMA4)x14/64 GMA4+(GMA3-GMA4)x13/64 GMA4+(GMA3-GMA4)x12/64 GMA4+(GMA3-GMA4)x11/64 GMA4+(GMA3-GMA4)x10/64 GMA4+(GMA3-GMA4)x9/64 GMA4+(GMA3-GMA4)x8/64 GMA4+(GMA3-GMA4)x7/64 GMA4+(GMA3-GMA4)x6/64 GMA4+(GMA3-GMA4)x5/64 GMA4+(GMA3-GMA4)x4/64 GMA4+(GMA3-GMA4)x3/64 GMA4+(GMA3-GMA4)x2/64 GMA4+(GMA3-GMA4)x1/64 GMA4 GMA5+(GMA4-GMA5)x63/64 GMA5+(GMA4-GMA5)x62/64 GMA5+(GMA4-GMA5)x61/64 GMA5+(GMA4-GMA5)x60/64 GMA5+(GMA4-GMA5)x59/64 GMA5+(GMA4-GMA5)x58/64 GMA5+(GMA4-GMA5)x57/64 GMA5+(GMA4-GMA5)x56/64 GMA5+(GMA4-GMA5)x55/64 GMA5+(GMA4-GMA5)x54/64 GMA5+(GMA4-GMA5)x53/64 GMA5+(GMA4-GMA5)x52/64 GMA5+(GMA4-GMA5)x51/64 GMA5+(GMA4-GMA5)x50/64 GMA5+(GMA4-GMA5)x49/64
10
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA5+(GMA4-GMA5)x48/64 GMA5+(GMA4-GMA5)x47/64 GMA5+(GMA4-GMA5)x46/64 GMA5+(GMA4-GMA5)x45/64 GMA5+(GMA4-GMA5)x44/64 GMA5+(GMA4-GMA5)x43/64 GMA5+(GMA4-GMA5)x42/64 GMA5+(GMA4-GMA5)x41/64 GMA5+(GMA4-GMA5)x40/64 GMA5+(GMA4-GMA5)x39/64 GMA5+(GMA4-GMA5)x38/64 GMA5+(GMA4-GMA5)x37/64 GMA5+(GMA4-GMA5)x36/64 GMA5+(GMA4-GMA5)x35/64 GMA5+(GMA4-GMA5)x34/64 GMA5+(GMA4-GMA5)x33/64 GMA5+(GMA4-GMA5)x32/64 GMA5+(GMA4-GMA5)x31/64 GMA5+(GMA4-GMA5)x30/64 GMA5+(GMA4-GMA5)x29/64 GMA5+(GMA4-GMA5)x28/64 GMA5+(GMA4-GMA5)x27/64 GMA5+(GMA4-GMA5)x26/64 GMA5+(GMA4-GMA5)x25/64 GMA5+(GMA4-GMA5)x24/64 GMA5+(GMA4-GMA5)x23/64 GMA5+(GMA4-GMA5)x22/64 GMA5+(GMA4-GMA5)x21/64 GMA5+(GMA4-GMA5)x20/64 GMA5+(GMA4-GMA5)x19/64 GMA5+(GMA4-GMA5)x18/64 GMA5+(GMA4-GMA5)x17/64 GMA5+(GMA4-GMA5)x16/64 GMA5+(GMA4-GMA5)x15/64 GMA5+(GMA4-GMA5)x14/64 GMA5+(GMA4-GMA5)x13/64 GMA5+(GMA4-GMA5)x12/64 GMA5+(GMA4-GMA5)x11/64 GMA5+(GMA4-GMA5)x10/64 GMA5+(GMA4-GMA5)x9/64 GMA5+(GMA4-GMA5)x8/64 GMA5+(GMA4-GMA5)x7/64 GMA5+(GMA4-GMA5)x6/64 GMA5+(GMA4-GMA5)x5/64 GMA5+(GMA4-GMA5)x4/64 GMA5+(GMA4-GMA5)x3/64 GMA5+(GMA4-GMA5)x2/64 GMA5+(GMA4-GMA5)x1/64
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
11
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA5 GMA6+(GMA5-GMA6)x75/76 GMA6+(GMA5-GMA6)x74/76 GMA6+(GMA5-GMA6)x73/76 GMA6+(GMA5-GMA6)x72/76 GMA6+(GMA5-GMA6)x71/76 GMA6+(GMA5-GMA6)x70/76 GMA6+(GMA5-GMA6)x69/76 GMA6+(GMA5-GMA6)x68/76 GMA6+(GMA5-GMA6)x67/76 GMA6+(GMA5-GMA6)x66/76 GMA6+(GMA5-GMA6)x65/76 GMA6+(GMA5-GMA6)x64/76 GMA6+(GMA5-GMA6)x63/76 GMA6+(GMA5-GMA6)x62/76 GMA6+(GMA5-GMA6)x61/76 GMA6+(GMA5-GMA6)x60/76 GMA6+(GMA5-GMA6)x59/76 GMA6+(GMA5-GMA6)x58/76 GMA6+(GMA5-GMA6)x57/76 GMA6+(GMA5-GMA6)x56/76 GMA6+(GMA5-GMA6)x55/76 GMA6+(GMA5-GMA6)x54/76 GMA6+(GMA5-GMA6)x53/76 GMA6+(GMA5-GMA6)x51/76 GMA6+(GMA5-GMA6)x49/76 GMA6+(GMA5-GMA6)x47/76 GMA6+(GMA5-GMA6)x45/76 GMA6+(GMA5-GMA6)x43/76 GMA6+(GMA5-GMA6)x41/76 GMA6+(GMA5-GMA6)x39/76 GMA6+(GMA5-GMA6)x37/76 GMA6+(GMA5-GMA6)x35/76 GMA6+(GMA5-GMA6)x33/76 GMA6+(GMA5-GMA6)x31/76 GMA6+(GMA5-GMA6)x29/76 GMA6+(GMA5-GMA6)x27/76 GMA6+(GMA5-GMA6)x25/76 GMA6+(GMA5-GMA6)x23/76 GMA6+(GMA5-GMA6)x21/76 GMA6+(GMA5-GMA6)x19/76 GMA6+(GMA5-GMA6)x17/76 GMA6+(GMA5-GMA6)x15/76 GMA6+(GMA5-GMA6)x13/76 GMA6+(GMA5-GMA6)x11/76 GMA6+(GMA5-GMA6)x9/76 GMA6+(GMA5-GMA6)x6/76 GMA6+(GMA5-GMA6)x3/76
12
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA6 GMA7+(GMA6-GMA7)x84/87 GMA7+(GMA6-GMA7)x81/87 GMA7+(GMA6-GMA7)x78/87 GMA7+(GMA6-GMA7)x75/87 GMA7+(GMA6-GMA7)x72/87 GMA7+(GMA6-GMA7)x68/87 GMA7+(GMA6-GMA7)x64/87 GMA7+(GMA6-GMA7)x60/87 GMA7+(GMA6-GMA7)x55/87 GMA7+(GMA6-GMA7)x50/87 GMA7+(GMA6-GMA7)x42/87 GMA7+(GMA6-GMA7)x32/87 GMA7+(GMA6-GMA7)x19/87 GMA7 GMA8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
13
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 7x7 gamma correction reference potential (only data (H) C0-FD change):
DATA (H) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA5 GMA7+(GMA5-GMA7)x162/163 GMA7+(GMA5-GMA7)x161/163 GMA7+(GMA5-GMA7)x160/163 GMA7+(GMA5-GMA7)x159/163 GMA7+(GMA5-GMA7)x158/163 GMA7+(GMA5-GMA7)x157/163 GMA7+(GMA5-GMA7)x156/163 GMA7+(GMA5-GMA7)x155/163 GMA7+(GMA5-GMA7)x154/163 GMA7+(GMA5-GMA7)x153/163 GMA7+(GMA5-GMA7)x152/163 GMA7+(GMA5-GMA7)x151/163 GMA7+(GMA5-GMA7)x150/163 GMA7+(GMA5-GMA7)x149/163 GMA7+(GMA5-GMA7)x148/163 GMA7+(GMA5-GMA7)x147/163 GMA7+(GMA5-GMA7)x146/163 GMA7+(GMA5-GMA7)x145/163 GMA7+(GMA5-GMA7)x144/163 GMA7+(GMA5-GMA7)x143/163 GMA7+(GMA5-GMA7)x142/163 GMA7+(GMA5-GMA7)x141/163 GMA7+(GMA5-GMA7)x140/163 GMA7+(GMA5-GMA7)x138/163 GMA7+(GMA5-GMA7)x136/163 GMA7+(GMA5-GMA7)x134/163 GMA7+(GMA5-GMA7)x132/163 GMA7+(GMA5-GMA7)x130/163 GMA7+(GMA5-GMA7)x128/163 GMA7+(GMA5-GMA7)x126/163 GMA7+(GMA5-GMA7)x124/163 GMA7+(GMA5-GMA7)x122/163 GMA7+(GMA5-GMA7)x120/163 GMA7+(GMA5-GMA7)x118/163 GMA7+(GMA5-GMA7)x116/163 GMA7+(GMA5-GMA7)x114/163 GMA7+(GMA5-GMA7)x112/163 GMA7+(GMA5-GMA7)x110/163 GMA7+(GMA5-GMA7)x108/163 GMA7+(GMA5-GMA7)x106/163 GMA7+(GMA5-GMA7)x104/163 GMA7+(GMA5-GMA7)x102/163 GMA7+(GMA5-GMA7)x100/163 GMA7+(GMA5-GMA7)x98/163 GMA7+(GMA5-GMA7)x96/163 GMA7+(GMA5-GMA7)x93/163 GMA7+(GMA5-GMA7)x90/163
14
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at positive polarity (continued) For 7x7 gamma correction reference potential (only data (H) C0-FD change):
DATA (H) F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA7+(GMA5-GMA7)x87/163 GMA7+(GMA5-GMA7)x84/163 GMA7+(GMA5-GMA7)x81/163 GMA7+(GMA5-GMA7)x78/163 GMA7+(GMA5-GMA7)x75/163 GMA7+(GMA5-GMA7)x72/163 GMA7+(GMA5-GMA7)x68/163 GMA7+(GMA5-GMA7)x64/163 GMA7+(GMA6-GMA7)x60/163 GMA7+(GMA6-GMA7)x55/163 GMA7+(GMA6-GMA7)x50/163 GMA7+(GMA6-GMA7)x42/163 GMA7+(GMA6-GMA7)x32/163 GMA7+(GMA6-GMA7)x19/163 GMA7 GMA8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
15
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity For 8x8 gamma correction reference potential:
DATA (H) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA16 GMA16+(GMA15-GMA16)x21/218 GMA16+(GMA15-GMA16)x42/218 GMA16+(GMA15-GMA16)x57/218 GMA16+(GMA15-GMA16)x72/218 GMA16+(GMA15-GMA16)x83/218 GMA16+(GMA15-GMA16)x94/218 GMA16+(GMA15-GMA16)x102/218 GMA16+(GMA15-GMA16)x110/218 GMA16+(GMA15-GMA16)x118/218 GMA16+(GMA15-GMA16)x126/218 GMA16+(GMA15-GMA16)x134/218 GMA16+(GMA15-GMA16)x142/218 GMA16+(GMA15-GMA16)x147/218 GMA16+(GMA15-GMA16)x152/218 GMA16+(GMA15-GMA16)x157/218 GMA16+(GMA15-GMA16)x162/218 GMA16+(GMA15-GMA16)x166/218 GMA16+(GMA15-GMA16)x170/218 GMA16+(GMA15-GMA16)x174/218 GMA16+(GMA15-GMA16)x178/218 GMA16+(GMA15-GMA16)x182/218 GMA16+(GMA15-GMA16)x186/218 GMA16+(GMA15-GMA16)x190/218 GMA16+(GMA15-GMA16)x194/218 GMA16+(GMA15-GMA16)x197/218 GMA16+(GMA15-GMA16)x200/218 GMA16+(GMA15-GMA16)x203/218 GMA16+(GMA15-GMA16)x206/218 GMA16+(GMA15-GMA16)x209/218 GMA16+(GMA15-GMA16)x212/218 GMA16+(GMA15-GMA16)x215/218 GMA15 GMA15+(GMA14-GMA15)x3/70 GMA15+(GMA14-GMA15)x6/70 GMA15+(GMA14-GMA15)x9/70 GMA15+(GMA14-GMA15)x12/70 GMA15+(GMA14-GMA15)x15/70 GMA15+(GMA14-GMA15)x18/70 GMA15+(GMA14-GMA15)x21/70 GMA15+(GMA14-GMA15)x23/70 GMA15+(GMA14-GMA15)x25/70 GMA15+(GMA14-GMA15)x27/70 GMA15+(GMA14-GMA15)x29/70 GMA15+(GMA14-GMA15)x31/70 GMA15+(GMA14-GMA15)x33/70 GMA15+(GMA14-GMA15)x35/70 GMA15+(GMA14-GMA15)x37/70
16
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA15+(GMA14-GMA15)x39/70 GMA15+(GMA14-GMA15)x41/70 GMA15+(GMA14-GMA15)x43/70 GMA15+(GMA14-GMA15)x45/70 GMA15+(GMA14-GMA15)x47/70 GMA15+(GMA14-GMA15)x49/70 GMA15+(GMA14-GMA15)x51/70 GMA15+(GMA14-GMA15)x53/70 GMA15+(GMA14-GMA15)x55/70 GMA15+(GMA14-GMA15)x57/70 GMA15+(GMA14-GMA15)x59/70 GMA15+(GMA14-GMA15)x61/70 GMA15+(GMA14-GMA15)x63/70 GMA15+(GMA14-GMA15)x65/70 GMA15+(GMA14-GMA15)x67/70 GMA15+(GMA14-GMA15)x69/70 GMA14 GMA14+(GMA13-GMA14)x1/64 GMA14+(GMA13-GMA14)x2/64 GMA14+(GMA13-GMA14)x3/64 GMA14+(GMA13-GMA14)x4/64 GMA14+(GMA13-GMA14)x5/64 GMA14+(GMA13-GMA14)x6/64 GMA14+(GMA13-GMA14)x7/64 GMA14+(GMA13-GMA14)x8/64 GMA14+(GMA13-GMA14)x9/64 GMA14+(GMA13-GMA14)x10/64 GMA14+(GMA13-GMA14)x11/64 GMA14+(GMA13-GMA14)x12/64 GMA14+(GMA13-GMA14)x13/64 GMA14+(GMA13-GMA14)x14/64 GMA14+(GMA13-GMA14)x15/64 GMA14+(GMA13-GMA14)x16/64 GMA14+(GMA13-GMA14)x17/64 GMA14+(GMA13-GMA14)x18/64 GMA14+(GMA13-GMA14)x19/64 GMA14+(GMA13-GMA14)x20/64 GMA14+(GMA13-GMA14)x21/64 GMA14+(GMA13-GMA14)x22/64 GMA14+(GMA13-GMA14)x23/64 GMA14+(GMA13-GMA14)x24/64 GMA14+(GMA13-GMA14)x25/64 GMA14+(GMA13-GMA14)x26/64 GMA14+(GMA13-GMA14)x27/64 GMA14+(GMA13-GMA14)x28/64 GMA14+(GMA13-GMA14)x29/64 GMA14+(GMA13-GMA14)x30/64 GMA14+(GMA13-GMA14)x31/64
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
17
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F Dx7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA14+(GMA13-GMA14)x32/64 GMA14+(GMA13-GMA14)x33/64 GMA14+(GMA13-GMA14)x34/64 GMA14+(GMA13-GMA14)x35/64 GMA14+(GMA13-GMA14)x36/64 GMA14+(GMA13-GMA14)x37/64 GMA14+(GMA13-GMA14)x38/64 GMA14+(GMA13-GMA14)x39/64 GMA14+(GMA13-GMA14)x40/64 GMA14+(GMA13-GMA14)x41/64 GMA14+(GMA13-GMA14)x42/64 GMA14+(GMA13-GMA14)x43/64 GMA14+(GMA13-GMA14)x44/64 GMA14+(GMA13-GMA14)x45/64 GMA14+(GMA13-GMA14)x46/64 GMA14+(GMA13-GMA14)x47/64 GMA14+(GMA13-GMA14)x48/64 GMA14+(GMA13-GMA14)x49/64 GMA14+(GMA13-GMA14)x50/64 GMA14+(GMA13-GMA14)x51/64 GMA14+(GMA13-GMA14)x52/64 GMA14+(GMA13-GMA14)x53/64 GMA14+(GMA13-GMA14)x54/64 GMA14+(GMA13-GMA14)x55/64 GMA14+(GMA13-GMA14)x56/64 GMA14+(GMA13-GMA14)x57/64 GMA14+(GMA13-GMA14)x58/64 GMA14+(GMA13-GMA14)x59/64 GMA14+(GMA13-GMA14)x60/64 GMA14+(GMA13-GMA14)x61/64 GMA14+(GMA13-GMA14)x62/64 GMA14+(GMA13-GMA14)x63/64 GMA13 GMA13+(GMA12-GMA13)x1/64 GMA13+(GMA12-GMA13)x2/64 GMA13+(GMA12-GMA13)x3/64 GMA13+(GMA12-GMA13)x4/64 GMA13+(GMA12-GMA13)x5/64 GMA13+(GMA12-GMA13)x6/64 GMA13+(GMA12-GMA13)x7/64 GMA13+(GMA12-GMA13)x8/64 GMA13+(GMA12-GMA13)x9/64 GMA13+(GMA12-GMA13)x10/64 GMA13+(GMA12-GMA13)x11/64 GMA13+(GMA12-GMA13)x12/64 GMA13+(GMA12-GMA13)x13/64 GMA13+(GMA12-GMA13)x14/64 GMA13+(GMA12-GMA13)x15/64
18
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA13+(GMA12-GMA13)x16/64 GMA13+(GMA12-GMA13)x17/64 GMA13+(GMA12-GMA13)x18/64 GMA13+(GMA12-GMA13)x19/64 GMA13+(GMA12-GMA13)x20/64 GMA13+(GMA12-GMA13)x21/64 GMA13+(GMA12-GMA13)x22/64 GMA13+(GMA12-GMA13)x23/64 GMA13+(GMA12-GMA13)x24/64 GMA13+(GMA12-GMA13)x25/64 GMA13+(GMA12-GMA13)x26/64 GMA13+(GMA12-GMA13)x27/64 GMA13+(GMA12-GMA13)x28/64 GMA13+(GMA12-GMA13)x29/64 GMA13+(GMA12-GMA13)x30/64 GMA13+(GMA12-GMA13)x31/64 GMA13+(GMA12-GMA13)x32/64 GMA13+(GMA12-GMA13)x33/64 GMA13+(GMA12-GMA13)x34/64 GMA13+(GMA12-GMA13)x35/64 GMA13+(GMA12-GMA13)x36/64 GMA13+(GMA12-GMA13)x37/64 GMA13+(GMA12-GMA13)x38/64 GMA13+(GMA12-GMA13)x39/64 GMA13+(GMA12-GMA13)x40/64 GMA13+(GMA12-GMA13)x41/64 GMA13+(GMA12-GMA13)x42/64 GMA13+(GMA12-GMA13)x43/64 GMA13+(GMA12-GMA13)x44/64 GMA13+(GMA12-GMA13)x45/64 GMA13+(GMA12-GMA13)x46/64 GMA13+(GMA12-GMA13)x47/64 GMA13+(GMA12-GMA13)x48/64 GMA13+(GMA12-GMA13)x49/64 GMA13+(GMA12-GMA13)x50/64 GMA13+(GMA12-GMA13)x51/64 GMA13+(GMA12-GMA13)x52/64 GMA13+(GMA12-GMA13)x53/64 GMA13+(GMA12-GMA13)x54/64 GMA13+(GMA12-GMA13)x55/64 GMA13+(GMA12-GMA13)x56/64 GMA13+(GMA12-GMA13)x57/64 GMA13+(GMA12-GMA13)x58/64 GMA13+(GMA12-GMA13)x59/64 GMA13+(GMA12-GMA13)x60/64 GMA13+(GMA12-GMA13)x61/64 GMA13+(GMA12-GMA13)x62/64 GMA13+(GMA12-GMA13)x63/64
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA12 GMA12+(GMA11-GMA12)x1/76 GMA12+(GMA11-GMA12)x2/76 GMA12+(GMA11-GMA12)x3/76 GMA12+(GMA11-GMA12)x4/76 GMA12+(GMA11-GMA12)x5/76 GMA12+(GMA11-GMA12)x6/76 GMA12+(GMA11-GMA12)x7/76 GMA12+(GMA11-GMA12)x8/76 GMA12+(GMA11-GMA12)x9/76 GMA12+(GMA11-GMA12)x10/76 GMA12+(GMA11-GMA12)x11/76 GMA12+(GMA11-GMA12)x12/76 GMA12+(GMA11-GMA12)x13/76 GMA12+(GMA11-GMA12)x14/76 GMA12+(GMA11-GMA12)x15/76 GMA12+(GMA11-GMA12)x16/76 GMA12+(GMA11-GMA12)x17/76 GMA12+(GMA11-GMA12)x18/76 GMA12+(GMA11-GMA12)x19/76 GMA12+(GMA11-GMA12)x20/76 GMA12+(GMA11-GMA12)x21/76 GMA12+(GMA11-GMA12)x22/76 GMA12+(GMA11-GMA12)x23/76 GMA12+(GMA11-GMA12)x25/76 GMA12+(GMA11-GMA12)x27/76 GMA12+(GMA11-GMA12)x29/76 GMA12+(GMA11-GMA12)x31/76 GMA12+(GMA11-GMA12)x33/76 GMA12+(GMA11-GMA12)x35/76 GMA12+(GMA11-GMA12)x37/76 GMA12+(GMA11-GMA12)x39/76 GMA12+(GMA11-GMA12)x41/76 GMA12+(GMA11-GMA12)x43/76 GMA12+(GMA11-GMA12)x45/76 GMA12+(GMA11-GMA12)x47/76 GMA12+(GMA11-GMA12)x49/76 GMA12+(GMA11-GMA12)x51/76 GMA12+(GMA11-GMA12)x53/76 GMA12+(GMA11-GMA12)x55/76 GMA12+(GMA11-GMA12)x57/76 GMA12+(GMA11-GMA12)x59/76 GMA12+(GMA11-GMA12)x61/76 GMA12+(GMA11-GMA12)x63/76 GMA12+(GMA11-GMA12)x65/76 GMA12+(GMA11-GMA12)x67/76 GMA12+(GMA11-GMA12)x70/76 GMA12+(GMA11-GMA12)x73/76
20
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 8x8 gamma correction reference potential:
DATA (H) F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA11 GMA11+(GMA10-GMA11)x3/87 GMA11+(GMA10-GMA11)x6/87 GMA11+(GMA10-GMA11)x9/87 GMA11+(GMA10-GMA11)x12/87 GMA11+(GMA10-GMA11)x15/87 GMA11+(GMA10-GMA11)x19/87 GMA11+(GMA10-GMA11)x23/87 GMA11+(GMA10-GMA11)x27/87 GMA11+(GMA10-GMA11)x32/87 GMA11+(GMA10-GMA11)x37/87 GMA11+(GMA10-GMA11)x45/87 GMA11+(GMA10-GMA11)x55/87 GMA11+(GMA10-GMA11)x68/87 GMA10 GMA9
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21
MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 7x7 gamma correction reference potential (only data (H) C0-FD change):
DATA (H) C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA12 GMA12+(GMA10-GMA12)x1/163 GMA12+(GMA10-GMA12)x2/163 GMA12+(GMA10-GMA12)x3/163 GMA12+(GMA10-GMA12)x4/163 GMA12+(GMA10-GMA12)x5/163 GMA12+(GMA10-GMA12)x6/163 GMA12+(GMA10-GMA12)x7/163 GMA12+(GMA10-GMA12)x8/163 GMA12+(GMA10-GMA12)x9/163 GMA12+(GMA10-GMA12)x10/163 GMA12+(GMA10-GMA12)x11/163 GMA12+(GMA10-GMA12)x12/163 GMA12+(GMA10-GMA12)x13/163 GMA12+(GMA10-GMA12)x14/163 GMA12+(GMA10-GMA12)x15/163 GMA12+(GMA10-GMA12)x16/163 GMA12+(GMA10-GMA12)x17/163 GMA12+(GMA10-GMA12)x18/163 GMA12+(GMA10-GMA12)x19/163 GMA12+(GMA10-GMA12)x20/163 GMA12+(GMA10-GMA12)x21/163 GMA12+(GMA10-GMA12)x22/163 GMA12+(GMA10-GMA12)x23/163 GMA12+(GMA10-GMA12)x25/163 GMA12+(GMA10-GMA12)x27/163 GMA12+(GMA10-GMA12)x29/163 GMA12+(GMA10-GMA12)x31/163 GMA12+(GMA10-GMA12)x33/163 GMA12+(GMA10-GMA12)x35/163 GMA12+(GMA10-GMA12)x37/163 GMA12+(GMA10-GMA12)x39/163 GMA12+(GMA10-GMA12)x41/163 GMA12+(GMA10-GMA12)x43/163 GMA12+(GMA10-GMA12)x45/163 GMA12+(GMA10-GMA12)x47/163 GMA12+(GMA10-GMA12)x49/163 GMA12+(GMA10-GMA12)x51/163 GMA12+(GMA10-GMA12)x53/163 GMA12+(GMA10-GMA12)x55/163 GMA12+(GMA10-GMA12)x57/163 GMA12+(GMA10-GMA12)x59/163 GMA12+(GMA10-GMA12)x61/163 GMA12+(GMA10-GMA12)x63/163 GMA12+(GMA10-GMA12)x65/163 GMA12+(GMA10-GMA12)x67/163 GMA12+(GMA10-GMA12)x70/163 GMA12+(GMA10-GMA12)x73/163
22
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
relationship between input data and output voltage at negative polarity (continued) For 7x7 gamma correction reference potential (only data (H) C0-FD change):
DATA (H) F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF Dx7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Dx3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Dx2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Dx1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Dx0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 OUTPUT VOLTAGE GMA12+(GMA10-GMA12)x76/163 GMA12+(GMA10-GMA12)x79/163 GMA12+(GMA10-GMA12)x82/163 GMA12+(GMA10-GMA12)x85/163 GMA12+(GMA10-GMA12)x88/163 GMA12+(GMA10-GMA12)x91/163 GMA12+(GMA10-GMA12)x95/163 GMA12+(GMA10-GMA12)x99/163 GMA12+(GMA10-GMA12)x103/163 GMA12+(GMA10-GMA12)x108/163 GMA12+(GMA10-GMA12)x113/163 GMA12+(GMA10-GMA12)x121/163 GMA12+(GMA10-GMA12)x131/163 GMA12+(GMA10-GMA12)x144/163 GMA10 GMA9
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD1 (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to +14 V Supply voltage, VDD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to +5 V Input voltage, VI (GMA1 - GMA16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VDD1 + 0.5 V Input voltage, VI (analog inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VDD2 + 0.5 V Output voltage, VO (EIO1, EIO2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VDD2 + 0.5 V Output voltage, VO (OUT1 - OUT384) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VDD1 + 0.5 V Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to VSS1 = VSS2 = 0 V. 2. Power up in the following order: VDD2, control inputs, VDD1, GAM1-16. Power down by reversing the sequence.
recommended operating conditions
MIN Supply voltage VDD voltage, Gamma correction potential (see Note 3) Clock frequency, fclk Load capacitance for outputs, CL Operating free-air temperature, TA - 55 NOTE 3: The relative magnitudes of the reference potentials are as follows: [n = 1-15] VDD1 > GMA1, GMAn VDD1 VDD2 VGMA(1-8) VGMA(9-16) 2.5 V 8 2.5 1/2 VDD1 VSS1 + 0.2 NOM MAX 13.5 3.6 VDD1 - 0.2 1/2 VDD1 55 100 125 UNIT V V MHz pF C
v VDD2 < 3.6 V
w GMAn+1, GMA16 > VSS1
24
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
electrical characteristics over recommended operating conditions (unless otherwise noted), VSS1, VSS2 = 0 V
PARAMETER High level input voltage Dx0 - Dx7, LK, TP1, LP, RS, EIO1, EIO2, L/R, REV1, REV2, POL, SHC Dx0 - Dx7, LK, TP1, LP, RS, EIO1, EIO2, L/R, REV1, REV2, POL, SHC Dx0 - Dx7, LK, TP1, LP, RS, EIO1, EIO2, L/R, REV1, REV2, POL, SHC VX = VDD1 - 0.2 V, VO = VX - 1.0 V VX = VDD1 + 0.2 V, VO = VX + 1.0 V VOUT = VDD1 - 0.2 V to VDD1 - 0.35 V VOUT = VSS1 + 0.2 V to VSS1 + 0.35 V VOUT = VDD1 - 0.2 V to VDD1 - 2.0 V VOUT = VSS1 + 2.0 V to VSS1 + 0.2 V 30 TEST CONDITIONS MIN TYP MAX UNIT
VIH
0.7 VDD2
V
VIL
Low level input voltage
0.3 VDD2
V
IIK
Input leakage current
-1
1
A
ICHG IDIS
Output current (RS = L) (see Note 4)
-100 100
- 30 mA
OUT1 - 384
VO
Deviation between output voltage pins (see Note 5)
OUT1 - 384
- 20
10
20
mV
VAV
g Average output variation (see Note 6) Resistance between reference power supplies
OUT1 - 384
-15 15
15
15
mV
RGMA
GMA1 - GMA8 GMA9 - GMA16 TP1 interval = 20 s, fCLK = 36 MHz, No load, VDD1 = 13.5 V, Black raster test pattern, GMA1 = 13.3 V, GMA16 = 0.2 V No load, VDD1 = 13.5 V, Black raster test pattern, GMA1 = 13.3 V, GMA16 = 0.2 V, Clock and input signal are in the stopped state TP1 interval = 20 s, fCLK = 36 MHz, Checkered dot test pattern Clock and input signal are in the stopped state.
5600
DIDD1
Supply current (during operation) Analog section
10
22
SIDD1
Supply current (during standby)
mA 9.6 18
DIDD2 SIDD2
Supply current (during operation) Supply current (during standby)
1.9
5 A
Digital section g
100
All typical values are at VSS1, VSS2 = 0 V and TA = 25C. NOTES: 4. VX is the output voltage of OUT1 - OUT384. VO is the voltage impressed at OUT1 - OUT384. 5. This is the deviation between terminals with differences in positive and negative amplitudes, when all chip outputs display the same data. 6. This is the inter-chip variation in the average of the output voltage inter-pin deviation (Vo). 7. VOUT is the output voltage of analog output terminals OUT1 - OUT384.
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
timing requirements over recommended operating free-air temperature range, VDD2 = 2.5 V to < 3.6 V
PARAMETER tc1 tw1 tw2 tsu1 th1 tsu2 th2 td1 td2 td3 tsu3 th3 tw3 tsu4 th4 th5 tsu5 CLK cycle time High-level CLK pulse width duration Low-level CLK pulse width duration Data/REV setup time Data/REV hold time Start pulse setup time Start pulse hold time Start pulse signal delay time LCD drive signal delay time TP1 signal E10 (input) setup time TP1 low hold time from final data CLK High-level TP1 signal pulse width duration POL signal TP1 setup time POL signal TP1 hold time SHC hold time SHC setup time TEST CONDITIONS See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3, See Figure 3, See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 3 See Figure 4 See Figure 4 See Notes 8 and 10 See Notes 9 and 10 70 1 1.5 -5 6 4.5 4.5 MIN 18 4 4 4 0 4 0 10 5 10 TYP MAX UNIT ns ns ns ns ns ns ns ns s s ns CLK cycle s ns ns s s
NOTES: 8. Specified as the value at which the driver's output voltage reaches the target output voltage (VDD1 x 0.1). 9. Specified as the value at which the driver's output voltage reaches the target output voltage (8-bit precision). 10. The load of the analog output terminal is the value shown in Figure 7.
PARAMETER MEASUREMENT INFORMATION
tc1 tw 1 tw 2 1 tsu1 th1 LAST-1 (63) LAST (64)
CLK
DXX th2 tsu2 th2 tsu2
1
2
63
64
EI01(L/R=H) EI02(L/R=L) (INPUT) td1 td1
EI02(L/R=H) EI01(L/R=L) (OUTPUT)
Figure 3. Timing Waveforms
26
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
PARAMETER MEASUREMENT INFORMATION
TP1
th5 tsu5 SHC th5
Figure 4. SHC Timing Waveforms
DXX
n line
n+1 line
n+2 line
n+3 line
TP1
SHC
OUT
n-2 line
n-1 line
n line
n+1 line
Figure 5. Relationship Between Input Data and Output
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
PARAMETER MEASUREMENT INFORMATION
TP1
POL
Odd output Hi-Z Hi-Z Hi-Z Hi-Z
Voltage
Voltage
Voltage
Voltage
GMA1-GMA8
GMA9-GMA16
GMA1-GMA8
GMA9-GMA16
Even output Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z
Voltage
Voltage
Voltage
Voltage
GMA9-GMA16
GMA1-GMA8
GMA9-GMA16
GMA1-GMA8
Figure 6. Relationship Between TP1 Signal (Latch Input Terminal), POL Signal (Polarity Reversal), and Outputs
R Output C R = 2 k C = 20 pF
R
R
R
R
C
C
C
C
NOTE: The loads of the analog output terminals (OUT1 - OUT384) are per the above. However, the load circuit value may vary.
Figure 7. Load Circuit
28
POST OFFICE BOX 655303
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MPT57571 384-CHANNEL 256-GRADATION SOURCE DRIVER FOR COLOR TFT LCDS
SGLS110 - FEBRUARY 2000
APPLICATION INFORMATION MPT57571 low power mode
The MPT57571 has a low power mode to reduce current consumption. This mode reduces charge and discharge currents to the load by redistributing the charge stored in the load. This makes efficient, low power consumption operation possible. low power mode operation When the low power mode is selected and TP1 = H, all the outputs from OUT1 through OUT384 are shorted within the driver. In this case, each buffer amp that drives an output is in an isolated state. low power mode output waveform
TP1
OUT1 OUT384
See Note 1
NOTE 1: When TP1 = H, the electric potential becomes a fraction of the previous output potential immediately before it was averaged out by the output capacity. As an example, when a positive polarity output and a negative polarity output each have the same output channel, this is considered to be a symmetrical potential with a reference of 1/2 VDD1, and all capacity values connected to the output are equal: when TP1 = H, all outputs are 1/2 VDD1.
TP1 H width relationship with power and ac characteristics
Delay Time T TP1 H Power Consumption Delay Time T
TP1 H Width
TP1 H Width
Consumption power and delay time T change with the width of TP1 H, as shown in the previous figure; these characteristics also change with the load connected to the output. Therefore, with TP1 H width, it is necessary to select the optimal delay time for the load.
TP1
Output T
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