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| SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary PRODUCT FEATURES FS2 FS1 0 0 1 1 0 0 1 FREQUENCY TABLE FS0 0 1 0 1 0 1 0 CPU 75 100 Tri-State XIN/2 50 60 66.6* PCI 37.5 33.3 Tri-State XIN/4 25 30 33.3* 0 0 0 0 1 1 1 T T T T T T T T T T T T Supports Pentium(R). Pentium(R) II & Pro CPUs. Designed to meet Intel chipset specification 12 CPU and 6 PCI clocks One 48 MHz fixed clocks for USB. One 24 MHz fixed clocks Super IO. Separate power supply pins for mixed CPU, Fixed and PCI clock voltages < 250 ps Max. skew among CPU clocks. < 250 ps Max. skew among PCI clocks. Controlled current output buffers 48-pin SSOP package Spread Spectrum EMI reduction mode Selectable Spread Widths 1 1 1 55 27.5 * may be selected to - .625% or -1.0% down spread CONNECTION DIAGRAM SG590 REF1 REF2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDDC CPU12 VDDC CPU11 VSS VSS CPU10 CPU9 VDDC CPU8 CPU7 CPU6 CPU5 VSS CPU4 CPU3 VDDC NC VSS OE VDD FS0 FS1 NC BLOCK DIAGRAM VDDR Xin Xout REF OSC REF[1:2] XIN XOUT VDDR FS2 CPU1 CPU2 CPU[1:12] VSS PCI1 PCI2 VDDC FS[1:2] OE SWIDTH SSON VDDF 24M VDDF PLL2 48M PLL1 VDDP PCI[1:6] PCI3 PCI4 VDDP PCI5 PCI6 VSS SSON SWIDTH VDDF 24M1 48M2 VSS INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 1 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary PIN DESCRIPTION PIN No. 4 Pin Name Xin PWR VDD I/O I TYPE OSC1 Description On-chip reference oscillator input pin. Requires either an external parallel resonant crystal (nominally 14.318 MHz) or externally generated reference signal O-chip reference oscillator output pin. Drives an external parallel resonant crystal when an externally generated reference signal is used, is left unconnected Frequency select input pins. See frequency select table on page 1. These pin has an internal pull-up Clock outputs. CPU frequency table specified on page 1. 5 Xout VDD O OSC1 27, 26, 7 8, 9, 33, 34, 36, 37, 38, 39, 41, 42, 45, 47 11, 12, 13, 14, 16, 17 3, 10, 18, 24, 30, 35, 43, 44 15 21 32, 40, 46, 48 28 1, 2 22 23 29 20 19 FS(0:2) CPU(1:12) VDDC I O PAD PU BUF1 PCI(1:7) VDDP O BUF4 PCI bus clocks. See frequency select table on page 1. VSS - PWR - Ground pins for the device. VDDP VDDF VDDC VDD REF(1:2) 24M 48M OE SWIDTH SSON VDDR VDDF VDDF VDD - P PWR PWR PWR O O O I I I BUF3 BUF3 BUF3 PAD PU PAD PU PAD PU - 3.3 Volt power supply pins for PCI and PCI_F clock output buffers. 3.3 Volt power supply pins for 24 Mhz and 48 MHz clock output buffers. 3.3 or 2.5 Volt power supply pins for CPU clock output buffers. Power supply pins for analog circuits and core logic Buffered outputs of on-chip reference oscillator. Fixed 24 MHz frequency clock outputs. Fixed 48 MHz frequency clock outputs. When driven to a logic low level, this pin will tristate all output clocks Selects 0.625 % or 1.0 % Spread spectrum modulation width. 1.0% = Logic High When driven to a logic low level this pin enables EMI reducing Spread Spectrum mode (affects only CPU and PCI clocks) for CPU Frequency of 66.6 Mhz only. Power supply for reference clock (Ref) buffers 6 VDDR - PWR INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 2 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary SPECTRUM SPREAD CLOCKING Down Spread Amplitude (dB) With Spectrum Spread Without Spectrum Spread Center Frequency(MHz) Spectrum Analysis CPU CLOCK SPECTRUM SPREADING SELECTION TABLE Unspread (MHz) 66.6 66.6 SWIDTH 0 1 Min (MHz) 66.18 65.9 Center (MHz) 66.39 66.27 Max (MHz) 66.6 66.6 % OF FREQUENCY SPREADING 0.625 % ( - 0.625% + 0%) 1.0 % ( - 1.% + 0%) MODE Down Spread Down Spread INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 3 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary MAXIMUM RATINGS Voltage Relative to VSS: Voltage Relative to VDD: Storage Temperature: Operating Temperature: Maximum Power Supply: -0.3V 0.3V 0C to + 125C 0C to +70C 5V This device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid application of any voltage higher than the maximum rated voltages to this circuit. For proper operation, Vin and Vout should be constrained to the range: VSS<(Vin or Vout) Characteristic Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Voltage IOL = 4mA Output High Voltage IOH = 4mA Tri-State leakage Current Dynamic Supply Current Static Supply Current Crystal Oscillator Capacitance Short Circuit Current Symbol VIL VIH IIL IIH VOL VOH Ioz Idd Isdd Cx ISC Min 2.0 -66 2.4 25 18 Typ Max 0.8 5 0.4 10 TBD TBD Units Vdc Vdc A A Vdc Vdc A mA A pF mA Conditions - All Outputs (see buffer spec) All Outputs Using 3.3V Power (see buffer spec) CPU = 66.6 MHz, PCI = 33.3 MHz Xin and Xout crystal load capacitance values (each) 1 output at a time - 30 seconds VDD = VDDP=VDDF =3.3V 5%, VDDC =2.5V 5%,, TA = 0C to +70C INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 4 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary SWITCHING CHARACTERISTICS Characteristic Output Duty Cycle CPU to PCI Offset Buffer out Skew All CPU Buffer Outputs Buffer out Skew All PCI Buffer Outputs Period Adjacent Cycles Jitter Spectrum 20 dB Bandwidth from Center Symbol tOFF tSKEW1 tSKEW2 P BWJ Min 45 1.5 Typ 50 Max 55 4 175 250 +250 500 Units % ns ps ps ps KHz Conditions Measured at 1.5V CPU load = 20 pF, PCI load = 3 pF measured at 1.5V PCI and 1.25V CPU 20 pf Load Measured at 1.5V 30 pf Load Measured at 1.5V - VDD = VDDP=VDDF =3.3V 5%, VDDC = 2.5V 5%, TA = 0C to +70C BUFFER 1 CHARACTERISTICS FOR CPUCLK(1:12) Characteristic Pull-Up Current Min Pull-Up Current Max Pull-Down Current Min Pull-Down Current Max Rise/Fall Time Min Between 0.4 V and 2.0 V Symbol IOHmin IOHmax IOLmin IOLmax TRFmin Min -27 27 0.4 Typ Max -27 27 1.6 Units mA mA mA mA ns Conditions Vout = 1.0 V Vout = 2.38 V Vout = 1.2 V Vout = 0.3 V 20 pF Load VDD = VDDP=VDDF=3.3V 5%, VDDC =2.5V 5%,, TA = 0C to +70C BUFFER 3 CHARACTERISTICS FOR REF(1:2), 24M and 48 M Characteristic Pull-Up Current Min Pull-Up Current Max Pull-Down Current Min Pull-Down Current Max Rise/Fall Time Between 0.4 V and 2.4 V Symbol IOHmin IOHmax IOLmin IOLmax TRFmin Min -29 29 0.5 Typ Max -23 27 2.0 Units mA mA mA mA ns Conditions Vout = 1.0 V Vout = 3.135 V Vout = 1.95 V Vout = 0.4 V 20 pF Load VDD = VDDP=VDDF =3.3V 5%, VDDC =2.5V 5%,, TA = 0C to +70C INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 5 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary BUFFER 4 CHARACTERISTICS FOR PCICLK(1:6) Characteristic Pull-Up Current Min Pull-Up Current Max Pull-Down Current Min Pull-Down Current Max Rise/Fall Time Between 0.4 V and 2.4 V Symbol IOHmin IOHmax IOLmin IOLmax TRFmax Min -33 30 0.5 Typ Max -33 38 2.0 Units mA mA mA mA ns Conditions Vout = 1.0 V Vout = 3.135 V Vout = 1.95 V Vout = 0.4 V 30 pF Load VDD = VDDP=VDDF =3.3V 5%, VDDC=2.5V 5%,, TA = 0C to +70C CRYSTAL AND REFERENCE OSCILLATOR PARAMETERS Characteristic Frequency Tolerence Symbol Fo TC TS TA OM CP VBIAS Ts CL R1 Min 12.00 0.3Vdd Typ 14.31818 5 Vdd/2 20 Max 16.00 +/-100 +/- 100 5 0.7Vdd 30 40 Units MHz PPM PPM PPM pF V S pF Ohms note 1 Calibration note 1 Stability (Ta -10 to +60C) note 1 Aging (first year @ 25C) note 1 Parallell Resonant Capacitance of XIN and Xout pins Conditions Mode Pin Capacitance DC Bias Voltage Startup time Load Capacitance Effective Series resonant resistance Power Dissipation Shunt Capacitance X1 and X2 Load internal crystal loading gapacitors on each pin (to ground) For maximum accuracy,the total circuit loading capacitance should be equal to CL. This loading capacitance is the effective capacitance across the crystal pins and includes the device pin capacitance (CP) in parallel with any circuit traces, the clock generator and any onboard discrete load capacitors. Budgeting Calculations Typical trace capacitance, (< half inch) is 4 pF, Load to the crystal is therefore 2.0 pF Clock generator internal pin capacitance of 36 pF, Load to the crystal is therefore 18.0 pF the total parasitic capacitance would therefore be = 20.0 pF.(matching CL) Note 1: It is recommended but not manditory that a crystal meets these specifications. DL CO CL - -17 0.10 7 mW pF pF note 1 INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 6 of 7 SG590 Low EMI Clock Generator for Pentium(R) II Systems Preliminary PACKAGE DRAWING AND DIMENSIONS 48 PIN SSOP OUTLINE DIMENSIONS INCHES SYMBOL A C L E H A1 A2 B C D E D A2 A1 B e A a MILLIMETERS MAX 0.110 0.016 0.092 0.0135 0.010 0.630 0.299 MIN 2.41 0.20 2.24 0.203 0.127 15.75 7.42 NOM 2.59 0.31 2.29 0.254 15.88 7.52 0.635 BSC 0.410 0.016 0.040 8 0.100 10.16 0.25 0.61 0 2.16 10.31 0.33 0.81 5 2.36 10.41 0.41 1.02 8 2.54 MAX 2.79 0.41 2.34 0.343 0.254 16.00 7.59 MIN 0.095 0.008 0.088 0.008 0.005 0.620 0.292 NOM 0.102 0.012 0.090 0.010 0.625 0.296 0.025 BSC e H a L a X 0.400 0.10 0.024 0 0.085 0.406 0.013 0.032 5 0.093 ORDERING INFORMATION Part Number Package Type Production Flow SG590AYB 48 PIN SSOP Commercial, 0C to +70C Note: The ordering part number is formed by a combination of device number, device revision, package style, and screening as shown below. Marking: Example: IMI SG590AYB Date Code, Lot # SG590AYB Flow B = Commercial, 0C to + 70C Package Y = SSOP Revision IMI Device Number INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST. MILPITAS, CA 95035 TEL: 408-263-6300 ext. 275 FAX 408-263-6571 Rev 1.3 10/20/97 Page 7 of 7 |
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