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SN74AS1843 9-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS127 - APRIL 1987
* * * * * * *
Center VCC and GND Configuration Provides Minimum Lead Inductance in High Current Switching Applications 3-State Buffer-Type Outputs Drive Bus-Lines Directly Bus-Structured Pinout Provide Extra Bus Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity Buffered Control Inputs to Reduce DC Loading Power-Up High Impedance Package Options Include Plastic DIPs. Use the AS843 for Plastic and Ceramic Chip Carriers and "Small Outline" Package Options Dependable Texas Instruments Quality and Reliability
NT Package (Top View) 5Q 4Q 3Q 2Q 1Q VCC OC 1D 2D 3D 4D 5D
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
6Q 7Q 8Q 9Q PRE C GND CLR 9D 8D 7D 6D
FUNCTION TABLE INPUTS PRE L H H H H X CLR X L H H H X OC L L L L L H C X X H H L X D X X L H X X OUTPUT Q H L L H QO Z
*
description
This 9-bit latch device features three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The nine latches are transparent D-type and have noninverting data (D) inputs. A buffered output control (OC) input can be used to place the nine outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pullup components. The output control (OC) does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are off. The SN74AS1843 is characterized for operation from 0C to 70C.
logic symbol
OC PRE CLR C 1D 2D 3D 4D 5D 6D 7D 8D 9D 7 20 17 19 EN S2 R C1 1D 2 5 4 3 2 1 24 23 22 21
8 9 10 11 12 13 14 15 16
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12,
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303
Copyright (c) 1987, Texas Instruments Incorporated
* DALLAS, TEXAS 75265
1
SN74AS1843 9-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS127 - APRIL 1987
logic diagram (positive logic)
OC PRE CLR C 7 20 17 19
1D
8
S C1 1D R S C1 1D R S C1 1D R S C1 1D R S C1 1D R S C1 1D R S C1 1D R S C1 1D R S C1 1D R
5 1Q
2D
9
4 2Q
3D
10
3 3Q
4D
11
2 4Q
5D
12
1 5Q
6D
13
24 6Q
7D
14
23 7Q
8D
15
22 8Q
9D
16
21 9Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the "Recommended Operating Conditions" section of this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND.
2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN74AS1843 9-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS127 - APRIL 1987
recommended operating conditions
MIN VCC VIH VIL IOH IOL tw tsu th tr TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Pulse duration, enable C high Setup time, data before enable C Hold time, data after enable C Recovery time Operating free-air temperature PRE CLR CLR or PRE low C high 4 4 2.5 2.5 15 14 0 70 ns C ns ns ns 4.5 2 0.8 - 24 48 NOM 5 MAX 5.5 UNIT V V V mA mA
electrical characteristics over full ranges of recommended operating conditions (unless otherwise noted)
PARAMETER VIK VOH VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, TEST CONDITIONS II = - 18 mA IOH = - 2 mA IOH = - 15 mA IOH = - 24 mA IOL = 32 mA IOL = 48 mA VO = 2.7 V VO = 0.4 V VI = 7 V VI = 2.7 V VI = 0.4 V VO = 2.25 V Output high ICC Output low Outputs disabled - 30 37 56 56 MIN VCC - 2 2.4 2 0.35 0.5 50 - 50 0.1 20 - .05 - 112 62 92 92 mA V A A mA A mA mA TYP MAX - 1.2 3.2 UNIT V V
VOL IOZH IOZL II IIH IIL IO
All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
3
SN74AS1843 9-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS127 - APRIL 1987
switching characteristics over recommended ranges of supply voltage and free-air temperature (see Note 2)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX MIN MAX 1 D Q 1 2 C PRE CLR OC OC Q Q Q Q Q 2 2 2 2 2 1 1 6.5 9 12 12 10 13 10.5 13.5 8 8
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ
ns ns ns ns ns ns
NOTE 2: Load circuit and voltage waveforms are shown in Section 1 of the ALS/AS Logic Data Book, 1986.
4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
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Copyright (c) 1998, Texas Instruments Incorporated

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