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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
D D D D
EPICTM (Enhanced-Performance Implanted CMOS) Process Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs
SN54AHC244 . . . J OR W PACKAGE SN74AHC244 . . . DB, DGV, DW, N, OR PW PACKAGE (TOP VIEW)
1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
description
These octal buffers/drivers are designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The 'AHC244 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54AHC244 is characterized for operation over the full military temperature range of -55C to 125C. The SN74AHC244 is characterized for operation from -40C to 85C.
FUNCTION TABLE (each 4-bit buffer/driver) INPUTS OE L L H A H L X OUTPUT Y H L Z SN54AHC244 . . . FK PACKAGE (TOP VIEW)
2Y4 1A1 1OE VCC
1A2 2Y3 1A3 2Y2 1A4
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2OE 1Y1 2A4 1Y2 2A3 1Y3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2000, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
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2Y1 GND 2A1 1Y4 2A2
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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
logic symbol
1OE 1 EN 18 16 14 12 2OE 19 EN 9 7 5 3
1A1 1A2 1A3 1A4
2 4 6 8
1Y1 1Y2 1Y3 1Y4
2A1 2A2 2A3 2A4
11 13 15 17
2Y1 2Y2 2Y3 2Y4
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1OE 1 2OE 19
1A1
2
18
1Y1
2A1
11
9
2Y1
1A2
4
16
1Y2
2A2
13
7
2Y2
1A3
6
14
1Y3
2A3
15
5
2Y3
1A4
8
12
1Y4
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51.
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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
recommended operating conditions (see Note 3)
SN54AHC244 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 3 V VCC = 5.5 V VCC = 2 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 2 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V VCC = 2 V IOL Low-level output current VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V VCC = 3.3 V 0.3 V VCC = 5 V 0.5 V VCC = 3 V VCC = 5.5 V 0 0 2 1.5 2.1 3.85 0.5 0.9 1.65 5.5 VCC -50 -4 -8 50 4 8 100 20 0 0 MAX 5.5 SN74AHC244 MIN 2 1.5 2.1 3.85 0.5 0.9 1.65 5.5 VCC -50 -4 -8 50 4 8 100 20 V V V V MAX 5.5 UNIT V
mA
mA
mA
mA ns/V
t/v
Input transition rise or fall rate
TA Operating free-air temperature -55 125 -40 85 C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC 2V IOH = -50 mA VOH IOH = -4 mA IOH = -8 mA IOL = 50 mA VOL IOL = 4 mA II IOZ ICC Ci Co IOL = 8 mA VI = VCC or GND VO = VCC or GND, VI (OE) = VIL or VIH VI = VCC or GND, VI = VCC or GND IO = 0 3V 4.5 V 3V 4.5 V 2V 3V 4.5 V 3V 4.5 V 0 V to 5.5 V 5.5 V 5.5 V 5V 2 MIN 1.9 2.9 4.4 2.58 3.94 0.1 0.1 0.1 0.36 0.36 0.1 0.25 4 10 TA = 25C TYP MAX 2 3 4.5 SN54AHC244 MIN 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.5 0.5 1* 2.5 40 MAX SN74AHC244 MIN 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 1 2.5 40 10 V V MAX UNIT
mA mA mA
pF pF
VO = VCC or GND 5V 3.5 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A TO (OUTPUT) Y Y Y Y Y Y LOAD CAPACITANCE CL = 15 pF CL = 15 pF CL = 15 pF CL = 50 pF CL = 50 pF CL = 50 pF MIN TA = 25C TYP MAX 5.8* 5.8* 6.6* 6.6* 5* 5* 8.3 8.3 9.1 9.1 10.3 10.3 8.4* 8.4* 10.6* 10.6* 9.7* 9.7* 11.9 11.9 14.1 14.1 14 14 1.5** SN54AHC244 MIN 1* 1* 1* 1* 1* 1* 1 1 1 1 1 1 MAX 10* 10* 12.5* 12.5* 11* 11* 13.5 13.5 16 16 16 16 SN74AHC244 MIN 1 1 1 1 1 1 1 1 1 1 1 1 MAX 10 10 12.5 12.5 11 11 13.5 13.5 16 16 16 16 1.5 UNIT ns ns ns ns ns ns ns
OE OE A
OE OE
tsk(o) CL = 50 pF On products compliant to MIL-PRF-38535, this parameter is not production tested. On products compliant to MIL-PRF-38535, this parameter does not apply.
switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A TO (OUTPUT) Y Y Y Y Y Y LOAD CAPACITANCE CL = 15 pF CL = 15 pF CL = 15 pF CL = 50 pF CL = 50 pF CL = 50 pF MIN TA = 25C TYP MAX 3.9* 3.9* 4.7* 4.7* 5* 5* 5.4 5.4 6.2 6.2 6.7 6.7 5.5* 5.5* 7.3* 7.3* 7.2* 7.2* 7.5 7.5 9.3 9.3 9.2 9.2 1** SN54AHC244 MIN 1* 1* 1* 1* 1* 1* 1 1 1 1 1 1 MAX 6.5* 6.5* 8.5* 8.5* 8.5* 8.5* 8.5 8.5 10.5 10.5 10.5 10.5 SN74AHC244 MIN 1 1 1 1 1 1 1 1 1 1 1 1 MAX 6.5 6.5 8.5 8.5 8.5 8.5 8.5 8.5 10.5 10.5 10.5 10.5 1 UNIT ns ns ns ns ns ns ns
OE OE A
OE OE
tsk(o) CL = 50 pF On products compliant to MIL-PRF-38535, this parameter is not production tested. On products compliant to MIL-PRF-38535, this parameter does not apply.
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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25C (see Note 4)
PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) Quiet output, maximum dynamic VOL Quiet output, minimum dynamic VOL Quiet output, minimum dynamic VOH High-level dynamic input voltage 3.5 1.5 SN74AHC244 MIN TYP 0.5 -0.2 4.8 MAX UNIT V V V V V
VIL(D) Low-level dynamic input voltage NOTE 4: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25C
PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS No load, f = 1 MHz TYP 8.6 UNIT pF
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SN54AHC244, SN74AHC244 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCLS226H - OCTOBER 1995 - REVISED JANUARY 2000
PARAMETER MEASUREMENT INFORMATION
RL = 1 k S1 VCC Open GND
From Output Under Test CL (see Note A)
Test Point
From Output Under Test CL (see Note A)
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain
S1 Open VCC GND VCC
LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS VCC Timing Input 50% VCC tsu Data Input 0V 50% VCC th 0V VCC 50% VCC 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC VCC 50% VCC tPZL 50% VCC tPZH Output Waveform 2 S1 at GND (see Note B) 50% VCC 50% VCC 0V tPLZ VCC VOL + 0.3 V tPHZ VOH - 0.3 V VOH 0 V VOL
tw VCC Input 50% VCC 50% VCC
VOLTAGE WAVEFORMS PULSE DURATION
Input tPLH In-Phase Output tPHL Out-of-Phase Output
50% VCC
50% VCC 0V tPHL
Output Control
50% VCC
VOH 50% VCC VOL tPLH
Output Waveform 1 S1 at VCC (see Note B)
50% VCC
VOH 50% VCC VOL
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright (c) 2000, Texas Instruments Incorporated

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