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SN64BCT241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS046C - FEBRUARY 1990 - REVISED JULY 1998 D D D D D State-of-the-Art BiCMOS Design Substantially Reduces Standby Current 3-State Outputs Drive Bus Lines or Buffer-Memory Address Registers ESD Protection Exceeds 2000 V Per MIL-STD-883 Method 3015 High-Impedance State During Power Up and Power Down Package Options Include Small-Outline (DW) and Standard Plastic DIPs (N) DW OR N PACKAGE (TOP VIEW) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 description This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. With the SN64BCT240 and SN64BCT244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. The SN64BCT241 is characterized for operation from - 40C to 85C and 0C to 70C. FUNCTION TABLES INPUTS 1OE L L H 1A H L X OUTPUT 1Y H L Z INPUTS 2OE H H L 2A H L X OUTPUT 2Y H L Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1998, Texas Instruments Incorporated POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN64BCT241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS046C - FEBRUARY 1990 - REVISED JULY 1998 logic symbol logic diagram (positive logic) 1 EN 18 16 14 12 1OE 1OE 1 1A1 1A2 1A3 1A4 2 4 6 8 1Y1 1Y2 1Y3 1Y4 1A1 2 18 1Y1 1A2 4 16 1Y2 1A3 2OE 19 EN 9 7 5 3 1A4 2Y1 2Y2 2Y3 2Y4 2A1 2OE 6 14 1Y3 8 12 2A1 2A2 2A3 2A4 11 13 15 17 1Y4 19 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 11 9 2Y1 2A2 13 7 2Y2 2A3 15 5 2Y3 17 2A4 3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . - 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to VCC Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Package thermal impedance, JA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative voltage rating may be exceeded if the input clamp current rating is observed. 2. The package thermal impedance is calculated in acordane with JESD 51, except for through-hole packages, which use a trace length of zero. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN64BCT241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS046C - FEBRUARY 1990 - REVISED JULY 1998 recommended operating conditions (see Note 3) MIN VCC VIH VIL IIK IOH IOL Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current 4.5 2 0.8 -18 - 15 64 NOM 5 MAX 5.5 UNIT V V V mA mA mA TA Operating free-air temperature - 40 85 C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL IOZH IOZL IOZ II IIH IIL IOS ICCL ICCH ICCZ Ci 1OE or 2OE Any A input 1OE at 0.8 V, , 2OE at 2 V VCC = 4.5 V, VCC = 4 5 V 4.5 VCC = 4.75 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0 to 2.3 V (power up) VCC = 1.8 V to 0 (power down) VCC = 5.5 V, VCC = 5.5 V, VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5 V, VCC = 5 V, TEST CONDITIONS II = -18 mA IOH = - 3 mA IOH = - 15 mA IOH = - 3 mA IOH = 64 mA VO = 2.7 V VO = 0.5 V VO = 2 7 V or 0 5 V 2.7 0.5 V, VI = 7 V VI = 2.7 V VI = 0 5 V 0.5 VO = 0 Output open Output open Output open VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V - 100 23 53 4 6 11 MIN 2.4 2 2.7 0.42 0.55 50 - 50 V A A A mA A mA mA mA mA mA pF pF TYP 3.3 3.1 V MAX -1.2 UNIT V "50 "50 0.1 20 -1 - 1.6 - 225 43 85 10 Co All typical values are at VCC = 5 V, TA = 25C. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN64BCT241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS046C - FEBRUARY 1990 - REVISED JULY 1998 switching characteristics (see Figure 1) VCC = 5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = 25C MIN tPLH tPHL tPZH tPZL tPHZ tPLZ A Y Y Y 0.5 1 1 1 1 1 MAX 4.5 5.4 7.8 8.6 6.8 8.1 VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 TA = - 40C to 85C MIN 0.5 1 1 1 1 1 MAX 5.2 6.3 9.1 10 8.4 11 TA = 0C to 70C MIN 0.5 1 1 1 1 1 MAX 4.9 5.9 8.7 9.4 8.1 9.9 ns ns ns PARAMETER FROM (INPUT) TO (OUTPUT) UNIT 1OE or 2OE 1OE or 2OE 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN64BCT241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS046C - FEBRUARY 1990 - REVISED JULY 1998 PARAMETER MEASUREMENT INFORMATION 7 V (tPZL, tPLZ, O.C.) Open (all others) S1 From Output Under Test CL (see Note A) R1 Test Point R1 From Output Under Test CL (see Note A) R2 Test Point LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR 3-STATE AND OPEN-COLLECTOR OUTPUTS High-Level Pulse (see Note B) 3V 1.5 V tw 0V tsu Data Input (see Note B) 1.5 V th 3V 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION Low-Level Pulse 1.5 V 1.5 V 0V 3V 1.5 V 0V Timing Input (see Note B) 3V 1.5 V 3V Input (see Note B) tPLH In-Phase Output (see Note D) tPHL Out-of-Phase Output (see Note D) 1.5 V 3V 1.5 V 1.5 V 0V tPHL VOH 1.5 V 1.5 V VOL tPLH VOH 1.5 V VOL Waveform 2 (see Notes C and D) Waveform 1 (see Notes C and D) Output Control (low-level enable) tPZL 1.5 V 1.5 V 1.5 V 0V tPLZ 3.5 V VOL tPHZ tPZH VOH 1.5 V 0.3 V 0V 0.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (see Note D) VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, tr = tf 2.5 ns, duty cycle = 50%. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. E. When measuring propagation delay times of 3-state outputs, switch S1 is open. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof. Copyright (c) 1998, Texas Instruments Incorporated |
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