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MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO Description The MK3720D is a drop-in replacement for the MK3720S and MK3720A devices. Compared to these earlier devices the MK3720D offers a wider operating frequency range and improved power supply noise rejection. The MK3720 is a low-cost, low-jitter, high-performance 3.3 Volt VCXO designed to replace expensive 13.5, 27, or 54 MHz VCXOs. The patented on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3 V input voltage to cause the output clocks to vary by 100 ppm. Using ICS' patented VCXO and analog/digital Phase-Locked Loop (PLL) techniques, the device uses an inexpensive external pullable crystal input to produce output clocks of 13.5 MHz, 27 MHz, and 54 MHz. The MK3720D exhibits a moderate VCXO gain of 120 ppm/V typical, when used with a high-quality external pullable quartz crystal. The frequency of the on-chip VCXO is adjusted by an external control voltage input into pin VIN. Because VIN is a high impedance input, it can be driven directly from an PWM RC integrator circuit. Features * MK3720D is a drop-in upgrade to the earlier MK3720S and MK3720A devices * * * * * * Packaged in 8-pin SOIC Available in Pb (lead) free package Operating voltage of 3.3 V (5%) Output clocks of 54, 27, and 13.5 MHz Uses an inexpensive 13.500 MHz external crystal On-chip VCXO (patented) with pull range of 200 ppm (minimum) * VCXO tuning voltage of 0 to 3.3 V * 12 mA output drive capability at TTL levels * Advanced, low-power, sub-micron CMOS process MK3720D is Recommended for New Designs Block Diagram VDD V IN 54 M H z 1 3 .5 M H z P u lla b le C ry s ta l X1 V o lta g e C o n tro lle d C ry sta l O s cilla to r P L L /C lo c k S y n th e s is C irc u itry 27 M Hz 1 3 .5 M H z X2 GND MDS 3720 I I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 061705 te l (40 8) 2 97-12 01 w w w. i c st . c o m MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO Pin Assignment X1 V DD VI N GND 1 2 3 4 8 7 6 5 X2 27M 13.5M 54M 8 - Pi n ( 1 5 0 mi l ) SOI C Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name XI VDD VIN GND 54M 13.5 27 X2 Pin Type Input Power Input Power Pin Description Crystal connection. Connect to the external pullable crystal. Connect to +3.3 V (0.01uf decoupling capacitor recommended). Voltage input to VCXO. Zero to 3.3 V analog input which controls the oscillation frequency of the VCXO. Connect to ground. Output 54 MHz VCXO clock output. Output 13.5 MHz VCXO clock output. Output 27 MHz VCXO clock output. Input Crystal connection. Connect to the external pullable crystal. MDS 3720 I In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 061705 tel (4 08) 297-1 201 w w w. i c s t . c o m MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO External Component Selection The MK3720 requires a minimum number of external components for proper operation. should be no signal traces underneath or close to the crystal. Crystal Tuning Load Capacitors The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. The procedure for determining the value of these capacitors can be found in application note MAN05. Decoupling Capacitor A decoupling capacitor of 0.01F must be connected between VDD (pin 2) and GND (pin 4), as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB trace between the clock output (CLK, pin 5) and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Quartz Crystal The MK3720 VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device with the recommended parameters (shown below) must be used, and the layout guidelines discussed in the following section shown must be followed. The frequency of oscillation of a quartz crystal is determined by its "cut" and by the load capacitors connected to it. The MK3720 incorporates on-chip variable load capacitors that "pull" (change) the frequency of the crystal. The crystal specified for use with the MK3720 is designed to have zero frequency error when the total of on-chip + stray capacitance is 14 pF. Recommended Crystal Parameters: See application note MAN05 for crystal information. MAN05 is available on the internet at www.icst.com/pdf/man05.pdf. The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the MK3720. There should be no via's between the crystal pins and the X1 and X2 device pins. There MDS 3720 I In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 061705 tel (4 08) 297-1 201 w w w. i c s t . c o m MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK3720. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Reference crystal parameters Min. 0 +3.15 Typ. Max. +70 +3.45 Units C V Refer to page 3 Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 150 140 120 40 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 3720 I In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 061705 tel (4 08) 297-1 201 w w w. i c s t . c o m MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Short Circuit Current VIN, VCXO Control Voltage Symbol VDD VOH VOL VOH IDD IOS VIA Conditions IOH = -12 mA IOL = 12 mA IOH = -4 mA No load Min. 3.15 2.4 Typ. Max. 3.45 0.4 Units V V V V VDD-0.4 13 50 0 3.3 mA mA V AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise Parameter Crystal Pullability VCXO Gain Output Rise Time Output Fall Time Output Clock Duty Cycle Maximum Output Jitter, short term Symbol FP tOR tOF tD tJ Conditions 0V< VIN < 3.3V, Note 1 VIN = VDD/2 +1 V, Note 1 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Measured at 1.4 V, CL=15 pF CL=15 pF, 13.5M CLK CL=15 pF, 27M and 54M CLK Min. + 115 Typ. 120 Max. Units ppm ppm/V 1.5 1.5 ns ns % ps ps 45 50 80 150 55 Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3. Note 2: Original MK3720S and MK3720A provided +100 ppm crystal pullability. Note 3: Original MK3720S and MK3720A provided 100 and 170 ppm/V respectively. MDS 3720 I In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 061705 tel (4 08) 297-1 201 w w w. i c s t . c o m MK3720 27 MHZ AND 54 MHZ 3.3 VOLT VCXO Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Min Max Inches Min Max Symbol Index Area EH Pin 1 D h x 45 0 A A1 B C D E e H h L a 1.35 1.75 1.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 Basic 5.80 6.20 0.25 0.50 0.40 1.27 0 8 0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 .1890 .1968 0.1497 0.1574 0.050 Basic 0.2284 0.2440 0.010 0.020 0.016 0.050 0 8 A Q e b c Ordering Information Part / Order Number (Note 1) MK3720D MK3720DTR MK3720DLF MK3720DLFTR Marking MK3720D MK3720D MK3720DL MK3720DL Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C Note 1: MK3720D is recommended for new designs. Call factory for information on MK3720A and MK3720S. Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 3720 I In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 061705 tel (4 08) 297-1 201 w w w. i c s t . c o m |
Price & Availability of MK3720
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