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TMP87CM39/P39/S39
CMOS 8-Bit Microcontroller
TMP87CM39N/F, TMP87CP39N/F, TMP87CS39N/F
The TMP87CM39/P39/S39 are the high-speed and high-performance 8-bit single chip microcomputers. These MCU contain CPU core, ROM, RAM, input/output ports, six multi-function timer/counters, serial bus interface, on-screen display, PWM outputs, 8-bit A/D converter, remote control signal preprocessor, and two clock generators on a chip. Part No.
TMP87CM39N/F TMP87CP39N/F TMP87CS39N/F
ROM
32 Kbytes 48 Kbytes 60 Kbytes
RAM
1 Kbytes 2 Kbytes
Package
P-SDIP64-750-1.78 P-QFP64-1420-1.00A
OTP
TMP87PS39N TMP87PS39F
Features
8-bit single chip microcomputer TLCS-870 Series Instruction execution time: 0.5 s (at 8 MHz), 122 s (at 32.768 kHz) 412 basic instructions Multiplication and Division (8 bits 8 bits, 16 bits 8 bits) Bit manipulations (Set/Clear/Complement/Move/Test/Exclusive or) 16-bit data operations 1-byte jump/subroutine-call (Short relative jump/Vector call) 15 interrupt sources (External: 6, Internal: 9) All sources have independent latches each, and nested interrupt control is available. 4 edge-selectable external interrupts with noise reject High-speed task switching by register bank changeover Program Corrective Function 8 Input/Output ports (55 pins) High current output: 4 pins (typ. 20 mA) Two 16-bit Timer/Counters Timer, Event counter, Programmable pulse generator output, Pulse width measurement, External trigger timer, Window modes 030519EBP1
The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunctionor failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. The products described in this document are subject to the foreign exchange and foreign trade laws. TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and Reliability Assurance/Handling Precautions.
Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
87CM39-1
2003-06-03
TMP87CM39/P39/S39
Two 8-bit Timer/Counters Timer, Event counter, Capture (Pulse width/duty measurement) modes Time Base Timer (Interrupt frequency: 1 Hz to 16 kHz) Divider output function (frequency: 1 kHz to 8 kHz) Watchdog Timer Interrupt source/reset output (programmable) Serial Bus Interface I2C-bus, 8-bit SIO modes Selectable two I/O channels On-screen display circuit Character patterns: 256 characters Characters displayed: 24 columns Composition: 14 18 dots 12 lines
Size of character: 3 kinds (line by line) Color of character: 8 kinds (character by character) Variable display position: Horizontal 128 steps, Vertical 256 steps Fringing, Smoothing function DA conversion (Pulse Width Modulation) outputs 14-bit resolution (1 channel) 7-bit resolution (9 channels) 8-bit successive approximate type AD converter with sample and hold 8 analog inputs Conversion time: 23 s at 8 MHz Remote control signal preprocessor Jitter Elimination Dual clock operation Single/Dual-clock mode (option) Five Power saving operating modes STOP mode: Oscillation stops. Battery/Capacitor back-up. Port output hold/high-impedance. SLOW mode: Low power consumption operation using low-frequency clock (32.768 kHz). IDLE1 mode: CPU stops, and Peripherals operate using high-frequency clock. Release by interrupts. IDLE2 mode: CPU stops, and Peripherals operate using high and low frequency clock. Release by interrupts. SLEEP mode: CPU stops, and Peripherals operate using low-frequency clock. Release by interrupts. Wide operating voltage: 2.7 to 5.5 V at 32.768 kHz, 4.5 to 5.5 V at 8 MHz Emulation Pod: BM87CS39N0A
87CM39-2
2003-06-03
TMP87CM39/P39/S39
Pin Assignments (Top View)
TMP87CM39F TMP87CP39F TMP87CS39F TMP87PS39F
P-SDIP64-750-1.78
P-SDIP64-750-1.78 VSS P06 P07 ( INT0 ) P10 (INT1) P11 (INT2/TC1) P12 ( DVO ) P13 ( PPG ) P14 (TC2) P15 P16 P17 ( PWM0 ) P40 ( PWM1 ) P41 ( PWM2 ) P42 ( PWM3 ) P43 ( PWM4 ) P44 ( PWM5 ) P45 ( PWM6 ) P46 ( PWM7 ) P47 ( PWM8 ) P50 ( PWM9 ) P51 (AIN0) P52 (AIN1) P53 (AIN2) P54 (AIN3) P55 (AIN4) P56 (AIN5) P57 (AIN6) P60 (AIN7) P61 (CSOUT)P62 P63 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VDD P05 P04 P03 P02 P01 P00 P36 ( SCK ) P35 (SDA/SO) P34 (SCL/SI) P33 (TC4) P32 (INT4) P31 (TC3) P30 (INT3/RXIN) P22 (XTOUT) P21 (XTIN) P20 ( INT5 / STOP ) XOUT XIN TEST OSC2 OSC1 P74 ( SCK1 ) P73 (SDA1/SO1) P72 (SCL1/SI1) P71 ( VD ) P70 ( HD ) P67 (Y/BL) P66 (B) P65 (G) P64 (R)
RESET
TMP87CM39N TMP87CP39N TMP87CS39N TMP87PS39N
(DVO) P13 (PPG) P14 (TC2) P15 P16 P17 (PWM0) P40 (PWM1) P41 (PWM2) P42 (PWM3) P43 (PWM4) P44 (PWM5) P45 (PWM6) P46 (PWM7) P47 (PWM8) P50 (PWM9) P51 (AIN0) P52 (AIN1) P53 (AIN2) P54 (AIN3) P55
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
P00 P01 P02 P03 P04 P05 VDD VSS P06 P07 ( INT0 ) P10 (INT1) P11 (INT2/TC1) P12
52 53 54 55 56 57 58 59 60 61 62 63 64
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
P36 (SCK) P35 (SDA/SO) P34 (SCL/SI) P33 (TC4) P32 (INT4) P31 (TC3) P30 (INT3/RXIN) P22 (XTOUT) P21 (XTIN) P20 (INT5/STOP) RESET XOUT XIN TEST OSC2 OSC1 P74 (CSK1) P73 (SDA1/SO1) P72 (SCL1/SI1) 32 31 30 29 28 27 26 25 24 23 22 21 20
P-QFP64-1420-1.00A
P-QFP64-1420-1.00A
P71 ( VD ) P70 ( HD ) P67 (Y/BL) P66 (B) P65 (G) P64 (R) VSS P63 P62 P61 (AIN7) P60 (AIN6) P57 (AIN5) P56 (AIN4)
87CM39-3
2003-06-03
TMP87CM39/P39/S39
Block Diagram
P07 to P00 P67 P74 to to P64 P70
Osc. connecting pins for on-screen display OSC1 OSC2
P0
Display memory
Character ROM
elimination selecter Y/BL B, G, R VD , HD
Jitter
Polality
P6
P7
On-screen display circuit
Power supply
VDD VSS
ALU
PSW Flags RBS
Stack pointer
Data memory (RAM) Register banks
ROM correction circuit
Program counter
Reset I/O RESET Test pin TEST Resonator connecting pins XIN XOUT
System controller Standby controller Timing generator High frequency Clock Low generator frequency Time base timer Watchdog timer
Interrupt controller
Program memory (ROM)
16-bit timer/counter TC1 TC2
8-bit timer/counter TC3 TC4
Inst. register Inst. decoder
P2 P4
DA P5 8-bit AD P6 converter converter (PWM)
Video signal output
P1
P3
Remote control signal preprocessor
Serial bus interface-ver.A CH0 CH1
P20 P47 to to P22 P40
P57 to P50
P63 to P60
P17 to P10
P36 to P30
87CM39-4
2003-06-03
TMP87CM39/P39/S39
Pin Function
Pin Name
P07 to P00 P17, P16 P15 (TC2) P14 ( PPG ) P13 ( DVO ) P12 (INT2/TC1) P11 (INT1) P10 ( INT0 ) P22 (XTOUT) P21 (XTIN) I/O (Input) P20 ( INT5 / STOP ) P36 ( SCK0 ) P35 (SDA0/SO0) P34 (SCL0/SI0) P33 (TC4) P32 (INT4) P31 (TC3) P30 (INT3/RXIN) P47 ( PWM7 ) to P41 ( PWM1 ) I/O (Output) P40 ( PWM0 ) P57 (AIN5) to P52 (AIN0) P51 ( PWM9 ) I/O (Output) P50 ( PWM8 ) P67 (Y/BL) P66 (B) P65 (G) P64 (R) P63 P62 (CSOUT) P61 (AIN7) P60 (AIN6) I/O I/O (Input) I/O (Output) I/O (Input) I/O (I/O) I/O (I/O/Output) 7-bit input/output port with latch. When used as an input port, a serial bus I/O (I/O/Input) interface input/output, a timer/counter input, a remote control signal preprocessor input, or an external I/O (Input) interrupt input, the latch must be set to "1". I/O (Input/Input) 8-bit programable input/output port (tri-state). Each bit of this port can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. When used as a PWM output, the latch must be set to "1". 8-bit programable input/output port (tri-state). Each bit of this port can be individually configured as an input or an output under software control. When used as an input port, analog input, or a PWM output, the latch must be set to "1". I/O (Output) 3-bit input/output port with latch. When used as an input port, the latch must be set to "1". I/O (Input)
Input/Output
I/O I/O I/O (Input) I/O (Output) Two 8-bit programmable input/output ports (tri-state). Each bit of these ports can be individually configured as an input or an output under software control. During reset, all bits are configured as inputs. When used as a divider output or a PPG output, the latch must be set to "1".
Function
Timer/Counter 2 input Programmable pulse generator output Divider output External interrupt input 2 or Timer/Counter 1 input External interrupt input 1 External interrupt input 0 Resonator connecting pins (32.768 kHz). For inputting external clock, XTIN is used and XTOUT is opened. External interrupt input 5 or STOP mode release signal input SIO serial clock input/output 0 I2Cbus serial data input/output or SIO serial data output 0 I2Cbus serial clock input/output or SIO serial data input 0 Timer/Counter 4 input External interrupt input 4 Timer/Counter 3 input External interrupt input 3 or remote control signal preprocessor input 7-bit DA conversion (PWM) outputs
14-bit DA conversion (PWM) output AD converter analog inputs
7-bit DA conversion (PWM) outputs
Focus signal output or Background blanking control 8-bit programable input/output port (P67 signal output to P64: tri-state, P63 to P60: High current output). Each bit of this port can be individually configured as an input or an RGB outputs output under software control. During reset, all bits are configured as inputs. When used as the R, G, B, Y/BL outputs Test video signal output of on-screen display circuit, each bit of the High current outputs P6 port data selection register (bits 7 to 4 AD converter analog inputs in address 0F91H) must be set to "1".
87CM39-5
2003-06-03
TMP87CM39/P39/S39
Pin Name
P74 ( SCK1 ) P73 (SDA1/SO1) P72 (SCL1/SI1) P71 ( VD ) P70 ( HD ) OSC1, OSC2 XIN, XOUT
RESET
Input/Output
I/O (I/O) I/O (I/O/Output) 5-bit input/output port with latch. When used as an input port, a serial bus interface input/output, or a vertical I/O (I/O/Input) synchronous signal input and horizontal synchronous signal input, the latch must be set to "1". I/O (Input)
Function
SIO serial clock input/output 1 I2Cbus serial data input/output or SIO serial data output 1 I2Cbus serial data input/output or SIO serial data input 1 Vertical synchronous signal input Horizontal synchronous signal input
Input, Output I/O Input Power supply
Resonator connecting pins for on-screen display circuitry. Resonator connecting pins. For inputting external clock, XIN is used and XOUT is opened. Reset signal input or watchdog timer output/address-trap- reset output/system-clock-reset output. Test pin for out-going test. Be tied to low. 5 V, 0 V (GND)
TEST VDD, VSS
87CM39-6
2003-06-03
TMP87CM39/P39/S39
Operational Description 1. CPU Core Functions
The CPU core consists of a CPU, a system clock controller, an interrupt controller, and a watchdog timer. This section provides a description of the CPU core, the program memory (ROM), the data memory (RAM), and the reset circuit.
1.1
Memory Address Map
The TLCS-870 Series is capable of addressing 64 Kbytes of memory. Figure 1.1.1 shows the memory address maps of the TMP87CM39/P39/S39. In the TLCS-870 Series, the memory is organized 4 address spaces (ROM, RAM, SFR, and DBR). It uses a memory mapped I/O system, and all I/O registers are mapped in the SFR/DBR address spaces. There are 16 banks of general-purpose registers. The register banks are also assigned to the first 128 bytes of the RAM address space.
SFR
0000H 003FH 0040H 64 bytes
SFR
0000H 003FH 0040H 64 bytes Register banks (8 registers 16 banks)
128 bytes RAM 00BFH 00C0H 1920 bytes 083FH 0F80H DBR 0FFFH 1100H (4000H) 8000H ROM
(See Figure 1.1.2)
128 bytes RAM 00BFH 00C0H 043FH
896 bytes ROM: Read Only Memory includes: Program memory RAM: Random Access Memory includes: Data memory Stack General-purpose register banks SFR: Special Function Register includes: I/O ports Peripheral control registers Peripheral status registers System control registers Interrupt control registers Program status word DBR: Data Buffer Register includes: On-Screen-Display (OSD) control registers Remote-control signal preprocessor control/status registers
0F80H 128 bytes DBR 0FFFH 128 bytes
ROM
(See Figure 1.1.2)
FFFFH TMP87CS39/87CP39
FFFFH TMP87CM39
Figure 1.1.1 Memory Address Map
1100H 4000H 60928 bytes FF00H 192 bytes FFBFH FFC0H FFDFH FFE0H FFFFH 32 bytes 32 bytes TMP87CS39 192 bytes 32 bytes 32 bytes TMP87CP39 48896 bytes 8000H 32512 bytes 192 bytes 32 bytes 32 bytes TMP87CM39
Vector table for vector call instructions (16 vectors) Vector table for interrupts/reset (16 vectors)
Entry area for page call instructions
Figure 1.1.2 ROM Address Maps
87CM39-7
2003-06-03
TMP87CM39/P39/S39
Electrical Characteristics
Absolute Maximum Ratings Parameter
Supply voltage Input voltage Output voltage Output current (Per 1 pin) (VSS 0 V)
Symbol
VDD VIN VOUT1 IOUT1 IOUT2
Pins
Rating
0.3 to 6.5 0.3 to VDD 0.3 to VDD 0.3 0.3
Unit
V
Ports P0, P1, P2, P3, P4, P5, P64 to P67, P7 Ports P60 to P63 Ports P0, P1, P2, P3, P4, P5, P64 to P67, P7 Ports P60 to P63
3.2 30 120 120 600 260 (10 s) 55 to 125 30 to 70 C mW mA
Output current (Total) Power dissipation [Topr Storage temperature Operating temperature 70 C]
IOUT1 IOUT2 PD Tsld Tstg Topr
Soldering temperature (time)
Note:
The absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. Any one of the ratings must not be exceeded. If any absolute maximum rating is exceeded, a device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. Thus, when designing products which include this device, ensure that no absolute maximum rating value will ever be exceeded.
(VSS 0 V, Topr 30 to 70 C)
Recommended Operating Conditions
Parameter
Symbol
Pins
fc
Conditions
8 MHz NORMAL1, 2 mode IDLE1, 2 mode fs 32.768 SLOW mode kHz SLEEP mode STOP mode
Min
4.5
Max
Unit
Supply voltage
VDD
5.5 2.7 2.0 VDD VDD VDD 0 4.0 4.0 2.0 30.0 0.70 0.75 0.90 VDD VDD VDD 0.30 0.25 0.01 VDD V
VIH1 Input high voltage VIH2 VIH3 VIL1 Input low voltage VIL2 VIH3 fc Clock frequency fOSC fs
Except hysteresis input Hysteresis input Except hysteresis input Hysteresis input XIN, XOUT OSC1, OSC2
VDD
4.5 V
VDD < 4.5 V VDD 4.5 V
VDD < 4.5 V VDD 4.5 to 5.5 V
Normal frequency mode (FORS 0, VDD 4.5 to 5.5 V) Double frequency mode (FORS 1, VDD 4.5 to 5.5 V)
8.0 fOSC fc 1.2 8.0 fOSC fc 0.6 4.0 34.0 kHz MHz
XTIN, XTOUT
Note 1: The recommended operating conditions for a device are operating conditions under which it can be guaranteed that the device will operate as specified. If the device is used under operating conditions other than the recommended operating conditions (supply voltage, operating temperature range, specified AC/DC values etc.), malfunction may occur. Thus, when designing products which include this device, ensure that the recommended operating conditions for the device are always adhered to. Note 2: Clock frequency fc; The condition of supply voltage range is the value in NORMAL 1/2 mode and IDLE 1/2 mode. Note 3: When using test video signal circuit, high frequency must be 8 MHz. Note 4: When the OSD circuit is used, the supply voltage must be from 4.5 V to 5.5 V.
87CM39-162
2003-06-03
TMP87CM39/P39/S39
DC Characteristics Parameter
Hysteresis voltage
(VSS
0 V, Topr
30 to 70 C)
Symbol
VHS IIN1 IIN2 IIN3 IIN4 RIN2 ILO1 ILO2 VOH2 VOL IOL3 TEST
Pins
Hysteresis inputs VDD VDD VDD VDD VDD VDD VDD
Conditions
5.5 V, VIN 5.5 V, VIN 5.5 V, VIN 5.5 V, VIN 5.5 V, VOUT 5.5 V, VOUT 4.5 V, IOH 4.5 V, IOL 4.5 V, VOL 5.5 V/0 V 5.5 V/0 V 5.5 V/0 V 5.5 V/0 V
Min
Typ.
0.9
Max
2 2 2 2
Unit
V
Input current
Open drain ports Tri-state ports
RESET , STOP RESET
A
Input resistance Output leakage current Output high voltage Output low voltage Output low current Supply current in NORMAL 1, 2 modes Supply current in IDLE 1, 2 modes Supply current in SLOW mode Supply current in SLEEP mode Supply current in STOP mode
100 5.5 V 5.5 V/0 V 0.7 mA 1.6 mA 1.0 V 4.1
220
450 2 2
k A
Sink open drain ports Tri-state ports Tri-state ports
Except XOUT, OSC2 VDD and ports P63 to P60 Ports P63 to P60 VDD
0.4 20 13 6.5 30 15 0.5 20 10 70 35 10
V
VDD 5.5 V fc 8 MHz fs 32.768 kHz VIN 5.3 V/0.2 V IDD VDD 3.0 V fs 32.768 kHz VIN 2.8 V/0.2 V VDD 5.5 V VIN 5.3 V/0.2 V
mA
A
Note 1: Typical values show those at Topr
25 C, VDD
5 V.
Note 2: Input Current IIN1, IIN4; The current through pull-up or pull-down resistor is not included. Note 3: Supply Current IDD; The current (Typ. 0.5 mA) through ladder resistors of ADC is included in NORMAL mode and IDLE mode. AD Conversion Characteristics Parameter
Analog reference voltage Analog reference voltage range Analog input voltage Nonlinearity error Zero point error Full scale error Total error VDD 4.5 to 5.5 V (VSS 0 V, VDD 4.5 to 5.5 V, Topr 30 to 70 C)
Symbol
VDD VSS VAREF VAIN
Conditions
Supplied from VDD pin Supplied from VSS pin VDD VSS
Min
Typ.
VDD 0 VDD
Max
0
Unit
V VDD 1 2 2 3 LSB
VSS
87CM39-163
2003-06-03
TMP87CM39/P39/S39
AC Characteristics Parameter
Machine cycle time
(VSS
0 V, VDD
4.5 to 5.5 V, Topr
30 to 70 C)
Symbol
tcy
Conditions
In NORMAL1, 2 modes In IDLE1, 2 modes In SLOW mode In SLEEP mode For external clock operation (XIN input), fc 8 MHz For external clock operation (XTIN input), fs 32.768kHz
Min
0.5 117.6 62.5 14.7
Typ.
Max
1.0
Unit
s
133.3 ns s
High-level clock pulse width Low-level clock pulse width Low-level clock pulse width Low-level clock pulse width
tWCH tWCL tWSH tWSL
Recommended Oscillating Conditions
(VSS
0 V, VDD
4.5 to 5.5 V, Topr
30 to 70 C)
Parameter
Oscillator
Recommended Constant Oscillation Recommended Oscillator Frequency C1 C2
8 MHz KYOCERA KYOCERA MURATA KBR8.0M KBR4.0MS CSA4.00MG 20 pF 20 pF 30 pF 30 pF
Ceramic resonator High-frequency oscillation Crystal oscillator OSD Low-frequency oscillation LC resonator Crystal oscillator 4 MHz 8 MHz 4 MHz 8 MHz 7 MHz 32.768 kHz
TOYOCOM 210B 8.0000 TOYOCOM 204B 4.0000 TOKO A285TNIS-11695 TOKO TBEKSES-30375FBY NDK MX-38T
15 pF
15 pF
XIN
XOUT
OSC1
OSC2
XTIN
XTOUT
C1
C2 (2) LC resonator for OSD
C1
C2
(1) High-frequency oscillation
(3) Low-frequency oscillation
Note 1:
On our OSD circuit, the horizontal display start position is determined by counting the clock from LC oscillator. So, the unstable start of oscillation after the rising edge of Horizontal Sync. Signal will be cause the OSD distortion. Generally, smaller C and larger L make clearer wave form at the beginning of oscillation. We recommend that the value of LC oscillator should be equal and bigger than 33 H.
Note 2: Note 3:
To keep reliable operation, shield the device electrically with the metal plate on its package mold surface against the high electric field, for example, be CRT (Cathode Ray Tube). The product numbers and specifications of the resonators by Murata Manufacturing Co., Ltd. are subject to change. For up-to-date information, please refer to the following URL: http://www.murata.co.jp/search/index.html
87CM39-164
2003-06-03

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