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 AN182
Application Note
WRITING CODE FOR ROM
Note:
Cirrus Logic assumes no responsibility for the attached information which is provided "AS IS" without warranty of any kind (expressed or implied).
P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com
Copyright (c) Cirrus Logic, Inc. 2000 (All Rights Reserved)
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TABLE OF CONTENTS
INTRODUCTION ....................................................................................................................... 3 THE STEPS TO BUILD A ROM ............................................................................................... 3 DEBUGGING AN INTERRUPT ................................................................................................ 3 SOFTWARE EXAMPLE #1 ...................................................................................................... 4 SOFTWARE EXAMPLE #2 ...................................................................................................... 5 CONCLUSION .......................................................................................................................... 5 ALTERNATE MEMORY MAP .................................................................................................. 6 LISTING OF LINKER SYMBOL TABLE OUTPUT FOR SOFTWARE EXAMPLE # 1 ............ 7 8.1 Summary of Memory Used ................................................................................................ 8 8.2 Description of Results for Software Example #1 ................................................................ 8 9. LISTING OF LINKER SYMBOL TABLE OUTPUT FOR SOFTWARE EXAMPLE # 2 ............ 9 9.1 Summary of Memory Used .............................................................................................. 10 9.2 Description of Results for Software Example #2 .............................................................. 10 1. 2. 3. 4. 5. 6. 7. 8.
LIST OF TABLES
Table 1. EP72xx/71xx in External Boot Mode Memory Map for Example #1.................................. 4 Table 2. MMU Virtual Address Space ............................................................................................. 5 Table 3. mmu_alt.s Memory Map.................................................................................................... 6 Table 4. Symbol Table for Software Example #1 ............................................................................ 7 Table 5. Software Example #1 Memory Use ................................................................................... 8 Table 6. Characteristics of Example #1........................................................................................... 8 Table 7. Symbol Table for Software Example #2 ............................................................................ 9 Table 8. Software Example #2 Memory Use ................................................................................. 10 Table 9. Characteristics of Example #2......................................................................................... 10
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Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic web site or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
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1. INTRODUCTION
This application note will cover the steps required to build a binary image that can be loaded into FLASH memory for stand-alone, self-running applications. There are two examples provided. Each example includes the initialization code and a main C routine that also contains an interrupt service routine that was also written in C. The linker output is listed to illustrate how memory is allocated for these examples. Both examples use the internal SRAM for stack and data storage. The DRAM's are not used. This application note assumes you are using the ARM(R) Tools, Version 2.5x. The concepts presented should be valid for other software development environments with some minor modifications. This application note should also include the project and source files for the examples. -nozeropad <$projectname>.axf -bin <$projectname>.rom. This action invokes the fromelf program which converts the ARM ELF file to a true binary file. This also creates a file with the .ROM extension which is the file that is programmed into flash. 6) Download the .ROM binary image to the system using the DOWNLOAD.EXE program. It is a good idea to carefully look at the settings in the project files that are referenced in this Application Note to fully comprehend the procedure. When the examples are compiled and downloaded correctly, the heartbeat LED will flash once a second for five times then enter the standby state. Pressing the WAKEUP button starts the processor and flashes the LED five more times, and then goes to standby. This continues forever.
2. THE STEPS TO BUILD A ROM
Follow these steps to build a ROM: 1) Determine your memory layout. 2) Write the C code 3) Link with an initialization program (such as init.s) that a) Sets up the processor mode b) Defines the stack area c) Performs some hardware initialization d) Loads the MMU tables and enable the MMU (if necessary) e) Defines entry points for your interrupt service routine and main C entry point 4) Set the Read-Only value to 0x0000 in the Linker. Set the Read-Write area to the first RAM location. 5) Edit the Project Template (EditProject Template) and double-click on Link. Add the following in the Command Line window:
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3. DEBUGGING AN INTERRUPT
Debugging an interrupt is a bit tricky. In both the ARMulator and in Angel, an interrupt can be simulated by doing the following in the debugger: 1) Enable Interleaving View in the Execution Window (this displays the actual assembly code) and addresses. Use Ctrl-I or OptionsToggle Interleaving. 2) In the register window, change psr to %xxxxxxx_IRQ32 (don't change the current settings of xxxxxxxx). 3) Change spur to%xxxxxx_SVC32 (otherwise, won't return in Supervisor Mode). 4) Set r14 (the link register) to current value +4 5) Set PC to 0x18 (the IRQ vector) Now you can single step through the handler and upon exiting, the original state will be restored.
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4. SOFTWARE EXAMPLE #1
This first software example does not use the MMU. This results in a program with a very small footprint (<1 kByte). Adding an MMU does improve performance but adds an additional 16 K or more of program space to hold the Translation Tables. Without invoking the MMU, the memory map of a 72xx embedded controller in External Boot Mode is shown in Table 1. The project file for this example is called ROMCode.apj. This project file has two variants: Debug and ROM. The debug variant allows you to simulate the code in the ARMulator. The ROM variant builds the ROM image. The C code
Address 0xF000.0000 0xE000.0000 0xD000.0000 0xC800.0000 0xC000.0000 0x8000.4000 0x8000.0000 0x7000.0000 0x6000.0000 0x5000.0000 0x4000.0000 0x3000.0000 0x2000.0000 0x1000:0000 0x0000:0000 Reserved Reserved DRAM Bank 1 16MB DRAM, Bank 0 16MB DRAM, Bank 0 Unused Internal Registers Boot ROM (nCS7) On-chip SRAM (nCS6) Expansion--Evaluation Board Peripherals (nCS5) Expansion--Evaluation Board Peripherals (nCS4) Expansion--Evaluation Board Peripherals (nCS3) Expansion--Evaluation Board Peripherals (nCS2) NAND Flash ROM Bank 1 (nCS1) NAND Flash ROM Bank 0 (nCS0) Contents
example is called C_ROM.C. This routine defines some "do-nothing" memory, checks that the RAM memory allocated in an array is valid, enables a timer interrupt, then loops forever. The interrupt handler routine simply toggles the state of the heartbeat LED each time the interrupt is called. The program init.s is an assembly routine that sets up the processor mode, defines the stack area, sets the ZI (zero initialized RAM area) to zero, and defines the calling procedure for the interrupt service C routine and the main C routine. The Linker symbol output is shown in Listing 1. Comments are placed along side the output to clarify the meanings.
Size 256 Mbytes 256 Mbytes 256 Mbytes 256 Mbytes ~ 1 Gbyte 16K bytes 128 bytes 38,400 (0x9600) bytes 4 x 64 Mbytes 4 x 64 Mbytes 256 Mbytes 256 Mbytes 256 Mbytes 256 Mbytes
Table 1. EP72xx/71xx in External Boot Mode Memory Map for Example #1
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5. SOFTWARE EXAMPLE #2
This next software example is identical to the previous example except that the MMU is enabled. This requires that the source listing, mmu.s, be included in the project file. It also requires that the compiler flag "MMU_enabled" be defined. This is accomplished in the project options rather than in the source code. This allows one set of C and assembly source to be maintained. The project file for this example is called ROM_CMMU.APJ. The file that defines the memory configuration is called "mmu.s." It will define a memory map as shown in Table 2. Note that only 1 Mb is defined. This is about as small a configuration possible. Only one Level 1 item is needed. But since Level 1 data must be aligned on a 14-bit address, this sets the minimum size of the ROM image to 16K plus the size of the Level I table (1 word, or 4 bytes, in this example). The Level II tables resided on a 10-bit aligned (4 K) boundary. So there exists substantial "empty" space in the ROM image. With careful design, these unused regions could contain constant data or code. The MMU defines the virtual address space as described in Table 2. The Linker output with explanations is shown in Section 7.
6. CONCLUSION
This application note explains how one might design and build code that can be placed into ROM (or FLASH). Two examples were used. The first generated code that was 440 bytes in length but does not take advantage of the MMU. The second example is the same code but with the MMU enabled and a minimal virtual memory configuration was established. The size of the code in this case, is larger (16,412 bytes). This is due to the restrictions on where the Level I Translation Program resides. It is generally recommended that the MMU be enabled as this also enables the cache that maximizes performance in more demanding applications, such as MP3 decoding.
Address Range 0x0002C000 - 0x0002FFFF 0x0002B000 - 0x0002BFFF 0x0002A000 - 0x0002AFFF 0x00020000 - 0x00029FFF 0x00000000 - 0x0001FFFF
Function EP7209 internal registers Parallel port interface (nCS1) NAND FLASH interface (nCS1) 40K of internal SRAM (only 37.5K exists) 128K of program ROM (nCS0)
Table 2. MMU Virtual Address Space
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7. ALTERNATE MEMORY MAP
The file mmu_alt.s offers an alternative memory map that does not use a Level 2 translation table. This avoids the code at 0x0400 which lies between the code and the Level 1 table at 0x4000. In most embedded cases where an operating system such as Linux or Windows(R) CE is not required, you don't need to worry about Level 2 at all. Using mmu_alt.s, the memory map in Table 3 is defined:
Address Range 0x0050.0000 0x0040.0000 0x0030.0000 0x0020.0000 0x0010.0000 0x0000.0000 0xFFFF.FFFF 0x004F.FFFF 0x003F.FFFF 0x002F.FFFF 0x001F.FFF 0x000F.FFFF
Note how compact this memory model is. The size of the Translation table is relatively small since there are few entries to define the first 5 Mb of memory (five Level 1 entries for a total of 20 bytes). As an exercise, try using this with the example program. Just make certain you change the code to reflect the different memory addresses.
Purpose Undefined. Accesses generate Data Abort USB interface (nCS4) NAND FLASH interface (nCS1) EP7209 internal registers 1Mb Internal SRAM (only 38.4K exists) 1Mb of program ROM (nCS0)
Table 3. mmu_alt.s Memory Map
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8. LISTING OF LINKER SYMBOL TABLE OUTPUT FOR SOFTWARE EXAMPLE # 1
The following information is a formatted version of the output produced by Software Example #1. The symbol table for Software Example #1 is shown in Table 4.
Linker Output C$$code$$Base C$$code$$Limit CStack$$zidata$$Base CStack$$zidata$$Limit C$$code InterruptHandler Image$$RO$$Limit Image$$RW$$Base Image$$ZI$$Base Image$$RW$$Limit C_entry CStack$$zidata C$$constdata$$Base C$$constdata$$Limit C$$data$$Base C$$data$$Limit C$$zidata$$Base C$$zidata$$Limit hex Units 000000 000224 60000108 60000608 000000 0000ec 000238 60000000 60000008 60000608 000148 60000108 000224 000138 60000000 60000008 60000008 60000108 000224 Explanation This is the starting location. Defined in Linker Read-Only Size of the C program. Beginning of zero-initialized RAM. Includes area for stack. Top of Stack Defined in init.s Location of InterruptHandler C routine Total size of ROM image Start of RAM. Defined in Linker Read-Write Start of zero-initialized RAM (heap) End of RAM used. Includes stack Location of main C routine Bottom of stack Start of storage for constant values such as "hex" End of constant storage Start location for C data storage. This is the static int "temp" which is 4 bytes in length End of data. Only "temp" was declared. Start of the heap area used in the example, char array[256] End of heap, 256 bytes. Location where the const hex value is stored. It is stored at the end of the image. Adding 0x14 (20) gives a total of 0x1bc (same as Image$$RO$$Limit) and is the total size of the binary image (444 bytes) Location of the volatile global variable "j" Location for start of array Beginning address of the ROM image Size of RAM used.
j Array Image$$RO$$Base Image$$ZI$$Limit
60000000 60000008 000000 60000608
Table 4. Symbol Table for Software Example #1
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8.1 Summary of Memory Used
A summary of memory used in Software Example #1 is shown in Table 5:
Base 0 ec 224 60000000 60000008 60000108 ec 138 14 8 100 500 Size Type CODE CODE DATA DATA ZERO ZERO Read Only (RO) / Read Write (RW) RO RO RO RW RW RW Name C$$code from object file init.o C$$code from object file C_ROM.o C$$constdata from object file C_ROM.o C$$data from object file C_ROM.o C$$zidata from object file C_ROM.o CStack$$zidata from object file init.o
Table 5. Software Example #1 Memory Use
8.2 Description of Results for Software Example #1
Image entry point: 0 Entry area: "C$$code" from object file init.o
Code Size Object Totals 512 Inline Data 36 Inline Strings 0 "const" data 20 8 RW Data 0-Init Data 1536 Debug Data 0
Table 6. Characteristics of Example #1
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9. LISTING OF LINKER SYMBOL TABLE OUTPUT FOR SOFTWARE EXAMPLE # 2
The following information in this section is a formatted version of the output produced by Software Example #2.
Linker Output Assembly$$PageTable$$Base Assembly$$PageTable$$Limit Assembly$$PageTable Units 004000 000668 000400 Explanation This is the location for the first item in the Level 1 Translation Table Size of Level 1 Table This is the location of the first item in the Level II Translation Table. Start location Size of code Start of ZI data in RAM Upper limit of ZI data in RAM Defined in init.s Location of InterruptHandler C routine Total size of ROM image Start of RAM. Defined in Linker Read-Write Start of zero-initialized RAM (heap) End of RAM used. Includes stack Location of main C routine Bottom of stack Start of storage for constant values such as "hex" End of constant storage. Size is 0x14 or 20. Start location for C data storage. This is the static int "temp" and volatile j, both of which are 4 bytes in length End of data. 8 bytes for two values. Start of the heap area used in the example, char array[256] End of heap, 256 bytes. Location of volatile variable j
C$$code$$Base
000000 000258 020008 020108 000000 000120 004018 020000 020008 020608 00017c 020108 004004 004018 020000
C$$code$$Limit CStack$$zidata$$Base CStack$$zidata$$Limit C$$code InterruptHandler Image$$RO$$Limit Image$$RW$$Base Image$$ZI$$Base Image$$RW$$Limit C_entry CStack$$zidata C$$constdata$$Base C$$constdata$$Limit C$$data$$Base C$$data$$Limit C$$zidata$$Base C$$zidata$$Limit j
020008 020008 020108 020000
Table 7. Symbol Table for Software Example #2
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hex 004004 Location where the const hex value is stored. Note that it appears after the Level I entry. Adding 20 to 0x4004 gives 0x401C (16,412) which is the size of the binary image. Location for start of array Beginning address of the ROM image Size of RAM used.
Array Image$$RO$$Base Image$$ZI$$Limit
020008 000000 020608
Table 7. Symbol Table for Software Example #2 (Continued)
9.1 Summary of Memory Used
A summary of memory used in Software Example #2 is found in Table 8.
Base 0 120 258 400 4c0 4000 4004 20000 20004 20104 120 138 1a8 c0 3b40 4 14 4 100 500 Size Type CODE CODE PAD DATA PAD DATA DATA DATA ZERO ZERO Read Only (RO) / Read Write (RW) RO RO RO RO RO RO RO RW RW RW Name C$$code from object file init.o C$$code from object file C_ROM.o Assembly$$PageTable from object file Mmu.o Assembly$$PageTable from object file Mmu.o Assembly$$PageTable_ from object file Mmu.o Assembly$$PageTable_ from object file Mmu.o C$$constdata from object file C_ROM.o C$$data from object file C_ROM.o C$$zidata from object file C_ROM.o CStack$$zidata from object file init.o
Table 8. Software Example #2 Memory Use
9.2 Description of Results for Software Example #2
The characteristics of Software Example 2 are described in Table 9. Image entry point: 0 Entry area: "C$$code" from object file init.o:
Code Size Object Totals 556 Inline Data 44 Inline Strings 0 "const" data 216 8 RW Data 0-Init Data 1536 Debug Data 0
Table 9. Characteristics of Example #2
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* Notes *


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