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INTEGRATED CIRCUITS
DATA SHEET
74LVC1G384 Bilateral switch
Preliminary specification File under Integrated Circuits, IC24 2003 Aug 07
Philips Semiconductors
Preliminary specification
Bilateral switch
FEATURES * Very low ON resistance 10 (TYP.) at VCC = 2.7 V 8 (TYP.) at VCC = 3.3 V 6 (TYP.) at VCC = 5 V * ESD protection: HBM EIA/JESD22-A114-A Exceeds 2000 V MM EIA/JESD22-A115-A Exceeds 200 V * High noise immunity * CMOS low power consumption * Latch up performance exceeds 250 mA * Direct interface TTL-levels * Multiple package options * Specified from -40 to +125 C. FUNCTION TABLE See note 1. INPUT E L H Note 1. H = HIGH voltage level; L = LOW voltage level. SWITCH ON OFF Notes CS DESCRIPTION
74LVC1G384
The 74LVC1G384 is a high-speed Si-gate CMOS device. The 74LVC1G384 provides an analog switch. The switch has two input/output terminals (Y, Z) and an active LOW enable input (E). When E is HIGH, the analog switch is turned off. QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 C; tr = tf 3.0 ns. SYMBOL tPZH/tPZL tPHZ/tPLZ tPZH/tPZL tPHZ/tPLZ CI CPD PARAMETER CONDITIONS TYPICAL 2.5 3.4 1.9 2.5 2 CL = 50 pF; f = 10 MHz; VCC = 3.3 V; notes 1 and 2 OFF-state ON-state 16 pF UNIT ns ns ns ns pF
turn-on time E to Vos CL = 50 pF; turn-off time E to Vos RL = 500 ; VCC = 3 V turn-on time E to Vos CL = 50 pF; turn-off time E to Vos RL = 500 ; VCC = 5 V input capacitance power dissipation capacitance
switch capacitance
5 9.5
pF pF
1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi + (CL + CS)x VCC2 x fo where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = max. switch capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC.
ORDERING INFORMATION PACKAGES TYPE NUMBER 74LVC1G384GW 74LVC1G384GV TEMPERATURE RANGE -40 to +125 C -40 to +125 C PINS 5 5 PACKAGE SC-88A SC-74A MATERIAL plastic plastic CODE SOT353 SOT753 MARKING ? ?
2003 Aug 07
2
Philips Semiconductors
Preliminary specification
Bilateral switch
PINNING PIN 1 2 3 4 5 SYMBOL Y Z GND E VCC independent input/output independent output/input ground (0 V) enable input (active LOW) DC supply voltage DESCRIPTION
74LVC1G384
Y1 Z2 GND 3 384
5 VCC
Y
4E
Z
E
Fig.1 Pin configuration.
Fig.2 Logic symbol.
1 4#
Z
1 1 X1
2
Y E VCC
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
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Philips Semiconductors
Preliminary specification
Bilateral switch
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VO Tamb tr, tf PARAMETER supply voltage input voltage output voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V active mode VCC = 0 V; Power-down mode CONDITIONS 0 0 0 -40 0 0 MIN. 1.65
74LVC1G384
MAX. 5.5 5.5 VCC 5.5 +125 20 10 V V V V
UNIT
C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL VCC IIK VI IOK VO IO ICC, IGND Tstg PD Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. PARAMETER supply voltage input diode current input voltage output diode current output voltage output diode current VCC or GND current storage temperature power dissipation per package for temperature range from -40 to +125 C VI < 0 note 1 VO > VCC or VO < 0 active mode; notes 1 and 2 VO = 0 to VCC CONDITIONS - -0.5 - -0.5 - - -65 - MIN. -0.5 MAX. +6.5 -50 +6.5 50 +6.5 50 100 +150 250 V mA V mA V mA mA C mW UNIT
VCC + 0.5 V
Power-down mode; notes 1 and 2 -0.5
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Philips Semiconductors
Preliminary specification
Bilateral switch
DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER VIH HIGH-level input voltage VCC (V) Tamb (C) -40 to +85 MIN. 1.7 2.0 0.7 x VCC - - - - - - 0.7 0.8 0.3 x VCC MAX. 1.7 2.0
74LVC1G384
Tamb (C) -40 to +125 MIN. 0.65 x VCC - - - - 0.7 0.8 0.3 x VCC MAX. V V V V V V V UNIT
1.65 to 1.95 0.65 x VCC - 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5
0.7 x VCC - - -
VIL
LOW-level input voltage
1.65 to 1.95 - 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5
0.35 x VCC -
0.35 x VCC V
TEST CONDITIONS SYMBOL PARAMETER OTHER II IS input leakage current VI = 5.5 V or GND (control pin) analog switch OFF-state current analog switch ON-state current quiescent supply current additional quiescent supply current per control pin VI = VIH or VIL; |VS| = VCC - GND see Fig.6 VI = VIH or VIL; |VS| = VCC - GND; see Fig.7 VI = VCC or GND; VS = GND or VCC; IO = 0 A VI = VCC - 0.6 V; VS = GND or VCC; IO = 0 A VCC (V) 5.5 5.5 - 5.5 - 5.5 - 5.5 - MIN. -
Tamb (C) -40 to +85 TYP.(1) 0.1 0.1 MAX. 5 5
Tamb (C) -40 to +125 MIN. - - MAX. 100 A A UNIT
200
IS
0.1
5
-
200
A
ICC
0.1
10
-
200
A
ICC
5
500
-
5000
A
Note 1. All typical values are measured at VCC = 3.3 V and Tamb = 25 C.
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
TEST CONDITIONS SYMBOL PARAMETER OTHER RON ON-resistance (peak) VS = GND to VCC; VI = VIH; see Fig.5 IS (mA) 4 8 12 24 32 RON ON-resistance (rail) VS = GND; VI = VIH; see Fig.5 4 8 12 24 32 RON ON-resistance (rail) VS = VCC; VI = VIH; see Fig.5 4 8 12 24 32 RON ON-resistance (flatness) VS = GND to VCC; VI = VIH; see Figs. 9 to 12 4 8 12 24 32 Note 1. All typical values are measured at Tamb = 25 C. 2. RON flatness over operating temperature range (-40 to +85 C). VCC (V) 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.65 - 1.95 2.3 - 2.7 2.7 3.0 - 3.6 4.5 - 5.5 1.8 2.5 2.7 3.3 5.0
Tamb (C) -40 to +85 MIN. - - - - - - - - - - - - - - - - - - - - TYP.(1) MAX. 35 14 11.5 8.5 6.5 10 8.5 7.5 6.5 6 12 8.5 7.5 6.5 6 100(2) 17(2) 10(2) 5(2) 3(2) 100 30 25 20 15 30 20 18 15 10 30 20 18 15 10 - - - - - -40 to +125 MIN. - - - - - - - - - - - - - - - - - - - - MAX. 150 45 38 30 23 45 30 27 23 15 45 30 27 23 15 - - - - - UNIT
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
VIL
E V
VIH
E
Y Y VS = GND to VCC GND Z IS GND A VI = VCC or GND
Z A VO = GND or VCC GND
Fig.5 Test circuit for measuring ON-resistance (RON).
Fig.6 Test circuit for circuit OFF-state current.
102 handbook, halfpage RON ()
MNA673
VCC = 1.8 V
VIL
E
2.5 V
Y A VI = VCC or GND
Z A VO (open circuit) GND
10 3.3 V 5.0 V
2.7 V
1
0
1
2
3
4
VI (V)
5
Fig.8 Fig.7 Test circuit for measuring ON-state current.
Typical ON-resistance (RON) as a function of input voltage (VS) for VS = GND to VCC.
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
handbook, halfpage
15
MNA663
handbook, halfpage
15
MNA664
RON () 10
Tamb = +85 C +25 C -40 C
RON () 10 Tamb = +85 C +25 C -40 C
5
5
0
0
1
2
Vl (V)
3
0 0 1 2 Vl (V) 3
Fig.9 RON for VCC = 2.5 V.
Fig.10 RON for VCC = 2.7 V.
handbook, halfpage
10
MNA665
handbook, halfpage
8
MNA666
RON () 8 Tamb = +85 C
RON ()
7
6 6 +25 C -40 C 4 4 2 5
Tamb = +85 C
+25 C -40 C
3
0 0 1 2 3 Vl (V) 4
2 0 1 2 3 4 VI (V) 5
Fig.11 RON for VCC = 3.3 V.
Fig.12 RON for VCC = 5.0 V.
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Philips Semiconductors
Preliminary specification
Bilateral switch
AC CHARACTERISTICS GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 1 k; VCC = 1.65 to 1.95 V; GND = 0 V; tr = tf 2.0 ns; CL = 30 pF; RL = 500 ; VCC = 2.3 to 2.7 V; GND = 0 V; tr = tf 2.5 ns; CL = 50 pF; RL = 500 ; VCC 2.7 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS tPHL/tPLH propagation delay inA; inB to outY see Figs 13 and 15 VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPZH/tPZL turn-ON time E to VOS see Figs 14 and 15 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPHZ/tPLZ turn-OFF time E to VOS see Figs 14 and 15 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Note 1. All typical values are measured at Tamb = 25 C. MIN. - - - - - 1 1 1 1 1 1 1 1 1 1 Tamb (C) -40 to +85 TYP.(1) 0.8 0.4 0.4 0.3 0.2 5.3 3.0 2.6 2.5 1.9 4.2 2.4 3.6 3.4 2.5 MAX. 2 1.2 1 0.8 0.6 12.5 6.5 6.5 5.5 4.0 12.5 6.9 7.5 6.5 4.5
74LVC1G384
-40 to +125 MIN. - - - - - 1 1 1 1 1 1 1 1 1 1 MAX. 3 2 1.5 1.5 1 15.5 8.5 8 6.5 5.5 13 9 9.5 8.5 6.5
UNIT
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
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Philips Semiconductors
Preliminary specification
Bilateral switch
AC WAVEFORMS
74LVC1G384
handbook, halfpage VI
Y or Z GND
VM
t PHL VOH Z or Y VOL VM
t PLH
MNA667
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7; 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 x VCC 0.5 x VCC 1.5 V 0.5 x VCC VI VCC VCC 2.7 V VCC tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.13 The input (VS) to output (VO) propagation delays.
VI
E
VM
GND
tPLZ
output LOW-to-OFF OFF-to-LOW VOL
VCC
tPZL
Y or Z
VM
VX tPHZ tPZH VY
Y or Z
VOH output HIGH-to-OFF OFF-to-HIGH GND
VM
switch enabled
switch disabled
switch enabled
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7; 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5 x VCC 0.5 x VCC 1.5 V 0.5 x VCC VI VCC VCC 2.7 V VCC tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns
VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 VCC at VCC < 2.7 V; VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1 VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load.
Fig.14 The turn-on and turn-off times.
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
handbook, full pagewidth
VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL
MNA616
VEXT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7; 3.0 to 3.6 V 4.5 to 5.5 V VI VCC VCC 2.7 V VCC CL 30 pF 30 pF 50 pF 50 pF RL 1 k 500 500 500 TPLH/TPHL open open open open TPZH/TPHZ GND GND GND GND TPZL/TPLZ 2 x VCC 2 x VCC 6V 2 x VCC
Fig.15 Load circuitry for switching times.
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Philips Semiconductors
Preliminary specification
Bilateral switch
ADDITIONAL AC CHARACTERISTICS FOR THE 74LVC1G66 Recommended conditions and typical values at Tamb = 25 C. SYMBOL PARAMETER sine-wave distortion TEST CONDITIONS RL = 10 k; CL = 50 pF; fin = 1 kHz see Fig.17 VCC (V) 1.65 2.3 3 4.5 RL = 10 k; CL = 50 pF; fin = 10 kHz see Fig.17 1.65 2.3 3 4.5 switch ON signal frequency response RL = 600 ; CL = 50 pF; fin = 1MHz; see Fig. 16; note 1 RL = 50 ; CL = 5 pF; fin = 1MHz; see Fig. 16; note 1 1.65 2.3 3 4.5 1.65 2.3 3 4.5 switch OFF signal feed-through attenuation RL = 600 ; CL = 50 pF; fin = 1MHz; see Fig. 18; note 2 1.65 2.3 3 4.5 RL = 0 ; CL = 50 pF; fin = 1MHz; see Fig. 18; note 2 1.65 2.3 3 4.5 crosstalk (control input to signal output) RL = 600 ; CL = 50 pF; fin = 1MHz; tr = tf = 2 ns see Fig. 19 1.65 2.3 3 4.5 fmax minimum frequency response (-3 dB) RL = 50 ; CL = 10 pF; see Fig. 16; note 1 1.65 2.3 3 4.5
74LVC1G384
TYP. 0.032 0.008 0.006 0.001 0.068 0.009 0.008 0.006 135 145 150 155 >500 >500 >500 >500 -46 -46 -46 -46 -37 -37 -37 -37 69 87 156 302 200 350 410 440
UNIT % % % % % % % % MHz MHz MHz MHz MHz MHz MHz MHz dB dB dB dB dB dB dB dB mV mV mV mV MHz MHz MHz MHz
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
SYMBOL CPD
PARAMETER power dissipation capacitance
TEST CONDITIONS CL = 50 pF; fin = 10 MHz
VCC (V) 2.5 3.3 5.0
TYP. 13.7 15.2 18.3 0.05
UNIT pF pF pF pC
Q
charge injection
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 ; f = 1 Mhz; 1.65 to 5.5 RL = 1 M; see Fig.20; note 3
Notes 1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads -3 dB. 2. Adjust fin voltage to obtain 0 dBm level at input. 3. Guaranteed by design.
VIL
E
0.1 F
Y/Z
Z/Y RL 1/2VCC CL dB
VO
fin
50
channel ON
Fig.16 Test circuit for measuring the frequency response when switch is ON.
2003 Aug 07
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
VIL
E
Y/Z fin 600
Z/Y RL 1/2VCC CL
10 F VO DISTORTION METER
channel ON
VCC 1.65 V 2.3 V 3V 4. V
VI 1.4 Vp-p 2 Vp-p 2.5 Vp-p 4 Vp-p Fig.17 Test circuit for measuring Sine-Wave distortion.
VIH
E
0.1 F
Y/Z
Z/Y RL 1/2VCC CL dB
VO
fin
50
RL 1/2VCC
channel ON
Fig.18 Test circuit for measuring feed-through when switch is OFF.
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
E Y/Z 50 Rin 600 1/2VCC Z/Y RL 600 1/2VCC VO CL 50 pF
Fig.19 Crosstalk.
E Rgen Y/Z Logic input Vgen Z/Y RL 1 M CL VO 0.1 nF
Logic (E) input
off
on
off
VO
Vout
Q = ( Vout) . (CL)
Fig.20 Charge injection test.
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Philips Semiconductors
Preliminary specification
Bilateral switch
PACKAGE OUTLINE Plastic surface mounted package; 5 leads
74LVC1G384
SOT353
D
B
E
A
X
y
HE
vMA
5
4
Q
A
A1
1
e1 e
2
bp
3
wM B detail X Lp
c
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.30 0.20 c 0.25 0.10 D 2.2 1.8 E (2) 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.25 0.15 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT353
REFERENCES IEC JEDEC EIAJ SC-88A
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
2003 Aug 07
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Philips Semiconductors
Preliminary specification
Bilateral switch
74LVC1G384
Plastic surface mounted package; 5 leads
SOT753
D
B
E
A
X
y
HE
vMA
5
4
Q
A A1 c
1
2
3
detail X
Lp
e
bp
wM B
0
1 scale
2 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 0.100 0.013 bp 0.40 0.25 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 y 0.1
OUTLINE VERSION SOT753
REFERENCES IEC JEDEC JEITA SC-74A
EUROPEAN PROJECTION
ISSUE DATE 02-04-16
2003 Aug 07
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Philips Semiconductors
Preliminary specification
Bilateral switch
DATA SHEET STATUS DATA SHEET STATUS Objective specification PRODUCT STATUS Development DEFINITIONS (1)
74LVC1G384
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Preliminary specification
Qualification
Product specification
Production
Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Aug 07
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