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V23818-C8-R10
Small Form Factor Multimode 1300 nm LED Ethernet/Fast Ethernet/FDDI/ATM 155/194 MBd 2x5 Transceiver with MT-RJ Connector
Preliminary
Dimensions in (mm) inches
(13.59) Max. .535 (13.97) Min .550 Pitch -B -
Space available for specific connector implementation
(10.16) .400
(12) .472
(7 .59) .299
(8.89) .350
9x (1.78) .070 (16) .630
-0.1 2x .042 +.000 -.004
(1.07 0 )
-C 3.
2. 10x
0 (0.61-0.2)
(20x) .024 +.000 -.008
0.36/.014 M 0.20/.008 M
ABMC A
3.
0.36/.014 M 0.10/.004 M
ABMC A
(49.56) Ref. 1.951 (37 .56) Max. 1.479
Space available for specific connector implementation
(9.8) Max. .386
-A -
Tx Rx
20 19 18 17 16 15 14 13 12 11
Tx Rx
10 9 8 7 6
2x10 Pin Module Top View
1 2 3 4 5 6 7 8 9 10
2x5 Pin Module Top View
12345
FEATURES * Small Form Factor transceiver unit for MT-RJ connector * RJ-45 style connector system * Half the size of SC Duplex 1x9 transceiver * Fully compliant with all major standards * SONET OC3 * Single power supply (+3.3 V) * Extremely low power consumption < 0.7 W * PECL differential inputs and outputs * System optimized for 62.5/50 m graded index fiber * Multisource footprint * Small footprint for high channel density * UL-94 V-0 certified * ESD Class 2 per MIL-STD 883 Method 3015 * Compliant with FCC (Class B) and EN 55022 * For distances of up to 2 km
Semiconductor Group
APPLICATIONS * ATM switches/bridges/routers, FDDI, Ethernet, Fast Ethernet * Local area networks * High speed computer links * Switching systems
JUNE 1998
Absolute Maximum Ratings Exceeding any one of these values may destroy the device immediately. Supply Voltage (VCC -V EE) ....................................... -0.5 V to 7 V Data Input Levels (PECL) (VIN) ...................................... VEE-VCC Differential Data Input Voltage ............................................... 3 V Operating Ambient Temperature (TAMB) ................. 0 C to 70C Storage Ambient Temperature (TSTG) .................. -40 C to 85C Humidity/Temperature Test Condition (RH)................. 85%/85C Soldering Conditions, Temp/Time (TSOLD/tSOLD) (MIL -STD 883C, Method 2003) ........................... 270 C/10 s ESD Resistance (all pins to VEE, human body) .................. 1.5 kV Output Current (IO) ...........................................................50 mA DESCRIPTION The Siemens Ethernet/Fast Ethernet/FDDI/ATM transceiver-- part of Siemens Small Form Factor transceiver family--is fully compliant with the Asynchronous Transfer Mode (ATM) OC-3 standard, the Fiber Distributed Data Interface (FDDI) Low Cost Fiber Physical Layer Medium Dependent (LCF-PMD) draft standard(1), and the FDDI PMD standard(2). This transceiver supports the MT-RJ connectorization concept. It is compatible with RJ-45 style backpanels for fiber-to-the-desktop applications while providing the advantages of fiber optic technology. The receptacle accepts the new MT-RJ connector. The Small Form Factor is specially developed for distances of up to 2 km. These transceivers also support 10 Base Fx 1300 nm with DCfree balanced coding (Manchester, 8B/10B). Fast Ethernet was developed because of the higher bandwidth requirement in local area networking. It is based on the proven effectiveness of millions of installed Ethernet systems. ATM was developed because of the need for multimedia applications, including real time transmission. The data rate is scalable and the ATM protocol is the basis of the broadband public networks being standardized in the International Telegraph and Telephone Consultative Committee (CCITT). ATM can also be used in local private applications. FDDI is a Dual Token Ring standard developed in the U.S. by the Accredited National Standards Committee (ANSC) X3T9, within the Technical Committee X3T9.5. It is applied to the local area networks of stations, transferring data at 100 Mbits/s with a 125 MBaud transmission rate. The inputs/outputs are PECL compatible and the unit operates with 3.3 V power supply. As an option, the data output stages can be switched to static levels during absence of light, as indicated by the Signal Detect function. It can be directly interfaced with available chipsets.
Regulatory Compliance
Feature Electromagnetic Interference (EMI) Immunity: Electrostatic Discharge Immunity: Radio Frequency Electromagnetic Field Eye Safety
Notes 1. FDDI Token Ring, Low Cost Fiber Physical Layer Medium Dependent (LCF-PMD) ANSI X3T9.5 / 92 LCF-PMD / Proposed Rev. 1.3, September 1, 1992. American National Standard. 2. FDDI Token Ring, Physical Layer Medium Dependent (PMD) ANSI X3.166-1990 American National Standard. ISO/IEC 9314-3: 1990.
Standard FCC Class B EN 55022 Class B CISPR 22 EN 61000-4-2 IEC 1000-4-2
Comments Noise frequency range: 30 MHz to 1 GHz Discharges of 15kV with an air discharge probe on thereceptacle cause no damage. With a field strength of 10 V/m rms, noise frequency ranges from 10 MHz to 1 GHz Class 1
EN 61000-4-3 IEC 1000-4-3
IEC 825-1
TECHNICAL DATA The electro-optical characteristics described in the following tables are valid only for use under the recommended operating conditions. Recommended Operating Conditions
Parameter Ambient Temperature Power Supply Voltage Supply Current Transmitter Data Input High Voltage Data Input Low Voltage Threshold Voltage Input Data Rise/Fall, 20%-80% Data High Time(2) Receiver Output Current Input Duty Cycle Distortion Input Data Dependent Jitter Input Random Jitter Electrical Output Load(3)
Notes 1. For VCC-VEE (min., max.). 50% duty cycle. The supply current (ICC2+ICC3) does not include the load drive current (Icc1). Add max. 45 mA for the three outputs. Load is 50 into VCC -2V. 2. To maintain good LED reliability, the device should not be held in the ON state for more than the specified time. Normal operation should be done with 50% duty cycle. 3. To achieve proper PECL output levels the 50 termination should be done to VCC -2 V. For correct termination see the application notes.
Symbol TAMB VCC -VEE ICC VIH -VCC VIL-VCC tR, tF ton lO tDCD tDDj tRJ
Min. 0 3
Typ. Max. 70 3.3 3.6 230
Units C V mA mV
-1165 -1810 0.4
-880 -1475 -1260 1.3 1000 25 1.0
VBB -VCC -1380
ns
mA ns
0.76 1260 50 1380 nm W
Input Center Wavelength lC RL
Semiconductor Group
V23818-C8-R10, SFF, 1300 nm Ethernet/Fast Ethernet/FDDI/ATM Transceiver (MT-RJ)
2
Transmitter Electro-Optical Characteristics
Transmitter Data Rate Launched Power (Average) into 62.5 m Fiber(1, 2) Symbol Min. DR PO -20 -16 Typ. Max. 170 -14 Units MBaud dBm
Receiver Electro-Optical Characteristics
Receiver Data Rate Sensitivity (Average Power)(1) Sensitivity (Average Power) Center(2) Saturation (Average Power)(2) ns dB/C Duty Cycle Distortion(3, 4) Deterministic Jitter(4, 5) Random Jitter(4, 6) Signal Detect Assert Level(7) Signal Detect Deassert Level(8) Signal Detect Hysteresis PSAT tDCD tDJ tRJ PSDA PSDD PSDA - PSDD -42.5 -45 1.5 -30 -31.5 dB -1620 mV -880 1.3 ns dBm -14 Symbol DR PIN Min. 5 -33 -35.5 -11 1 1 ns Typ. Max. 170 -31 Units MBaud dBm
Center Wavelength(2, 3) C Spectral Width Dl (FWHM)(2, 4) Output Rise/Fall Time, 10%-90%(2, 5) Temperature Coefficient of Optical Output Power Extinction Ratio (Dynamic)(2, 6) Optical Power Low(7) Overshoot Duty Cycle Distortion(8, 9) Data Dependent Jitter(8, 10) Random Jitter(8, 11)
Notes
1270
1360 170
nm
tR , tF TCp
0.6
2.5 0.03
ER PTD OS tDCD tDDJ tRJ
10 -45 10 0.6 0.3 0.6
% dBm % ns
Output Low Voltage(9) VOL-VCC -1810 Output High Voltage(9) VOH -VCC -1025 Output Data Rise/Fall Time, 20%-80% Output SD Rise/Fall Time, 20%-80%
Notes
tR, tF
1. Measured at the end of 5 meters of 62.5/125/0.275 graded index fiber using calibrated power meter and a precision test ferrule. Cladding modes are removed. Values valid for EOL and worst-case temperature. 2. The input data pattern is a 12.5 MHz square wave pattern. 3. Center wavelength is defined as the midpoint between the two 50% levels of the optical spectrum of the LED. 4. Spectral width (full width, half max) is defined as the difference between 50% levels of the optical spectrum of the LED. 5. 10% to 90% levels. Measured using the 12.5 MHz square wave pattern with an optoelectronic measurement system (detector and oscilloscope) having 3 dB bandwidth ranging from less than 0.1 MHz to more than 750 MHz. 6. Extinction Ratio is defined as PL/PH x 100%. Measurement system as in Note 5. 7. Optical Power Low is the output power level when a steady state low data pattern (FDDI Quiet Line state) is used to drive the transmitter. Value valid <1 ms after input low. 8. Test method as for FDDI-PMD. Jitter values are peak-to-peak. 9. Duty Cycle Distortion is defined as 0.5 [(width of wider state) minus (width of narrower state)]. It is measured with stream of Idle Symbols (62.5 MHz square wave). 10.Measured with the same pattern as for FDDI-PMD. 11. Measured with the Halt Line state (12.5 MHz square wave).
40
1. For a bit error rate (BER) of less than 1x10E-12 over a receiver eye opening of least 1.5 ns. Measured with a 223-1 PRBS at 155 MBd. 2. For a BER of less than 1x10E-12. Measured in the center of the eye opening with a 223-1 PRBS at 155 MBd. 3. Measured at an average optical power level of -20 dBm with a 62.5 MHz square wave. 4. All jitter values are peak-to-peak. RX output jitter requirements are not considered in the ATM standard draft. In general the same requirements as for FDDI are met. 5. Measured at an average optical power level of -20 dBm. 6. Measured at -33 dBm average power. 7. An increase in optical power through the specified level will cause the SIGNAL detect output to switch from a Low state to a High state. 8. A decrease in optical power through the specified level will cause the SIGNAL detect output to switch from a High state to a Low state. 9. PECL compatible. Load is 50 into VCC -2 V. Measured under DC conditions. For dynamic measurements a tolerance of 50 mV should be added.
Semiconductor Group
V23818-C8-R10, SFF, 1300 nm Ethernet/Fast Ethernet/FDDI/ATM Transceiver (MT-RJ)
3
Pin Description
Pin Name VEEr VCCr SD RDRD+ VCCt VEEt TDis TD+ TDMS MS Receiver Signal Ground Receiver Power Supply Signal Detect Received Data Out Bar Received Data Out Level/Logic N/A N/A PECL PECL PECL N/A N/A TTL PECL PECL N/A Pin# 1 2 3 4 5 6 7 8 9 10 MS Normal Operation: Logic "1" Output Fault Condition: Logic "0" Output No internal terminations will be provided. No internal terminations will be provided. Transmitter Power Supply Transmitter Signal Ground Optional use for Laser based products only. Transmitter Data In Transmitter Data In Bar See TD+ pin for terminations Mounting Studs The mounting studs are provided for transceiver mechanical attachment to the circuit board. They also provide an optional connection of the transceiver to the equipment chassis ground. The holes in the circuit board must be tied to chassis ground. Description
APPLICATION NOTES 2x5 Pin Row Transceiver
Bmon+ (18) Pmon+ (20) Bmon- (17) Pmon- (19)
(Pin # in brackets for 20 pin version)
VEE t
7 (12, 16)
VCC
TxDTransmitter Driver 100R* TxD+
10 (15)
9 (14)
R7 6 (11) L2 2 (7) (1) 5 (10) 4 (9) C4 C5 L1 C2 C6 C7 C1 R10 C9 R9 R1 R2 R4 C3 (5) (4) 3 (8) 1 (2,3,6) R13 R11 R12 R5 R6 R3
4
VCC t
SFF Transceiver
VCC r PDB RxD+ RxDPreAmp Receiver Post Amplifier C8
CLK+ CLKSD VEE r
Semiconductor Group
V23818-C8-R10, SFF, 1300 nm Ethernet/Fast Ethernet/FDDI/ATM Transceiver (MT-RJ)
R8
* for GBit versions only
Multimode 1300 nm LED Transceiver Solutions for connecting a Siemens +3.3 V Fiber Optic Transceiver to a +5.0 V Framer-/Phy-Device. Figure 1. Common GND
VCC 5.0 V VCC 3.3 V 68 VCC 100 nF Data In 127 180 500 Rx Out Siemens Fiber Optic Transceiver VCC
Figure 1a. Circuitry for SD (Differential) and Common GND
VCC 5.0 V VCC 3.3 V VCC 39K 127 VCC
Framer/Phy Clock Data Recovery Out 500
100 nF
Tx In 83
Framer/Phy SD Clock Recovery 5V SD 26K
SD Siemens Fiber Optic 3.3 V Transceiver
SD In
SD Out
Inputs and outputs are differential and should be doubled. Signal Detect (SD) is single ended (if used).
Figure 1b. Circuitry for SD (Single Ended) and Common GND
VCC 5.0 V VCC 3.3 V VCC VCC
18K
1.8 V Framer/Phy Clock Recovery 5V SD In SD Siemens Out Fiber Optic 3.3 V Transceiver
1 Zener-Diode 1.8 V
Figure 2. Common VCC
510
1
83
VCC
127 VCC VCC Rx Out 82 83 Siemens Fiber Optic Transceiver
Data In
Inputs and outputs are differential and should be doubled. Signal Detect (SD) is single ended.
Framer/Phy Clock Data Recovery Out 130
GND 3.3 V Tx In
SD GND 5.0 V In GND 5.0 V GND 3.3 V 200
SD Out
GND 3.3 V
Siemens Microelectronics, Inc. * Optoelectronics Division * 19000 Homestead Road * Cupertino, CA 95014 USA Siemens Semiconductor Group * Fiber Optics * Wernerwerkdamm 16 * Berlin D-13623, Germany Siemens K. K. * Fiber Optics * Takanawa Park Tower * 20-14, Higashi-Gotanda, 3-chome, Shinagawa-ku * Tokio 141, Japan www.smi.siemens.com/opto/fo/fo.html (USA) * www.siemens.de/Semiconductor/products/37/376.htm (Germany)

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