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| LTC1068 Very Low Noise, High Accuracy, Quad Universal Filter Building Block FEATURES s s s s s s s DESCRIPTIO s s Four Identical 2nd Order Filters in an SSOP Package Center Frequency Error: 0.3% Typ Low Noise: 40VRMS per 2nd Order Section, Q 5 High Dynamic Range: THD + Noise 0.01% Low DC Offsets: 10mV Typ per 2nd Order Section Clock-to-Center Frequency Ratio: 100:1 No Aliasing for Input Frequencies up to 200 x fCUTOFF Maximum Center Frequency up to 56kHz (VS = 5V) Operates from 1.57V to 5V Power Supplies The LTC (R)1068 consists of four identical, low noise, high accuracy 2nd order switched-capacitor filter building blocks. Each building block, together with three to five resistors, can provide 2nd order filter functions like lowpass, bandpass, highpass and notch. High precision, high performance, quad 2nd order, dual 4th order or 8th order filters can also be designed with an LTC1068. The center frequency of each 2nd order section is tuned by an external clock. The clock-to-center frequency ratio is internally set to 100:1 and can be modified by external resistors. The sampling rate of the LTC1068 is twice the clock frequency. The maximum input frequency can approach twice the clock frequency before aliasing occurs. A customized version of the LTC1068 in a 16-lead SO with internal thin film resistors can be obtained. Clock-tocenter frequency ratios higher or lower than 100:1 can also be obtained. Please contact LTC Marketing for details. The LTC1068 is available in a 24-pin PDIP and 28-pin SSOP surface mounted package. APPLICATI s s s s s s S Linear Phase Bandpass Filters Dual 4th Order Phase Matched Filters High Selectivity Bandpass Filters Notch Filters Audio Equalizer Filters Noise Cancellation Filters , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATI R1 VIN1 R2 R3 R4 1 2 3 4 5 6 5V 0.1F R4 R3 R2 R1 VIN2 7 8 9 10 11 12 INV B HPB BPB LPB SB AGND V+ SA LPA BPA HPA INV A 20kHz, Dual 4th Order Butterworth Lowpass Filter with Over 80dB (S/N + THD) R1 24 23 22 21 20 19 18 17 16 15 14 13 R4 R3 R2 STAGE MODE R1 R2 R3 R4 B 3 71.5k 40.2k 49.9k 40.2k C 3 42.2k 75.0k 40.2k 75.0k A 3 71.5k 40.2k 49.9k 40.2k D 3 42.2k 75.0k 40.2k 75.0k LTC1068 * TA01 INV C HPC BPC LPC SC V- LTC1068 fCLK SD LPD BPD HPD INV D R1 R3 R4 VOUT1 -5V 2MHz VOUT2 0.1F TOTAL HARMONIC DISTORTION (%) R2 U Harmonic Distortion vs Frequency 0.1 VS = 5V fCLK = 2MHz fC = 20kHz VIN = 1VRMS 0.01 0.001 0.1 1 FREQUENCY (kHz) 10 20 LT1068 * TA02 UO UO 1 LTC1068 ABSOLUTE AXI U RATI GS Operating Temperature Range LTC1068C................................................ 0C to 70C LTC1068I ........................................... - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C Total Supply Voltage (V + to V -) .............................. 12V Power Dissipation............................................. 500mW Input Voltage at Any Pin .... V - - 0.3V VIN V + + 0.3V PACKAGE/ORDER I FOR ATIO TOP VIEW INV B HPB/NB BPB LPB SB NC AGND V+ NC 1 2 3 4 5 6 7 8 9 28 INV C 27 HPC/NC 26 BPC 25 LPC 24 SC 23 V - 22 NC 21 CLK 20 NC 19 SD 18 LPD 17 BPD 16 HPD/ND 15 INV D ORDER PART NUMBER TOP VIEW LTC1068CG LTC1068IG SA 10 LPA 11 BPA 12 HPA/NA 13 INV A 14 G PACKAGE 28-LEAD PLASTIC SSOP TJMAX = 110C, JA = 95C/W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS PARAMETER Operating Supply Voltage Range Voltage Swings CONDITIONS (Internal Op Amps) VS = 5V, TA = 25V, unless otherwise noted. MIN 1.57 q q q VS = 1.57V, RL = 5k VS = 2.375V, RL = 5k VS = 5V, RL = 5k VS = 2.375V VS = 5V RL = 5k Output Short-Circuit Current (Source/Sink) DC Open-Loop Gain GBW Product Slew Rate 2 U U W WW U W ORDER PART NUMBER INV B HPB/NB BPB LPB SB AGND V+ SA LPA 1 2 3 4 5 6 7 8 9 24 INV C 23 HPC/NC 22 BPC 21 LPC 20 SC 19 V - 18 CLK 17 SD 16 LPD 15 BPD 14 HPD/ND 13 INV D N PACKAGE 24-LEAD PDIP LTC1068CN LTC1068IN BPA 10 HPA/NA 11 INV A 12 TJMAX = 110C, JA = 65C/W TYP 0.9 1.7 4.3 17/6 20/15 85 6 10 MAX 5.5 UNITS V V V V mA mA dB MHz V/s 0.65 1.50 3.60 LTC1068 ELECTRICAL CHARACTERISTICS PARAMETER Center Frequency Range, fO (Note 1) Input Frequency Range Clock-to-Center Frequency, fCLK/fO VS = 2.375V, fCLK = 1MHz, Mode 1, fO = 10kHz, Q = 5, R1 = R3 = 49.9k, R2 = 10k VS = 5V, fCLK = 1MHz, Mode 1, fO = 10kHz, Q = 5, R1 = R3 = 49.9k, R2 = 10K Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 2) Q Accuracy (Note 2) fO Temperature Coefficient Q Temperature Coefficient DC Offset Voltage (Note 2) (See Table 1) VS = 5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) VS = 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) VS = 5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) VS = 5V, Q 2.0, Mode 1 VS = 1.57V, fCLK = 1MHz VS = 2.375V, fCLK = 1MHz VS = 5V, fCLK = 1MHz VS = 1.57V, fCLK = 1MHz VS = 2.375V, fCLK = 1MHz VS = 5V, fCLK = 1MHz The q denotes specifications which apply over the full operating temperature range. Note 1: See performance characteristics. Note 2: Side D is guaranteed by design. q q q q q q q (Complete Filter) VS = 5V, TA = 25V, unless otherwise noted. MIN TYP 0.1 to 50 0 to 1 100 0.3 100 0.8 100 0.9 100 0.8 100 0.9 0.9 0.9 3 3 MAX UNITS kHz MHz % % % % % % % % ppm/C ppm/C 15 25 40 mV mV mV mVRMS MHz 3.75 7.50 11.0 4.5 8.5 12.0 mA mA mA mA mA mA CONDITIONS 100 0.3 q q q q q VS = 2.375V, fCLK = 1MHz, Q = 5 VS = 5V, fCLK = 1MHz, Q = 5 VS = 2.375V, fCLK = 1MHz, Q = 5 VS = 5V, fCLK = 1MHz, Q = 5 0.25 0.25 1 1 1 5 0 -2 -5 0.1 5.6 2.0 5.0 7.5 2.5 5.5 8.0 Clock Feedthrough Max Clock Frequency Power Supply Current Table 1. Output DC Offsets One 2nd Order Section MODE 1 1b 2 3 VOSN VOS1[(1/Q) + 1 + ||HOLP||] - VOS3/Q VOS1[(1/Q) + 1 + R2/R1] - VOS3/Q [VOS1(1 + R2/R1 + R2/R3 + R2/R4) - VOS3(R2/R3)X [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)] VOS2 = VOS(HP) VOSBP VOS3 VOS3 VOS3 VOS3 VOSLP VOSN - VOS2 ~(VOSN - VOS2)(1 + R5/R6) VOSN - VOS2 VOS1[1 + R4/R1 + R4/R2 + R4/R3] - VOS2(R4/R2) - VOS3(R4/R3) 3 LTC1068 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Q vs Center Frequency (Modes 1, 1B, 2) 50 45 40 35 A. VS = 3.3V, fCLK(MAX) = 1.5MHz B. VS = 5V, fCLK(MAX) = 3.4MHz C. VS = 5V, fCLK(MAX) = 5.6MHz (FOR MODE 2 R4 10R2) MAXIMUM Q S/N + THD (dB) MAXIMUM Q 30 25 20 15 10 5 A 0 0 10 40 30 20 50 60 CENTER FREQUENCY, fO (kHz) 70 B C Signal to Noise + Total Harmonic Distortion vs Frequency -60 -65 -70 1/4 LTC1068 VS = 5V fCLK = 2MHz VIN = 1VRMS 2ND ORDER LOWPASS BUTTERWORTH MODE 1 MODE 3 MODE 2 -60 -65 -70 fCLK/fO ERROR (%) S/N + THD (dB) S/N + THD (dB) -75 -80 -85 -90 -95 -100 1 FREQUENCY (kHz) 1068 TPC04 Noise vs R2/R4 Ratio (Mode 3) 180 160 140 1/4 LTC1068 Q=2 f R2 fO = CLK 100 R4 LOWPASS OUTPUT VS = 5V VS = 5V VS = 3.3V POWER SUPPLY CURRENT (mA) NOISE (VRMS) NOISE (VRMS) 120 100 80 60 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 RESISTOR RATIO (R2/R4) LTC1068 * TPC07 4 UW 1068 G01 Maximum Q vs Center Frequency (Modes 2, 3) 50 45 40 35 30 25 20 15 10 5 A 0 0 40 30 20 50 10 CENTER FREQUENCY, fO (kHz) 60 1068 G02 Signal to Noise + Total Harmonic Distortion vs Input Voltage -60 -65 -70 -75 -80 -85 -90 -95 VS = 5V fCLK = 2MHz 1/4 LTC1068 MODE 3, fIN = 1kHz R1 = R2 = R4 = 57.6k, R3 = 40.2k 2ND ORDER LOWPASS BUTTERWORTH 1 INPUT VOLTAGE (VRMS) 5 LT1068 * TPC03 A. VS = 3.3V, fCLK(MAX) = 1MHz B. VS = 5V, fCLK(MAX) = 3MHz C. VS = 5V, fCLK(MAX) = 5MHz (FOR MODE 2 R4 < 10R2) VS = 3.3V fCLK = 500kHz VS = 5V fCLK = 1MHz B C -100 0.1 Signal to Noise + Total Harmonic Distortion vs Input Voltage 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 fCLK/fO Error vs Clock Frequency VS = 5.0V 2 Q 10 MODE 1 MODE 3 MODE 2 -75 -80 -85 -90 -95 MODE 3 MODE 1 MODE 2 1/4 LTC1068 VS = 5V fCLK = 2MHz fIN = 1kHz 2ND ORDER LOWPASS BUTTERWORTH 1 INPUT VOLTAGE (VRMS) 5 LT1068 * TPC05 10 20 -100 0.1 1.0 1.5 2.0 2.5 3.0 3.5 4.0 CLOCK FREQUENCY (MHz) 4.5 5.0 1068 * TPC06 Wideband Noise vs Q (Mode 1) 100 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 Q 6 7 8 9 10 VS = 5V VS = 3.3V VS = 5V 1/4 LTC1068 BANDPASS OUTPUT 10 9 8 7 6 5 4 3 2 1 0 Power Supply Current vs Power Supply Voltage 70C 25C 0C 0 2 4 6 8 10 12 14 16 18 20 TOTAL POWER SUPPLY VOLTAGE (V) LTC1068 * TPC09 1068 * TPC08 LTC1068 PIN FUNCTIONS Power Supply Pins The V + and V - pins should each be bypassed with a 0.1F capacitor to an adequate analog ground. The filter's power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Using a switching power supply will lower the signal-to-noise ratio of the filter. Figures 1 and 2 show typical connections for dual and single supply operation. Analog Ground Pin The filter's performance depends on the quality of the analog signal ground. For either dual or single supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For single supply operation, AGND should be bypassed to the analog ground plane with at least a 0.47F capacitor (Figure 2). Two internal 10k resistors bias the analog ground pin to one half the power supply voltage across the IC. For instance, if the LTC1068 operates with a single 5V supply, the potential of the analog ground pin is 2.5V 0.5% Clock Input Pin Any TTL or CMOS clock source with a square-wave output and 50% duty cycle (10%) is an adequate clock source for the device. The power supply for the clock source should not be the filter's power supply. The analog ground for the filter should be connected to clock's ground at a single point only. Table 2 shows the clock's low and high level threshold values for dual or single supply operation. Table 2. Clock Source High and Low Threshold Levels POWER SUPPLY Dual Supply = 5V Single Supply = 5V Single Supply = 3.3V HIGH LEVEL 1.53V 1.53V 1.20V LOW LEVEL 0.53V 0.53V 0.53V ANALOG GROUND PLANE 1 2 3 4 5 6 V+ 0.1F 7 8 9 10 11 12 STAR SYSTEM GROUND Figure 1. Dual Supply Ground Plane Connections U U U A pulse generator can be used as a clock source provided the high level ON time is greater than 0.2s. Sine waves are not recommended for clock input frequencies less than 100kHz, since excessively slow clock rise or fall times generate internal clock jitter (maximum clock rise or fall time 1s). The clock signal should be routed from the right side of the IC package and perpendicular to it to avoid coupling to any input or output analog signal path. A 200 ANALOG GROUND PLANE 1 2 3 4 LTC1068 24 23 22 21 20* 19 10k 10k 18 17* 16 15 14 13 24 23 22 21 20 19 LTC1068 18 17 16 15 14 13 V- 0.1F *5 V V+ 0.47F 0.1F 9 10 11 12 +/2 6 7 *8 DIGITAL GROUND PLANE 200 CLOCK SOURCE 1068 F01 STAR SYSTEM GROUND DIGITAL GROUND PLANE 200 CLOCK SOURCE * FOR MODE 3, THE S NODE PINS 5, 8, 17, 20 SHOULD BE TIED TO PIN 6. 1068 F02 Figure 2. Single Supply Ground Plane Connections 5 LTC1068 PIN FUNCTIONS resistor between clock source and Pin 11 will slow down the rise and fall times of the clock to further reduce charge coupling (Figures 1 and 2). 1k Output Pins Each 2nd order section of the LTC1068 has three outputs that typically source 17mA and sink 6mA. Driving coaxial cables or resistive loads less than 20k will degrade the total harmonic distortion performance of any filter design. When evaluating the distortion or noise performance of a particular filter design implemented with LTC1068, the final output of the filter should be buffered with a wideband, noninverting high slew rate amplifier (Figure 3). Inverting Input Pins These pins are the inverting inputs of internal op amps and are susceptible to stray capacitive coupling from low impedance signal outputs and power supply lines. BLOCK DIAGRAM INV A (12) AGND (6) INV B (1) INV C (24) INV D (13) 6 W U U U - LT (R) 1354 + LTC1068 * F03 Figure 3. Wideband Buffer In a printed circuit layout any signal trace, clock source trace or power supply trace should be at least 0.1 inches away from any inverting input pins Summing Input Pins These are voltage input pins. If used, they should be driven with a source impedance below 5k. When they are not used, they should be tied to the analog ground pin. The summing pin connections determine the circuit topology (mode) of each 2nd order section. Please refer to Modes of Operation. HPA/NA (11) BPA (10) LPA (9) - + HPB/NB (2) + - + BPB (3) + LPB (4) V + (7) - + HPC/NC (23) SA (8) + - SB (5) + BPC (22) + LPC (21) 10k CLK (18) 10k AGND (6) V - (19) - + + HPD/ND (14) - SC (20) + BPD (15) + LPD (16) - + + - SD (17) + + PIN 24-LEAD PDIP PACKAGE 1068 BD LTC1068 MODES OF OPERATION CC R6 R3 R2 N VIN R1 S BP LP R5 For the definition of filter functions please refer to the LTC1060 data sheet. Mode 1 In Mode 1, the ratio of the external clock frequency to the center frequency of each 2nd order section is internally fixed at 100:1. Figure 4 illustrates Mode 1 providing 2nd order notch, lowpass and bandpass outputs. Mode 1 can be used to make high order Butterworth lowpass filters; it can also be used to make low Q notches and for cascading 2nd order bandpass functions tuned at the same center frequency. Mode 1 is faster than Mode 3. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. CC R3 R2 N VIN R1 S BP LP - + + - 1/4 LTC1068 AGND f fO = CLK ; fn = fO 100 R2 R3 Q = R3 ; HON = - ; HOBP = - R1 R1 R2 HOLP = HON Figure 4. Mode 1, 2nd Order Filter Providing Notch, Bandpass and Lowpass Outputs Mode 1b Mode 1b is derived from Mode 1. In Mode 1b (Figure 5) two additional resistors R5 and R6 are added to lower the amount of voltage fed back from the lowpass output into the input of the SA (SB, SC or SD) switched-capacitor summer. This allows the filter's clock-to-center frequency ratio to be adjusted beyond 100:1. Mode 1b maintains the speed advantages of Mode 1 and should be considered an optimum mode for high Q designs with fCLK to fCUTOFF (or fCENTER) ratios greater than 100:1. The parallel combination of R5 and R6 should be kept below 5k. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. R4 R3 R2 HP VIN R1 U W - + AGND + - 1068 F05 1/4 LTC1068 NOTE: R5 5k f fO = CLK 100 R3 R6 ; H = - R2 ; H Q = R3 =- R1 OBP R1 R2 (R6 + R5) ON R2 R6 + R5 HOLP = - R6 R1 (R6 + R5); f R6 n = fO ( ) Figure 5. Mode 1b, 2nd Order Filter Providing Notch, Bandpass and Lowpass Outputs Mode 3 In Mode 3, the ratio of the external clock frequency to the center frequency of each 2nd order section can be adjusted above or below 100:1. Figure 6 illustrates Mode 3, the classical state variable configuration, providing highpass, bandpass and lowpass 2nd order filter functions. Mode 3 is slower than Mode 1. Mode 3 can be used to make high order all-pole bandpass, lowpass and highpass filters. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. CC 1068 F04 S BP LP - + + - 1068 F06 1/4 LTC1068 1 R3 R2 R2 R3 R4 ; Q = 1.005 (R2) R4 (1 - (32)(R4) ) AGND f fO = CLK 100 R3 HOHP = - R2 ; HOBP = - R1 R1 ( 1- 1 R4 ; HOLP = - R1 R3 (32)(R4) ) Figure 6. Mode 3, 2nd Order Section Providing Highpass, Bandpass and Lowpass Outputs 7 LTC1068 MODES OF OPERATION CC R4 R3 R2 N VIN R1 S BP LP Mode 2 Mode 2 is a combination of Mode 1 and Mode 3, shown in Figure 7. With Mode 2, the clock-to-center frequency ratio, fCLK/fO, is always less than 100:1. The advantage of Mode 2 is that it provides less sensitivity to resistor tolerances than does Mode 3. As in Mode 1, Mode 2 has a notch output that depends on the clock frequency and the notch frequency is therefore less than the center frequency, fO. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. Mode 3a This is an extension of Mode 3 where the highpass and lowpass output are summed through two external resistors, RH and RL, to create a notch (see Figure 8). Mode 3a is more versatile than Mode 2 because the notch frequency can be higher or lower than the center frequency of the 2nd order section. The external op amp of Figure 8 is not always required. When cascading the sections of the LTC1068, the highpass and lowpass outputs can be summed directly into the inverting input of the next section. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. Mode 2n This mode extends the circuit topology of Mode 3a to Mode 2 (Figure 9) where the highpass notch and lowpass R4 R3 R2 HP VIN R1 S BP LP - + 1/4 LTC1068 AGND Figure 8. Mode 3a, 2nd Order Filter Providing a Highpass Notch or Lowpass Notch Output 8 U CC W - + + - 1068 F07 1/4 LTC1068 AGND 1 + R4 ; f = f R3 R2 1 Q = 1.005 ( ) 1 + R2 R4 R3 (1 - (32)(R4) ) f fO = CLK 100 R2 n O HOHP = - R2 (AC GAIN, f > fn); HOHPn = - R2 R1 R1 R3 R1 R3 (1 - (32)(R4) ) 1 (1 + R2 ) R4 1 (DC GAIN, f < fn) HOBP = - ; HOLP = HOHPn Figure 7. Mode 2, 2nd Order Filter Providing Highpass Notch, Bandpass and Lowpass Outputs outputs are summed through two external resistors, RH and RL, to create a lowpass output with a notch higher in frequency than the notch in Mode 2. This mode, shown in Figure 8, is most useful in lowpass elliptic designs. When cascading the sections of the LTC1068, the highpass notch and lowpass outputs can be summed directly into the inverting input of the next section. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. + - RH RL RG R4 f = 100 R 1 R2 Q = 1.005 (R3) R2 R4 R3 1- ( (32)(R4) ) R R (f = ) = ( ) ( R2 ) ; H (f = 0) = ( ) ( R4 ) H R R1 R R1 f fO = CLK 100 R2 ;n fCLK RH L OHPn G H OLPn G L - + HIGHPASS OR LOWPASS NOTCH OUTPUT EXTERNAL OP AMP OR INPUT OP AMP OF THE LTC1068, SIDES A, B, C, D 1068 G08 LTC1068 MODES OF OPERATION CC R4 R3 R2 HP VIN R1 S BP LP Q = 1.005 R3 R2 f fO = CLK 100 f fn = CLK 100 - + AGND Figure 9. Mode 2n, 2nd Order Filter Providing a Lowpass Notch Output APPLICATIONS INFORMATION Operating Limits The Maximum Q vs Frequency (fO) graphs, under Typical Performance Characteristics, define an upper limit of operating Q for each LTC1068 2nd order section. These graphs indicate the power supply, fO and Q value conditions under which a filter implemented with an LTC1068 will remain stable when operated at temperatures of 70C or less. For a 2nd order section, a bandpass gain error of 3dB or less is arbitrarily defined as a condition for stability. When the passband gain error begins to exceed 1dB, the use of capacitor CC will reduce the gain error (capacitor CC is connected from the lowpass node to the inverting node of a 2nd order section). Please refer to Figures 4 through 9. The value of CC can be best determined experimentally, and as a guide it should be about 5pF for each 1dB of gain error and not to exceed 15pF. When operating the LTC1068 near the limits defined by the Typical Performance Characteristics graphs, passband gain variations of 2dB or more should be expected. Clock Feedthrough Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter's output pins. The clock feedthrough is tested with the filter's input grounded and depends on PC board layout and on the value of the power supplies. With proper layout techniques, the typical values of clock feedthrough are listed under Electrical Characteristics. Any parasitic switching transients during the rising and falling edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough, can be greatly reduced by adding a simple RC lowpass network at the final filter output. This RC will completely eliminate any switching transients. Wideband Noise The wideband noise of the filter is the total RMS value of the device's noise spectral density and is used to determine the operating signal-to-noise ratio. Most of its frequency contents lie within the filter passband and cannot be reduced with post filtering. For a notch filter the noise of the filter is centered at the notch frequency. The total wideband noise (VRMS) is nearly independent of the value of the clock. The clock feedthrough specifications are not part of the wideband noise. For a specific filter design, the total noise depends on the Q of each section and the cascade sequence. Aliasing Aliasing is an inherent phenomenon of switched-capacitor filters and occurs when the frequency of the input signals that produce the strongest aliased components have a frequency, fIN, such as (fSAMPLING - fIN) that falls into the filter's passband. For the LTC1068 the sampling frequency is twice fCLK. If the input signal spectrum is not band-limited, aliasing may occur. U U W U U W 1 + R4 R 1 + R R2 H L HOLPn (f = 0)= ( RG RG + RH RL 1+ R2 R4 + - RH RL RG ( ) )( ) ( R2 R1 1 1 + R2 R4 ) ) ( 1 R3 1- (32)(R4) - + LOWPASS NOTCH OUTPUT EXTERNAL OP AMP OR INPUT OP AMP OF THE LTC1068, SIDES A, B, C, D 1264 G09 1/4 LTC1068 9 LTC1068 TYPICAL APPLICATIONS Frequency Response 10 0 -10 GAIN (dB) 147k VIN1 10k 147k 5k 68.1k 1F 1 2 3 4 5 INV B -20 -30 -40 3.3V -50 -60 0.5 0.7 1.1 0.9 FREQUENCY (kHz) 1.3 1.5 1068 TA04 Linear Phase Bandpass Filters The design of bandpass filters is very application specific; a great number of unique bandpass filters are possible. Linear phase bandpass filters are a special class of bandpass filters. Bandpass filters with linear phase response in their passband, feature an optimum transient response to an input signal of brief duration (for example, a short sinewave burst). The photo shows the transient responses of two bandpass filters with similar gain response and different passband phase response. Essentially, linear phase bandpass filters are used more for their signal selectivity than for their frequency selectivity. A linear phase bandpass filter can be a practical approximation to an ideal matched filter (a matched filter produces an optimum output signal-to-noise ratio in response to a specified, input signal). Two noteworthy applications of linear phase bandpass filters are the tone detection of short signal bursts and the processing of digital communication signals. In digital communication systems, lowpass filters or bandpass filters are specified by a stopband attenuation 10 U Single 3.3V Supply Dual Butterworth Bandpass Filter 68.1k INV C 24 23 22 21 20 19 18 17 16 15 14 13 10k 137k 130k VOUT2 fCLK = 100kHz 130k 137k 10k VOUT1 HPB/NB HPC/NC BPB LPB SB BPC LPC 0.1F 68.1k 5k 147k 10k 147k VIN2 SC LTC1068 6 AGND V- 7+ V CLK 8 SA SD 9 LPA LPD 10 BPA BPD 11 HPA/NA HPD/ND 12 INV A INV D 68.1k 1068 TA03 roll-off factor. The roll-off factor is called the alpha of the filter and varies from zero to one. For practical filters, an alpha equal to one specifies a filter with at least 40dB attenuation at a frequency twice its -3dB frequency and an alpha equal to 1/2 specifies a filter with at least 40dB attenuation at 1 1/2 times it -3dB frequency. The following four filters are examples of linear phase bandpass filters. For comparison, each filter is shown with a center frequency of 10kHz; they can be clock tuned from 1Hz up to a center frequency determined by the maximum clock input, which depends on the filter's power supply. Step Response NONLINEAR-PHASE FILTER LINEAR-PHASE FILTER LTC1068 TYPICAL APPLICATIONS Linear Phase Bandpass 8th Order 10kHz Filter R L1 63.4k RH1 7.5k 1 R21 4.99k R11 26.1k R31 19.6k R41 12.1k 2 HPB/NB 3 BPB HPB/NC BPC 22 24 23 R22 4.99k R32 21.5k RB2 16.2k VIN 5V 0.1F R43 10.7k R33 14.7k R23 4.99k 10 11 12 RL3 14.7k Gain vs Frequency 10 0 -10 -20 GAIN(dB) VS = 5V fCLK = 1.28MHz VIN = 1VRMS INPUT A = 2V/DIV -30 -40 -50 -60 -70 -80 -90 1 10 FREQUENCY (kHz) 100 LTC1068 * TA05b U 8 9 INV B INV C 4 LPB 5 SB 6 AGND 7+ V LTC1068 LPC 21 20 19 R52 4.99k R62 7.5k -5V 0.1F 1.28MHz R54 4.99k R34 28.7k R24 4.99k VOUT R64, 17.8k SC V- CLK 18 17 16 SA LPA SD LPD CENTER FREQUENCY (fCENTER) = CLOCK FREQUENCY/128 PASSBAND -3dB BANDWIDTH = CENTER FREQUENCY/4.1 [LOWER f-3dB AT (0.88)(fCENTER) AND UPPER f-3dB AT (1.12)(fCENTER)] STOPBAND = -60dB AT (0.47)(fCENTER) AND AT (2)(fCENTER) MAXIMUM CLOCK FREQUENCY: 5MHz AT V S = 5V 2.7MHz AT V S = 5V 800kHz AT V S = 3.3V OUTPUT NOISE (FILTER INPUT AT GROUND) = 80VRMS SPECIAL FEATURE: ALPHA = 0.6 [- 40dB AT LOWER f-3dB/1.6 AND UPPER (f-3dB)(1.6)] PINS 24-LEAD PDIP PACKAGE LTC1068 * TA05a BPA HPA/NA INV A BPD HPD/ND INV D RH3 40.2k 15 14 13 OUTPUT B = 1V/DIV 100s/DIV 11 LTC1068 TYPICAL APPLICATIONS Linear Phase Bandpass 8th Order 10kHz Filter RL1 174k RH1 68.1k 1 R21 12.7k R11 80.6k VIN R31 56.2k R41 12.4k 2 3 INV B HPB/NB BPB INV C HPB/NC BPC LPC SC V- LTC1068 CLK 24 23 22 21 20 19 18 1MHz -5V 0.1F R22 14.7k R32 82.5k R42 12.4k CENTER FREQUENCY (fCENTER) = CLOCK FREQUENCY/100 PASSBAND -3dB BANDWIDTH = CENTER FREQUENCY/6.7 [LOWER f-3dB AT (0.925)(fCENTER) AND UPPER f-3dB AT (1.075)(fCENTER)] STOPBAND = -60dB AT (0.648)(fCENTER) AND (1.475)(fCENTER) MAXIMUM CLOCK FREQUENCY: 4.2MHz AT V S = 5V 2.1MHz AT V S = 5V 700kHz AT V S = 3.3V OUTPUT NOISE (FILTER INPUT AT GROUND) = 135VRMS SPECIAL FEATURE: ALPHA = 0.3 [- 40dB AT LOWER f-3dB/1.3 AND AT UPPER (f-3dB)(1.3)] PIN 24-LEAD PDIP PACKAGE RG 14.7k RL2 13k RH2 30.1k 5V 0.1F 8 R43 16.2k R33 66.5k R23 12.4k 9 10 SA LPA BPA Gain vs Frequency 10 0 -10 -20 VS = 5V fCLK = 1MHz VIN = 1VRMS INPUT A = 2V/DIV GAIN(dB) -30 -40 -50 -60 -70 -80 -90 1 10 FREQUENCY (kHz) 100 LTC1068 * TA06b 12 U 5 6 7 4 LPB SB AGND V+ SD LPD BPD 17 16 15 R44 13.7k R34 53.6k R24 12.4k 11 HPA/NA 12 INV A 14 HPD/ND 13 INV D RH3 205k RH4 12.4k RL4 82.5k - VOUT RL3 39.2k + LTC1068 * TA06a OUTPUT B = 1V/DIV 200s/DIV LTC1068 TYPICAL APPLICATIONS Linear Phase Bandpass 8th Order 10kHz Filter RL1 24.9k RH1 51.1k 1 R21 10k R11 24.3k VIN R41 107k R31 25.5k 2 3 4 5 24 23 22 R22 10k R32 32.4k R42 26.1k RB2 14.3k 5V R63 2.32k R43 16.9k R33 17.4k R23 7.32k 0.1F R53 4.99k Gain vs Frequency 10 0 -10 -20 VS = 5V fCLK = 1MHz VIN = 1VRMS INPUT A = 2V/DIV GAIN(dB) -30 -40 -50 -60 -70 -80 -90 1 10 FREQUENCY (kHz) 100 LTC1068 * TA07b U INV B HPB/NB BPB LPB INV C HPB/NC BPC LPC 21 SC V- LTC1068 fCLK SD 20 19 18 17 SB 6 AGND 7+ V 8 -5V 0.1F 1MHz CENTER FREQUENCY (fCENTER) = CLOCK FREQUENCY/100 PASSBAND -3dB BANDWIDTH = CENTER FREQUENCY/4.1 [LOWER f-3dB AT (0.88)(fCENTER) AND UPPER f-3dB AT (1.12)(fCENTER)] STOPBAND = -50dB AT (0.3)(fCENTER) AND AT (1.65)(fCENTER) MAXIMUM CLOCK FREQUENCY: 6MHz AT V S = 5V 3MHz AT V S = 5V 1MHz AT V S = 3.3V OUTPUT NOISE (FILTER INPUT AT GROUND) = 65VRMS SPECIAL FEATURE: HIGH SELECTIVITY IN UPPER STOPBAND. THIS BANDPASS FILTER CAN REJECT A STRONG NOISE SIGNAL WHOSE FREQUENCY IS NEAR A WEAK SIGNAL IN THE FILTER'S PASSBAND. EXAMPLE; DETECTING A 10kHz TONE IN THE PRESENCE OF A 15.74kHz NOISE PIN 24-LEAD PDIP PACKAGE LTC1068 * TA07a SA 9 LPA BPA HPA/NA INV A RB3 18.7k LPD BPD HPD/ND INV D 16 15 14 13 R44 12.1k R34 19.1k R24 10k 10 11 12 VOUT OUTPUT B = 1V/DIV 100s/DIV 13 LTC1068 TYPICAL APPLICATIONS Linear Phase Bandpass 8th Order 10kHz Filter RL1 348k RH1 11k 1 R21 14.7k R11 11k VIN R41 14.3k R31 10k 2 3 4 5 24 23 22 R22 18.2k R32 10k R42 18.7k RL2 10k RH2 200k 5V 0.1F R43 21.5k R33 11.3k R23 21k Gain vs Frequency 10 0 -10 -20 VS = 5V fCLK = 1MHz VIN = 1VRMS INPUT A = 2V/DIV GAIN(dB) -30 -40 -50 -60 -70 -80 -90 1 10 FREQUENCY (kHz) 100 LTC1068 * TA08b 14 U 8 9 10 11 12 INV B HPB/NB BPB LPB INV C HPB/NC BPC LPC 21 SC V- LTC1068 fCLK SD 20 19 18 17 SB 6 AGND 7+ V -5V 0.1F 1MHz CENTER FREQUENCY (fCENTER) = CLOCK FREQUENCY/100 R44 10k R34 17.8k R24 15.4k PASSBAND -3dB BANDWIDTH = CENTER FREQUENCY/1.67 [LOWER f-3dB AT (0.7)(fCENTER) AND UPPER f-3dB AT (1.3)(fCENTER)] STOPBAND = -42dB AT (0.2)(fCENTER) AND AT (2.5)(fCENTER) MAXIMUM CLOCK FREQUENCY: 6MHz AT V S = 5V 3MHz AT V S = 5V 1MHz AT V S = 3.3V OUTPUT NOISE (FILTER INPUT AT GROUND) = 45VRMS VOUT SPECIAL FEATURE: WIDEBAND BANDPASS FILTER WITH EXCELLENT TRANSIENT RESPONSE. THE FILTER'S OUTPUT IN RESPONSE TO A SINUSOIDAL PULSE IS ALMOST A MIRROR IMAGE OF ITS INPUT PIN 24-LEAD PDIP PACKAGE SA LPA BPA HPA/NA INV A RH3 95.3k RL3 12.4k LPD BPD HPD/ND INV D 16 15 14 13 LTC1068 * TA08a OUTPUT B = 2V/DIV 100s/DIV LTC1068 PACKAGE DESCRIPTION 0.205 - 0.212** (5.20 - 5.38) 0 - 8 0.005 - 0.009 (0.13 - 0.22) 0.022 - 0.037 (0.55 - 0.95) 0.0256 (0.65) BSC *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.300 - 0.325 (7.620 - 8.255) 0.009 - 0.015 (0.229 - 0.381) 0.005 (0.127) MIN +0.635 8.255 0.100 0.010 -0.381 (2.540 0.254) *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) ( +0.025 0.325 -0.015 ) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 0.397 - 0.407* (10.07 - 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0.068 - 0.078 (1.73 - 1.99) 0.301 - 0.311 (7.65 - 7.90) 0.010 - 0.015 (0.25 - 0.38) 0.002 - 0.008 (0.05 - 0.21) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 G28 SSOP 0694 N Package 24-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 1.245* (31.62) MAX 24 23 22 21 20 19 18 17 16 15 14 13 0.255 0.015* (6.477 0.381) 1 0.130 0.005 (3.302 0.127) 0.015 (0.381) MIN 2 3 4 5 6 7 8 9 10 11 12 0.045 - 0.065 (1.143 - 1.651) 0.065 (1.651) TYP 0.018 0.003 (0.457 0.076) N24 1096 0.125 (3.175) MIN 15 LTC1068 TYPICAL APPLICATION Single 3.3V Supply, Low Power, Dual Butterworth Lowpass Filters RL1 13.3k 1 R21 10k R11 14k VIN2 R31 13k 2 3 4 5 6 7 1F 3.3V 0.1F 8 9 10 11 R33 13k R23 10k VIN1 R13 14k 28 27 26 25 24 23 22 21 20 19 18 R34 10k R24 18.7k VOUT1 R22 18.7k R32 10k VOUT2 GAIN (dB) INV B HPB/NB BPB LPB SB NC LTC1068 AGND V+ NC SA LPA 12 13 14 BPA HPA/NA INV A RL3 13.3k RELATED PARTS PART NUMBER LTC1064 LTC1164 LTC1264 DESCRIPTION Universal Filter Low Power Universal Filter High Speed Universal Filter COMMENTS 50:1 and 100:1 Clock-to-fO Ratios 50:1 and 100:1 Clock-to-fO Ratios 20:1 Clock-to-fO Ratio 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 q (408) 432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com U Dual 4th Order Butterworth Gain vs Frequency 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 0.1 1 FREQUENCY (kHz) 10 LTC1068 * F10b INV C HPB/NC BPC LPC SC V- NC CLK NC SD LPO 100kHz BPD HPD/ND INV D 17 16 15 POWER SUPPLY CURRENT < 4.5mA (2.5mA TYPICAL) f-3dB = fCLK/100; MAXIMUM CLOCK FREQUENCY 1MHz THE SCHEMATIC IS FOR 28-LEAD SSOP PACKAGE LTC1068 * TA09a 1068F LT/TP 0597 7K * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 1996 |
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