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| HV508 High Voltage Liquid Crystal Shutter Driver Ordering Information Device HVIN Maximum Voltage 45V Package Options SO-8 HV508 HV508LG Features HVCMOS technology for high performance Logic-selectable output voltage 100nF drive capability Up to 90VP-P 25s response time General Description The Supertex HV508 is a 45V liquid crystal shutter driver in an SO8 surface mount package. It consist of two outputs that provide square waves of opposite phase. The liquid crystal shutter is connected between the two outputs. Its equivalent load can be approximated as a resistor in parallel with a capacitor. Minimum resistance is 1.0M and maximum capacitance is 0.1F. The HV508 has three input supply voltages, HVIN, LVIN, and VDD. The output's amplitude will be either LVIN or HVIN. A logic high on the HVEN input will set the output to operate from the HVIN supply. A logic low on the HVEN input will set the output to operate from the LVIN supply. The output frequency is set by the logic input frequency applied on the POL input. Pin Configuration Absolute Maximum* Ratings HVIN, high voltage input LVIN, low voltage input VDD, logic supply voltage Continuous total power dissipation Operating temperature Storage temperature Soldering temperature * All voltages are referenced to GND. For operation above 25C ambient derate linearly at 6mW/C. LVIN POL +60V +7.5V +12V 700mW HVEN GND 1 2 3 4 8 7 6 5 HVOUT1 HVIN VDD HVOUT2 -5C to +60C -65C to +150C +300C top view SO-8 12/13/01 Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to 1 workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website. HV508 Electrical Characteristics DC Electrical Characteristics (over operating supply voltages unless otherwise specified, TA = -5C to +60C) Symbol IHVQ ILVQ IDDQ IHV Parameter HVIN quiescent current LVIN quiescent current VDD quiescent current HVIN operating current Min Typ Max 10 10 10 2.8 Unit A A A mA POL = 100Hz, HVEN = high, TA = 25C, Load = 1M in parallel with 0.1F between HVOUT1 and HVOUT2 POL = 100Hz, HVEN = low, TA = 25C, Load = 1M in parallel with 0.1F between HVOUT1 and HVOUT2 Conditions ILV LVIN operating current 380 A IIL IIH CLOAD Logic input current low Logic input current high Output capacitive load* -5 5.0 0 0.25 A A F CLOAD in parallel with a 1M resistor *The device can operate continuously without any damage within this range. AC limits are not implemented. AC Electrical Characteristics (HVIN = 45V, LVIN = 6V, VDD = 5V, TA = -5C to +60C) Symbol fPOL tHV(ON) tHV(OFF) tLV(ON) tLV(OFF) tEN(ON) Parameter POL input frequency Turn-on time when high voltage is enable Turn-off time when high voltage is enabled Turn-on time when high voltage is disabled Turn-off time when high voltage is disabled Turn-on time from HVEN to HVOUT Min 0 Typ Max 100 16 16 40 6.0 25 Unit Hz s s s s s Load = 1M in parallel with 0.1F between HVOUT1 and HVOUT2. HVEN = High. Outputs rise to HVIN. See Fig. 1. Load = 1M in parallel with 0.1F between HVOUT1 and HVOUT2. HVEN = Low. Outputs rise to LVIN. See Fig. 1. Load = 1M in parallel with 0.1F between HVOUT1 and HVOUT2. See Fig. 2. Conditions Recommended Operating Conditions Symbol VDD LVIN HVIN VIL VIH TA Parameter Logic supply voltage Low output supply voltage High output supply voltage Logic input voltage low Logic input voltage high Ambient Temperature Min 5.0 3.0 5.0 0 0.7VDD -5.0 Typ Max 10.0 6.0 45 0.3VDD VDD +60 Unit V V V V V C Notes: Power-up sequence should be the following: 1. Connect GND, VDD, logic inputs, HVIN, and LVIN. Power-down sequence should be the reverse of the above. 2 HV508 Truth Table HVEN H H L L POL H L H L HVOUT1 HVIN GND LVIN GND HVOUT2 GND HVIN GND LVIN Timing Diagram VIH POL 50% 50% VIL VIN or LVIN 5% t(ON) t(OFF) HVOUT1 GND 80% Figure 1 VIH HVEN 50% VIL HVIN HVOUT1 LVIN tEN(ON) 80% Figure 2 Block Diagram LVIN HVIN VDD Level Translator HVOUT1 Level Translator CMOS Logic HVEN POL GND Level Translator HVOUT2 Level Translator 12/13/010 (c)2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com |
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