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 ESDALC6V1M3
Dual low capacitance TRANSILTM array for ESD protection
Main product applications
Where transient overvoltage protection in ESD sensitive equipment is required, such as:

Computers Printers Communication systems Cellular phone handsets and accessories Video equipment SOT 883 (JEDEC MO-236AA Compliant)
Features

Configuration
I/O2 2 1 1 22 I/O1
2 unidirectional low capacitance TRANSIL diodes Breakdown Voltage VBR = 6.1 V min Low diode capacitance (11 pF typ at 0 V) Low leakage current < 0.5 A Very small PCB area: 0.6 mm RoHS compliant
GND 3 GND
Underside view
Description
The ESDALC6V1M3 is a monolithic array designed to protect 1 line or 2 lines against ESD transients. The device is ideal for applications where both reduced line capacitance and board space saving are required.
Order code
Part number ESDALC6V1M3 Marking K
Complies with the following standards
IEC61000-4-2 level 4: 15 kV (air discharge) 8 kV (contact discharge) MIL STD 883E-Method 3015-7: class 3 HBM (Human Body Model)
Benefits

High ESD protection level High integration Suitable for high density boards
TRANSIL is a trademark of STMicroelectronics
June 2006
Rev 3
www.st.com
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Characteristics
ESDALC6V1M3
1
Characteristics
Table 1.
Symbol VPP PPP Ipp Tj Tstg TL TOP ESD discharge
Absolute ratings (TAMB = 25 C - limiting values)
Parameter IEC61000-4-2 air discharge IEC61000-4-2 contact discharge Tj initial = TAMB Value 15 8 30 3 125 -55 + 150 260 -40 + 125 Unit kV W A C C C C
Peak pulse power dissipation (8/20 s)(1) Repetitive peak pulse current (8/20 s) Junction temperature Storage temperature range
Maximum lead temperature for soldering during 10 s Operating temperature range
1. For a surge greater than the maximum values, the diode will fail in short-circuit.
Table 2.
Symbol VRM VBR VCL IRM IPP T VF
Electrical characteristics (TAMB = 25 C)
Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current @ VRM Peak pulse current Voltage temperature coefficient Forward voltage drop
Slope= 1/ Rd I PP VCL VBR VRM I RM IR VF V I
IF
Parameter VBR IRM Rd T C
Test condition IR = 1 mA VRM = 5 V
Min 6.1
Typ
Max 7.2 0.5
Unit V A
1.1 IR = 1 mA VR = 0 V, F = 1 MHz, VOSC = 30 mV 11 4.2
10-4/C pF
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ESDALC6V1M3
Characteristics
Figure 1.
dB
0.00 - 3 dB - 10.00
S21 attenuation measurement results of each channel
Figure 2.
dB
0.00
Analog crosstalk measurements between channels
-9.3 dB
540 MHz
- 30.00
-52 dB
- 20.00
- 60.00
- 30.00
- 90.00
f (Hz)
- 40.00 100.0k 1.0M Att 1 10.0M 100.0M
1.8 GHz
- 120.00 100.0k 1.0M Xtalk 10.0M
f (Hz)
100.0M 1.0G
1.0G
Figure 3.
ESD response to IEC61000-4-2 (+15 kV air discharge) on each channel
Figure 4.
ESD response to IEC61000-4-2 (-15 kV air discharge) on each channel.
Figure 5.
Relative variation of peak pulse power versus initial junction temperature
Figure 6.
Peak pulse power versus exponential pulse duration
PPP[Tj initial] /PPP[Tj initial=25C] 1.1
1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 150 Tj(C)
PPP(W)
1000 Tj initial = 25 C
100
tP (s) 10 1 10 100
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Ordering information scheme
ESDALC6V1M3
Figure 7.
Clamping voltage versus peak pulse current (typical values)
Figure 8.
Forward voltage drop versus peak forward current (typical values)
IPP(A)
100.0 8/20 s Tj initial =25 C 1.E+00
IFM(A)
10.0
1.E-01
Tj =125C Tj=25C
1.0
1.E-02
VCL(V)
0.1 0 10 20 30 40 50 60 70 1.E-03 0.0 0.2 0.4 0.6 0.8
V(V)
1.0 1.2 1.4 1.6 1.8 2.0
Figure 9.
Junction capacitance versus reverse voltage applied (typical values)
Figure 10. Relative variation of leakage current versus junction temperature (typical values)
IR[Tj] / I R[T j =25 C]
C(pF)
12 11 10 9 8 7 6 5 4 3 2 1 0
10
F=1 MHz VOSC = 30 mVRMS Tj = 25 C
100
V R = 3V
VLINE (V)
1
Tj(C) 25 50 75 100 125
0
1
2
3
4
5
6
2
Ordering information scheme
ESDA LC 6V1
ESD Array Low Capacitance Breakdown Voltage 6V1 = 6.1 Volts min Package M3 = SOT883
M3
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ESDALC6V1M3
Package information
3
Package information
Table 3. SOT883 Dimensions
Dimensions
E
Ref.
D
Millimetres Min Typ Max 0.52 0.05 0.15 0.50 0.60 1.00 0.35 0.65 0.20 0.20 0.25 0.25 0.30 0.30 0.08 0.08 0.20 0.55 Min 0.18 0.00 0.04 0.18
Inches Typ Max 0.2 0.02 0.06 0.20 0.24 0.39 0.14 0.26 0.10 0.10 0.12 0.12 0.08 0.22
A A1
A A1 L b e
1 2
0.45 0.00 0.10 0.45
b b1 D E
L1
3
b1
e e1
e1
L L1
Figure 11. Footprint
Figure 12. Marking
0.40
0.40
'K' + cathode bar
0.50
0.20 0.15
2 1
0.40
K
3
All dimensions in mm
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Package information
ESDALC6V1M3
Figure 13. ST Ecopack(R) recommended soldering reflow profile for PCB mounting
Temperature (C)
260C max 255C 220C 180C 125 C
2C/s recommended 2C/s recommended 6C/s max 6C/s max
3C/s max 3C/s max
0 0 1 2 3 4 5
10-30 sec 90 to 150 sec 90 sec max
6
7
Time (min)
Figure 14. Packing information
Cathode bar 2.0 0.05 4.0 0.1 O 1.5 0.1
1.75 0.1
1.10 0.05
K K K
3.5 - 0.1
0.66 0.05
All dimensions in mm
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
8.0 0.3
0.68 0.05
4.0 0.1
User direction of unreeling
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ESDALC6V1M3
Ordering information
4
Ordering information
Part number ESDALC6V1M3 Marking K Package SOT883 Weight 0.96 mg Bulk qty 30 000 Delivery mode Tape and reel
5
Revision history
Date 04-Aug-2005 23-May-2006 16-Jun-2006 Revision 1 2 3 Initial release. Reformated to current standards. Added soldering reflow profile diagram. Updated tape and reel illustration (Figure 14). Changes
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ESDALC6V1M3
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