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| Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications L9500A Introduction The Agere Systems Inc. L9500A is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. This device provides the complete set of line interface functionality (including power ringing) needed to interface to a subscriber loop. This device has the capability to operate with a VCC supply of 3.3 V or 5 V and is designed to minimize external components required at all device interfaces. This device is optimized to interface to data over cable service interface specification (DOCSIS) compliant cable modem gateway, multi-media adaptor, and residential gateway products, such as the Broadcom(R) BCM3351, BCM3352, BCM6352, and BCM1101 and equivalent products. Applications s Interface to Broadcom: -- BCM3351 Cable Modem -- BCM3352 Cable Modem -- BCM6352 Integrated Multi-Media Adaptor -- BCM1101 Residential Gateway Cable Modem Voice over Internet Protocol (VoIP) Voice over DSL Remote Subscriber Units Broadband Wireless Short Loop Access s s s s s s Features s s s Description This device is optimized to provide battery feed, ringing, and supervision on short-loop plain old telephone service (POTS) loops. This device provides power ring to the subscriber loop through amplification of a low-voltage input. It provides forward and reverse battery feed states, onhook transmission, a low-power scan state, ground start (tip open), and a forward disconnect state. The device requires a VCC and battery to operate. VCC may be either a 5 V or a 3.3 V supply. The ringing signal is derived from the high-voltage battery. A battery switch is included to allow for use of a lowervoltage battery in the off-hook mode, thus minimizing short-loop off-hook power. Ring mode overhead is collapsed, allowing rail-to-rail operation. In this manner, the L9500 can operate from a lower 75 V battery to minimize critical power consumption and at the same time extend subscriber ringing loop lengths to 500 and beyond. Loop closure, ring trip, and ground start detection is available. The loop closure detector has a fixed threshold with hysteresis. The ring trip detector requires a single-pole filter, thus minimizing external components required. The dc current limit is set and fixed by a logic-controllable pin. Ground or open applied to this pin sets the current limit at the low or high value. The device is offered with differential ringing and receive input, making it ideal for direct interface to DOCSIS compliant cable modem gateway products. Differential ringing and codec interface Onboard ringing generation Three ringing input options: -- Sine wave -- PWM -- Logic level square wave Flexible VCC options: -- 5 V or 3.3 V VCC -- No -5 V required Battery switch to minimize off-hook power Eight operating states: -- Scan mode for minimal power dissipation -- Forward and reverse battery active -- On-hook transmission states -- Ground start -- Ring mode -- Disconnect mode Ultralow on-hook power: -- 27 mW scan mode -- 38 mW active mode Loop start, ring trip, and ground start detection Software-controllable dual current limit option 28-pin PLCC package 48-pin MLCC package s s s s s s s s L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Table of Contents Contents Page L9500A Introduction ..................................................................................................................................................1 Features ..................................................................................................................................................................1 Applications.............................................................................................................................................................1 Description ..............................................................................................................................................................1 Features ....................................................................................................................................................................4 Description.................................................................................................................................................................4 Architecture Diagram.................................................................................................................................................6 Pin Information ..........................................................................................................................................................7 Operating States........................................................................................................................................................9 State Definitions ......................................................................................................................................................10 Forward Active ......................................................................................................................................................10 Reverse Active ......................................................................................................................................................10 Scan ......................................................................................................................................................................10 On-Hook Transmission--Forward Battery ............................................................................................................10 On-Hook Transmission--Reverse Battery ............................................................................................................10 Disconnect ............................................................................................................................................................10 Ring.......................................................................................................................................................................10 Ground Start .........................................................................................................................................................10 Thermal Shutdown ................................................................................................................................................10 Absolute Maximum Ratings (@ TA = 25 C) ............................................................................................................11 Electrical Characteristics .........................................................................................................................................12 Test Configurations .................................................................................................................................................19 Applications .............................................................................................................................................................21 Power Control .......................................................................................................................................................21 dc Loop Current Limit............................................................................................................................................22 Overhead Voltage .................................................................................................................................................22 Active Mode .......................................................................................................................................................22 Scan Mode .........................................................................................................................................................22 On-Hook Transmission Mode.............................................................................................................................22 Ring Mode ..........................................................................................................................................................22 Loop Range ..........................................................................................................................................................22 Battery Reversal Rate ...........................................................................................................................................23 Supervision ...........................................................................................................................................................23 Loop Closure.........................................................................................................................................................23 Ring Trip ...............................................................................................................................................................23 Ground Start .........................................................................................................................................................23 Power Ring ...........................................................................................................................................................24 Sine Wave Input Signal and Sine Wave Power Ring Signal Output ..................................................................24 ac Applications ........................................................................................................................................................25 ac Parameters.......................................................................................................................................................25 Design Examples ..................................................................................................................................................26 First-Generation Codec ac Interface Network--Resistive Termination..............................................................26 Broadcom 3352 Interface Network........................................................................................................ .............26 Outline Diagrams.....................................................................................................................................................28 28-Pin PLCC .........................................................................................................................................................28 48-Pin MLCC ........................................................................................................................................................29 48-Pin MLCC, JEDEC MO-220 VKKD-2...............................................................................................................30 Ordering Information ...............................................................................................................................................31 2 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Table of Contents Figures Page Figure 1. Architecture Diagram ................................................................................................................................6 Figure 2. 28-pin PLCC Diagram ...............................................................................................................................7 Figure 3. 48-pin MLF Diagram .................................................................................................................................7 Figure 4. Basic Test Circuit .................................................................................................................................... 19 Figure 5. Metallic PSRR ......................................................................................................................................... 20 Figure 6. Longitudinal PSRR .................................................................................................................................. 20 Figure 7. Longitudinal Balance ............................................................................................................................... 20 Figure 8. ac Gains .................................................................................................................................................. 20 Figure 9. Ringing Waveform Crest Factor = 1.6 ..................................................................................................... 24 Figure 10. Ringing Waveform Crest Factor = 1.2 ................................................................................................... 24 Figure 11. RINGIN Operation .................................................................................................................................. 25 Figure 12. Reference Schematic with Broadcom BCM Embedded Codec Devices and Agere L9500 SLIC ........................................................................................................................................... 26 Tables Page Table 1. Pin Descriptions ........................................................................................................................................8 Table 2. Control States .............................................................................................................................................9 Table 3. Supervision Coding .....................................................................................................................................9 Table 4. Recommended Operating Characteristics .............................................................................................. 11 Table 5. Thermal Characteristics ............................................................................................................................11 Table 6. Environmental ........................................................................................................................................... 12 Table 7. 5 V Supply Currents .................................................................................................................................. 12 Table 8. 5 V Powering .............................................................................................................................................12 Table 9. 3.3 V Supply Currents .............................................................................................................................. 13 Table 10. 3.3 V Powering ....................................................................................................................................... 13 Table 11. 2-Wire Port .............................................................................................................................................14 Table 12. Analog Pin Characteristics .................................................................................................................... 15 Table 13. ac Feed Characteristics ........................................................................................................................ 16 Table 14. Logic Inputs and Outputs (VCC = 5 V) ................................................................................................... 17 Table 15. Logic Inputs and Outputs (VCC = 3.3 V) ................................................................................................ 17 Table 16. Ground Start ........................................................................................................................................... 17 Table 17. Ringing Specifications ............................................................................................................................18 Table 18. Ring Trip ................................................................................................................................................. 18 Table 19. Typical Active Mode On- to Off-Hook Tip/Ring Current-Limit Transient Response ............................... 22 Table 20. FB1 and FB2 Values vs. Typical Ramp Time ........................................................................................ 23 Table 21. Parts List L9500; Agere L9500 and Broadcom BCM3352 (per Broadcom BCM93552SV Application Board--SLIC Daughter Boad Components); Fully Programmable ........................................................ 27 Agere Systems Inc. 3 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Features s s On board balanced ringing generation: -- No ring relay -- No bulk ring generator required -- 15 Hz to 70 Hz ring frequency supported -- Sine wave input-sine wave output -- PWM input-sine wave output -- Square wave input-trapezoidal output Power supplies requirements: -- VCC talk battery and ringing battery required -- No -5 V supply required -- No high-voltage positive supply required Flexible Vcc options: -- 5 V or 3.3 V VCC operation -- 5 V or 3.3 V VCC interchangeable and transparent to users Battery switch via logic control: -- Minimize off-hook power dissipation Minimal external components required Eight operating states: -- Forward active, VBAT2 applied -- Polarity reversal active, VBAT2 applied -- On-hook transmission, VBAT1 applied -- On-hook transmission polarity reversal, VBAT1 applied -- Ground start -- Scan -- Forward disconnect -- Ring mode Unlatched parallel data control interface Ultralow SLIC power: -- Scan 38 mW (VCC = 5 V) -- Forward/reverse active 54 mW (VCC = 5 V) -- Scan 27 mW (VCC = 3.3 V) -- Forward/reverse active 41 mW (VCC = 3.3 V) Supervision: -- Loop start, fixed threshold with hysteresis -- Ring trip, single-pole ring trip filtering, fixed threshold as a function of battery voltage -- Ground start fixed threshold with hysteresis Adjustable current limit: -- 25 mA or 40 mA via ground or open to control input Overhead voltage: -- Clamped typically <51 V differentially -- Clamped maximum <56.5 V single-ended Thermal shutdown protection with hysteresis Device interfaces: -- Differential receive interface -- Singled-ended transmit interface -- Differential ring input Package options: -- 28-pin PLCC -- 48-pin MLCC 90 V CBIC-S technology s s s s s s s s Description The L9500 is designed to provide battery feed, ringing, and supervision functions on short plain old telephone service (POTS) loops. This device is designed for ultralow power in all operating states. The L9500 offers 8 operating states. The device assumes use of a lower-voltage talk battery, a highervoltage ringing battery, and a VCC supply. The L9500 requires only a positive VCC supply. No -5 V supply is needed. The L9500 can operate with a VCC of either 5 V or 3.3 V, allowing for greater user flexibility. The choice of VCC voltage is transparent to the user; the device will function with either supply voltage connected. Two batteries are used: 1. A high-voltage ring battery (VBAT1). VBAT1 is a maximum -75 V. VBAT1 is used for power ring signal amplification and for scan, on-hook transmission, and ground start modes. This supply is current limited to approximately the maximum power ringing current, typically 50 mA. 2. A lower-voltage talk battery (VBAT2). VBAT2 is used for active mode powering. s s s s s 4 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Both the ring trip and loop closure supervision functions are included. The loop closure has a fixed typical 10.5 mA on- to off-hook threshold in the active mode and a fixed 11.5 mA on- to off-hook threshold from the scan mode. In either case, there is a 2 mA hysteresis. The ring trip detector requires only a single-pole filter at the input, minimizing external components. The ring trip threshold at a given battery voltage is fixed. Typical ring trip threshold is 42.5 mA for a -70 V VBAT1. The device offers a ground start mode. In this mode the tip drive amplifier is turned off. The device presents a high impedance (>100 k) to PT and a current limited battery (VBAT1) to PR. VBAT1 is clamped to less than 56.5 V in this mode at PR. The NSTAT loop current detctor is used for ring ground detection. In the ground start mode, since the loop current is common mode, the loop closure threshold is reduced in half, thus maintaining loop supervision at specified levels. Upon reaching the thermal shutdown temperature, the device will enter an all off mode. Upon cooling, the device will re-enter the state it was in prior to thermal shutdown. Hysteresis is built in to prevent oscillation. Data control is via a parallel unlatched control scheme. The dc current limit is fixed to either 25 mA or 40 mA depending if ground or open is applied to the VPROG current limit programming pin. Programming accuracy is 8%. Circuitry is added to the L9500 to minimize the inrush of current from the VCC supply and to the battery supply during an on- to off-hook transition, thus saving in power supply design cost. See the Applications section of this data sheet for more information. The L9500 uses a voltage feed-current sense architecture; thus the transmit gain is a transconductance. The L9500 transconductance is set via a single external resistor, and this device is designed for optimal performance with a transconductance set at 300 V/A. This interface is single ended. The L9500 offers a differential receive interface with a gain of 8. The L9500 is internally referenced to 1.5 V. This reference voltage is output at the VREF output of the device. The SLIC output VITR is also referenced to 1.5 V. The SLIC inputs RCVP/RCVN are floating inputs. The L9500 is packaged in a 28-pin PLCC or a 48-pin MLCC package. Description (continued) Forward and reverse battery active modes are used for off-hook conditions. Since this device is designed for short-loop applications, the lower-voltage VBAT2 is applied during the forward and reverse active states. Battery reversal is quiet, without breaking the ac path. Rate of battery reversal may be ramped to control switching time. The magnitude of the overhead voltage in the forward and reverse active modes has a typical default value of 7.0 V, allowing for an on-hook transmission of an undistorted signal of 3.14 dBm into 900 . Additionally, this allows sufficient overhead for 500 mV of meter pulse if desired. This overhead is fixed. The ring trip detector is turned off during active modes to conserve power. Because on-hook transmission is not allowed in the scan mode, an on-hook transmission mode is defined. This mode is functionally similar to the active mode, except the tip ring voltage is derived from the higher VBAT1 rather than VBAT2. In the on-hook transmission modes with a primary battery whose magnitude is greater than a nominal 51 V, the magnitude of the tip-to-ground and ring-toground voltage is clamped at less than 56.5 V. To minimize on-hook power, a low-power scan mode is available. In this mode, all functions except off-hook supervision are turned off to conserve power. On-hook transmission is not allowed in the scan mode. In the scan mode with a primary battery whose magnitude is greater than a nominal 51 V, the magnitude of the tip-to-ground and ring-to-ground voltage is clamped at less than 56.5 V. A forward disconnect mode is provided, where all circuits are turned off and power is denied to the loop. The device offers a ring mode, in which a power ring signal is provided to the tip/ring pair. During the ring mode, a user-supplied, low-voltage ring signal is differentially input to the device's RINGIN input. This signal is amplified to produce the power ring signal. This signal may be a sine wave or filtered square wave to produce a sine wave on trapezoidal output. Ring trip detector and common-mode current detector are active during the ring mode. With maximum VBAT1 and a sine wave input, the L9500 has sufficient power to ring a 5 REN (1386 + 40 F) ringing load into 500 of physical resistance. This feature eliminates the need for a separate external ring relay, associated external circuitry, and a bulk ringing generator. See the Applications section of this data sheet for more information. Agere Systems Inc. 5 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Architecture Diagram AGND VCC BGND VBAT2 VBAT1 VPROG NSTAT RTFLT DCOUT VREF VITR B = 20 POWER CURRENT LIMIT AND INRUSH CONTROL RING TRIP LOOP CLOSURE AAC TXI ITR - VTX OUT AX + (ITR/306) VREF X1 CF2 1.5 V BAND-GAP REFERENCE VITR RECTIFIER RFT PR 18 +1 - + X1 CF1 FB2 FB1 - GAIN + RCVN RCVP VREG TIP/RING CURRENT SENSE RFR PT 18 -1 + - VREG ac INTERFACE GAIN = 4 RINGING 35x PARALLEL DATA INTERFACE RINGINN RINGINP B0 B1 B2 12-3530.F (F) Figure 1. Architecture Diagram 6 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Pin Information NSTAT RCVN RCVP VITR VTX 4 RINGINN 5 3 2 1 28 27 26 25 B0 ITR TXI RINGINP 6 24 B1 DCOUT 7 L9500 28-PIN PLCC PINOUT 23 B2 CF2 8 22 PR CF1 9 21 PT RTFLT 10 20 FB1 VREF 11 12 AGND 13 VCC 14 VBAT1 15 VBAT2 16 BGND 17 NC 18 VPROG 19 FB2 12-3558e Figure 2. 28-pin PLCC Diagram RCVP NSTAT RCVN VITR VTX TXI ITR NC 48 47 46 45 44 43 RINGINN RINGINP NC NC NC DCOUT NC CF2 NC CF1 NC RTFLT 1 2 3 4 5 6 7 8 9 10 11 12 NC 42 41 40 39 38 37 36 35 34 33 32 NC B0 B1 B2 NC PR NC NC PT NC FB1 FB2 L9500 48-PIN MLCC PINOUT NC NC NC 31 30 29 28 27 26 25 VPROG 13 14 15 16 17 18 19 20 21 VBAT1 AGND VBAT2 NC NC NC NC VREF VCC 22 23 24 BGND NC 12-3361.b Figure 3. 48-pin MLF Diagram Agere Systems Inc. 7 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Pin Information (continued) Table 1. Pin Descriptions 28-Pin PLCC 1 48-Pin MLCC 43 Symbol NSTAT Type O Name/Function 2 45 VITR 3 47 RCVP 4 48 RCVN 5 1 RINGINN 6 2 RINGINP 7 6 DCOUT 8 9 10 8 10 12 CF2 CF1 RTFLT 11 12 13 14 15 16 17 13 15 16 19 21 23 3, 4, 5, 7, 9, 11, 14, 17, 18, 20, 22, 27, 29, 30, 32, 36, 37, 40, 42, 44, 46 24 VREF AGND VCC VBAT1 VBAT2 BGND NC Loop Closure Detector Output--Ring Trip Detector Output. When low, this logic output indicates that an off-hook condition exists or ringing is tripped or a ring ground has occurred. O Transmit ac Output Voltage. Output of internal AAC amplifier. This output is a voltage that is directly proportional to the differential ac tip/ring current. I Receive ac Signal Input (Noninverting). This high-impedance input controls to ac differential voltage on tip and ring. This node is a floating input. I Receive ac Signal Input (Inverting). This high-impedance input controls to ac differential voltage on tip and ring. This node is a floating input. I Power Ring Signal Input. Couple to a sine wave or lower crest factor low-voltage ring signal. The input here is amplified to provide the full power ring signal at tip and ring. This signal may be applied continuously, even during nonringing states. I Power Ring Signal Input. Couple to a sine wave or lower crest factor low-voltage ring signal. The input here is amplified to provide the full power ring signal at tip and ring. This signal may be applied continuously, even during nonringing states. O dc Output Voltage. This output is a voltage that is directly proportional to the absolute value of the differential tip/ring current. This is used to set ring trip threshold. -- Filter Capacitor. Connect a capacitor from this node to ground. -- Filter Capacitor. Connect a capacitor from this node to CF2. -- Ring Trip Filter. Connect this lead to DCOUT via a resistor and to AGND with a capacitor to filter the ring trip circuit to prevent spurious responses. A single-pole filter is needed. O SLIC Internal Reference Voltage. Output of internal 1.5 V reference voltage. GND Analog Signal Ground. PWR Analog Power Supply. User choice of 5 V or 3.3 V nominal power or supply. PWR Battery Supply 1. High-voltage battery. PWR Battery Supply 2. Lower-voltage battery. GND Battery Ground. Ground return for the battery supplies. -- No Connection. 18 VPROG I Current-Limit Program Input. Connect ground to this pin to set current limit to 25 mA; leave this pin open to set current limit to 40 mA. 8 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Pin Information (continued) Table 1. Pin Descriptions (continued) 28-Pin PLCC 19 48-Pin MLCC 25 Symbol FB2 Type -- Name/Function Polarity Reversal Slowdown Capacitor. Connect a capacitor from this node for controlling rate of battery reversal. If ramped battery reversal is not desired, this pin is left open. Polarity Reversal Slowdown Capacitor. Connect a capacitor from this node for controlling rate of battery reversal. If ramped battery reversal is not desired, this pin is left open. Protected Tip. The output drive of the tip amplifier and input to the loop sensing circuit. Connect to loop through overvoltage and overcurrent protection. Protected Ring. The output drive of the ring amplifier and input to the loop sensing circuit. Connect to loop through overvoltage and overcurrent protection. State Control Input. These pins have an internal 100 k pull-up. State Control Input. These pins have an internal 100 k pull-up. State Control Input. These pins have an internal 100 k pull-up. Transmit Gain. Input to AX amplifier. Connect a 4.75 k resistor from this node to VTX to set transmit gain. Gain shaping for termination impedance with a first generation codec is also achieved with a network from this node to VTX. ac Output Voltage. Output of internal AX amplifier. The voltage at this pin is directly proportional to the differential tip/ring current. ac/dc Separation. Input to internal AAC amplifier. Connect a 0.1 F capacitor from this pin to VTX. 20 26 FB1 -- 21 28 PT I/O 22 31 PR I/O 23 24 25 26 33 34 35 38 B2 B1 B0 ITR Iu Iu Iu I 27 28 39 41 VTX TXI O I Operating States Table 2. Control States B0 0 0 0 0 1 1 1 1 B1 0 1 0 1 1 0 1 0 B2 1 1 0 0 0 0 1 1 State Forward active Reverse active On-hook transmission forward battery On-hook transmission reverse battery Ground start Scan Disconnect--device will power up in this state Ring Table 3. Supervision Coding NSTAT 0 = off-hook or ring trip or thermal shutdown or ring ground. 1 = on-hook and no ring trip and no thermal shutdown and no ring ground. Agere Systems Inc. 9 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 State Definitions Forward Active s s s s s On-Hook Transmission--Reverse Battery s s Pin PR is positive with respect to PT. VBAT1 is applied to tip/ring drive amplifiers. Supervision circuits, loop closure, and commonmode detect are active. Ring trip detector is turned off to conserve power. On-hook transmission is allowed. The tip-to-ring on-hook differential voltage will be typically between -41 V and -49 V with a -70 V primary battery. Pin PT is positive with respect to PR. s VBAT2 is applied to tip/ring drive amplifiers. Loop closure and common-mode detect are active. Ring trip detector is turned off to conserve power. Overhead is set to nominal 6.0 V for undistorted transmission of 3.14 dBm into 900 . s s s Reverse Active Disconnect s s s s s Pin PR is positive with respect to PT. VBAT2 is applied to tip/ring drive amplifiers. Loop closure and common-mode detect are active. Ring trip detector is turned off to conserve power. Overhead is set to nominal 6.0 V for undistorted transmission of 3.14 dBm into 900 . s The tip/ring amplifiers and all supervision are turned off. The SLIC goes into a high-impedance state. NSTAT is forced high (on-hook). Device will power up in this state. s s s Scan s Ring s s s Except for loop closure, all circuits (including ring trip and common-mode detector) are powered down. On-hook transmission is disabled. Pin PT is positive with respect to PR, and VBAT1 is applied to tip/ring. The tip to ring on-hook differential voltage will be typically between -44 V and -51 V with a -70 V primary battery. Power ring signal is applied to tip and ring. Input waveform at RINGIN is amplified. Ring trip supervision and common-mode current supervision are active; loop closure is inactive. Overhead voltage is reduced to typically 4 V. Current is limited by saturation current of the amplifiers themselves, typically 100 mA at 125 C. s s s s s On-Hook Transmission--Forward Battery s s s Ground Start s Tip drive amplifer is turned off. Device presents a high impedance (>100 k) to pin PT. Device presents a clamped (<56.5 V) current-limited battery (VBAT1) to PR. Output pin RGDET indicates current flowing in the ring lead. Pin PT is positive with respect to PR. s VBAT1 is applied to tip/ring drive amplifiers. Supervision circuits, loop closure, and commonmode detect are active. Ring trip detector is turned off to conserve power. On-hook transmission is allowed. The tip-to-ring on-hook differential voltage will be typically between -41 V and -49 V with a -70 V primary battery. s s s s s Thermal Shutdown s s Not controlled via truth table inputs. This mode is caused by excessive heating of the device, such as may be encountered in an extended power-cross situation. NSTAT output is forced low or off hook during a thermal shutdown event. Agere Systems Inc. 10 Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Absolute Maximum Ratings (@ TA = 25 C) Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Parameter dc Supply (VCC) Battery Supply (VBAT1) Battery Supply (VBAT2) Logic Input Voltage Logic Output Voltage Operating Temperature Range Storage Temperature Range Relative Humidity Range PT or PR Fault Voltage (dc) PT or PR Fault Voltage (10 x 1000 s) Ground Potential Difference (BGND to AGND) Symbol -- -- -- -- -- -- -- -- VPT, VPR VPT, VPR -- Min -0.5 -- -- -0.5 -0.5 -40 -40 5 VBAT - 5 VBAT - 15 -- Max 7.0 -80 VBAT1 VCC + 0.5 VCC + 0.5 125 150 95 3 15 1 Unit V V V V V C C % V V V Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. For example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvoltage. Table 4. Recommended Operating Characteristics Parameter 5 V dc Supplies (VCC) 3 V dc Supplies (VCC) High Office Battery Supply (VBAT1) Auxiliary Office Battery Supply (VBAT2) Operating Temperature Range Table 5. Thermal Characteristics Parameter Thermal Protection Shutdown (Tjc) 28 PLCC Thermal Resistance Junction to Ambient (JA)1, 2: Natural Convection 2S2P Board Natural Convection 2S0P Board Wind Tunnel 100 Linear Feet per Minute (LFPM) 2S2P Board Wind Tunnel 100 Linear Feet per Minute (LFPM) 2S0P Board 48 MLF Thermal Resistance Junction to Ambient (JA)1, 2: Min 150 -- -- -- -- -- Typ 165 35.5 50.5 31.5 42.5 38 Max -- -- -- -- -- -- Unit C C/W C/W C/W C/W C/W Min -- 3.13 -60 -12 -40 Typ 5.0 3.3 -70 -- 25 Max 5.25 -- -75 VBAT1 85 Unit V V V V C 1. This parameter is not tested in production. It is guaranteed by design and device characterization. 2. Airflow, PCB board layers, and other factors can greatly affect this parameter. Agere Systems Inc. 11 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Electrical Characteristics Table 6. Environmental Parameter Temperature Range Humidity Range1 1. Not to exceed 26 grams of water per kilogram of dry air. Min -40 5 Typ -- -- Max 85 951 Unit C %RH Table 7. 5 V Supply Currents VBAT1 = -70 V, VBAT2 = -21 V, VCC = 5 V. Parameter Supply Currents (scan state; no loop current): IVCC IVBAT1 IVBAT2 Supply Currents (forward/reverse active; no loop current, with or without PPM, VBAT2 applied): IVCC IVBAT1 IVBAT2 Supply Currents (on-hook transmission mode; no loop current, with or without PPM, VBAT1 applied): IVCC IVBAT1 IVBAT2 Supply Currents (disconnect mode): IVCC IVBAT1 IVBAT2 Supply Currents (ground start mode, no loop current): IVCC IVBAT1 IVBAT2 Supply Currents (ring mode; no load): IVCC IVBAT1 IVBAT2 Table 8. 5 V Powering VBAT1 = -70 V, VBAT2 = -21 V, VCC = 5 V. Parameter Power Dissipation (scan state; no loop current) Power Dissipation (forward/reverse active; no loop current, VBAT2 applied) Power Dissipation (on-hook transmission mode; no loop current, VBAT1 applied) Power Dissipation (disconnect mode) Power Dissipation (ground start mode) Power Dissipation (ring mode; no load) Min -- -- -- -- -- -- Typ 38 57 135 14 37 156 Max 46 64 165 23 -- 184 Unit mW mW mW mW mW mW Min -- -- -- Typ 4.30 0.24 3 Max 4.80 0.35 6 Unit mA mA A -- -- -- 5.95 25 1.2 7.0 85 1.40 mA A mA -- -- -- -- -- -- -- -- -- -- -- -- 6.0 1.5 1.5 2.7 15 3.5 4.0 0.24 2 5.9 1.8 2 7.0 1.9 6 3.75 110 25 -- -- -- 6.5 2.2 6 mA mA A mA A A mA mA A mA mA A 12 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Electrical Characteristics (continued) Table 9. 3.3 V Supply Currents VBAT1 = -70 V, VBAT2 = -21 V, VCC = 3.3 V. Parameter Supply Currents (scan state; no loop current): IVCC IVBAT1 IVBAT2 Supply Currents (forward/reverse active; no loop current, VBAT2 applied): IVCC IVBAT1 IVBAT2 Supply Currents (on-hook transmission mode; no loop current, VBAT1 applied): IVCC IVBAT1 IVBAT2 Supply Currents (disconnect mode): IVCC IVBAT1 IVBAT2 Supply Currents (ground start mode, no loop current): IVCC IVBAT1 IVBAT2 Supply Currents (ring mode; no load): IVCC IVBAT1 IVBAT2 Table 10. 3.3 V Powering VBAT1 = -70 V, VBAT2 = -21 V, VCC = 3.3 V. Parameter Power Dissipation (scan state; no loop current) Power Dissipation (forward/reverse active; no loop current, VBAT2 applied) Power Dissipation (on-hook transmission mode; no loop current, VBAT1 applied) Power Dissipation (disconnect mode) Power Dissipation (ground start mode) Power Dissipation (ring mode; no loop current) Min -- -- -- -- -- -- Typ 27 42 121 6.5 27 141 Max 36.5 53 151 15 -- 172 Unit mW mW mW mW mW mW Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ 3.2 0.24 3 4.8 25 1.2 4.9 1.5 1.5 1.8 8 2 3.1 0.24 2 4.70 1.8 2 Max 3.6 0.35 6 5.7 85 1.4 5.7 1.9 6 2.5 110 25 -- -- -- 5.4 2.2 6 Unit mA mA A mA A mA mA mA A mA A A mA mA A mA mA A Agere Systems Inc. 13 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Electrical Characteristics (continued) Table 11. 2-Wire Port Parameter Tip or Ring Drive Current = dc + Longitudinal + Signal Currents Tip or Ring Drive Current = Ringing + Longitudinal Signal Current Longitudinal Current Capability per Wire (Longitudinal current is independent of dc loop current.) Ringing Current (RLOAD = 1386 + 40 F) Ringing Current Limit (RLOAD = 100 ) dc Loop Current--ILIM (VBAT2 applied, RLOOP = 100 ): VPROG = 0 VPROG = Open dc Current Variation dc Feed Resistance (does not include protection resistors) Open Loop Voltages: Scan Mode: |VBAT1| > 51 V |VTIP| - |VRING| PR to Battery Ground PT to Battery Ground OHT Mode: |VBAT1| > 51 V |VTIP| - |VRING| PR to Battery Ground PT to Battery Ground Active Mode: |PT - PR| - |VBAT2| Ring Mode: |PT - PR| - |VBAT1| Min 105 65 10 8.5 29 -- -- -- -- -- Typ -- -- -- 15 -- -- 25 40 -- 50 Max -- -- -- -- -- 50 -- -- 8 -- Unit mAp mAp mArms mArms mArms mAp mA mA % 44 -- -- 41 -- -- 5.75 -- 51 -- -- 49 -- -- 6.25 4 -- 56.5 56.5 -- 56.5 56.5 7.75 -- V V V V V V V V 14 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Electrical Characteristics (continued) Table 11. 2-Wire Port (continued) Parameter Loop Closure Threshold: Active/On-hook Transmission Modes Scan Mode Loop Closure Threshold Hysteresis: VCC = 5 V VCC = 3.3 V Longitudinal to Metallic Balance at PT/PR Test Method: Q552 (11/96) Section 2.1.2 and IEEE(R) 455: 300 Hz to 600 Hz 600 Hz to 3.4 kHz Metallic to Longitudinal (harm) Balance: 200 Hz to 1000 Hz 100 Hz to 4000 Hz PSRR 500 Hz--3000 Hz: VBAT1, VBAT2 VCC (5 V operation) Table 12. Analog Pin Characteristics Parameter TXI (input impedance) Output Offset (VTX) Output Offset (VITR) Output Drive Current (VTX) Output Drive Current (VITR) Output Voltage Swing: Maximum (VTX, VITR) Minimum (VTX) Minimum (VITR) Output Short-circuit Current Output Load Resistance Output Load Capacitance RCVN and RCVP: Input Voltage Range (VCC = 5 V) Input Voltage Range (VCC = 3.3 V) Input Bias Current Differential PT/PR Current Sense (DCOUT): Gain (PT/PR to DCOUT) Offset Voltage at ILOOP = 0 Min -- -- -- 300 10 AGND AGND + 0.25 AGND + 0.35 -- 10 -- 0 0 -- -- -10 Typ 100 -- -- -- -- -- -- -- -- -- 20 -- -- 0.05 67 -- Max -- 10 100 -- -- VCC VCC - 0.5 VCC - 0.4 50 -- -- VCC - 0.5 VCC - 0.3 -- -- 10 Unit k mV mV A A V V V mA k pF V V A V/A mV Min -- -- -- -- Typ 10.5 11.5 2 2 Max -- -- -- -- Unit mA mA mA mA 52 52 40 40 45 35 -- -- -- -- -- -- -- -- -- -- -- -- dB dB dB dB dB dB Agere Systems Inc. 15 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Electrical Characteristics (continued) Table 13. ac Feed Characteristics Parameter ac Termination Impedance Total Harmonic Distortion (200 Hz--4 kHz) 2: Off-hook On-hook Transmit Gain (f = 1004 Hz, 1020 Hz)3: PT/PR Current to VITR Receive Gain, f = 1004 Hz, 1020 Hz Open Loop RCVP or RCVN to PT--PR Gain vs. Frequency (transmit and receive)2 600 Termination, 1004 Hz, 1020 Hz reference: 200 Hz--300 Hz 300 Hz--3.4 kHz 3.4 kHz--20 kHz 20 kHz--266 kHz Gain vs. Level (transmit and receive)2 0 dBV Reference: -55 dB to +3.0 dB Idle-channel Noise (tip/ring) 600 Termination: Psophometric C-Message 3 kHz Flat Idle-channel Noise (VTX) 600 Termination: Psophometric C-Message 3 kHz Flat 1 Min 150 -- -- 300 - 3% 7.76 Typ 600 -- -- 300 8 Max 1400 0.3 1.0 300 + 3% 8.24 Unit % % V/A -- -0.3 -0.05 -3.0 -- -0.05 -- -- -- -- -- -- 0 0 0 -- 0 -82 8 -- -82 8 -- 0.05 0.05 0.05 2.0 0.05 -77 13 20 -77 13 20 dB dB dB dB dB dBmp dBrnC dBrn dBmp dBrnC dBrn 1. Set externally either by discrete external components or a third- or fourth-generation codec. Any complex impedance R1 + R2 || C between 150 and 1400 can be synthesized. 2. This parameter is not tested in production. It is guaranteed by design and device characterization. 3. VITR transconductance depends on the resistor from ITR to VITR. This gain assumes an ideal 4750 , the recommended value. Positive current is defined as the differential current flowing from PT to PR. 16 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Electrical Characteristics (continued) Table 14. Logic Inputs and Outputs (VCC = 5 V) Parameter Input Voltages: Low Level High Level Input Current: Low Level (VCC = 5.25 V, VI = 0.4 V) High Level (VCC = 5.25 V, VI = 2.4 V) Output Voltages (open collector with internal pull-up resistor): Low Level (VCC = 4.75 V, IOL = 360 A) High Level (VCC = 4.75 V, IOH = -20 A) Table 15. Logic Inputs and Outputs (VCC = 3.3 V) Parameter Input Voltages: Low Level High Level Input Current: Low Level (VCC = 3.46 V, VI = 0.4 V) High Level (VCC = 3.46 V, VI = 2.4 V) Output Voltages (open collector with internal 60 k pull-up resistor): Low Level (VCC = 3.13 V, IOL = 360 A) High Level (VCC = 3.13 V, IOH = -5 A) Table 16. Ground Start Parameter Tip Open Mode--Tip Input Impedance Threshold Hysteresis: VCC = 5 V VCC = 3.3 V Min 150 -- -- -- Typ -- 13 2 2 Max -- -- -- -- Unit k mA mA mA Symbol VIL VIH IIL IIH VOL VOH Min -0.5 2.0 -- -- 0 2.2 Typ 0.2 2.5 -- -- 0.2 -- Max 0.5 VCC 50 50 0.5 VCC Unit V V A A V V Symbol VIL VIH IIL IIH VOL VOH Min -0.5 2.0 -- -- 0 2.4 Typ 0.4 2.4 -- -- 0.2 -- Max 0.7 VCC 100 75 0.4 VCC Unit V V A A V V Agere Systems Inc. 17 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Electrical Characteristics (continued) Table 17. Ringing Specifications Parameter RINGINN/P: Input Voltage Swing Input Impedance Ring Signal Isolation: PT/PR to VTX Ring Mode Ring Signal Isolation: RINGIN to PT/PR Nonring Mode Ring Signal Distortion: 5 REN 1380 , 40 F Load, 100 Loop Differential Gain: RINGINN/P to PT/PR--VRINGINN/P = 0.7 Vp, VBAT1 = -70 V, RLOAD = 1400 Table 18. Ring Trip Parameter Ring Trip (NSTAT = 0): Loop Resistance (total) VBAT1 applied Ring Trip (NSTAT = 1): Loop Resistance (total) VBAT1 applied Trip Time (f = 20 Hz) Hysteresis Ringing will not be tripped by the following loads: s s Min 0 -- -- Typ -- 100 60 Max VCC -- -- Unit V k dB -- 80 -- dB -- 115 3 128 -- 140 % -- Min 100 -- -- -- Typ -- -- -- 7 Max 600 10 100 -- Unit k ms mA 10 k resistor in parallel with a 6 F capacitor applied across tip and ring. Ring frequency = 17 Hz to 23 Hz. 100 resistor in series with a 2 F capacitor applied across tip and ring. Ring frequency = 17 Hz to 23 Hz. 18 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Test Configurations RTFLT 0.1 F 383 k DCOUT 30 TIP RLOOP 100 /600 30 RING PT PR RINGINN RINGIN RINGINP RINGIN 26.7 k RCVP RCVN 60.4 k 69.8 k 0.1 F RCV RCV VITR VITR VPROG VREF L9500 BASIC TEST CIRCUIT 0.1 F TXI VTX 4750 ITR FB2 FB1 CF1 0.1 F CF2 0.1 F VBAT2 VBAT1 BGND VCC AGND NSTAT B0 B1 B2 B0 B1 B2 0.1 F 0.1 F VBAT2 VBAT1 VCC 0.1 F Figure 4. Basic Test Circuit Agere Systems Inc. 19 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Test Configurations (continued) 100 F TIP VS 368 368 VBAT OR VCC 100 4.7 F VS VBAT OR VCC TIP DISCONNECT BYPASS CAPACITOR + VM BASIC TEST CIRCUIT RING - 100 F + 600 VT/R BASIC TEST CIRCUIT LONGITUDINAL BALANCE = 20log VS VM 12-2584.c (F) - RING Figure 7. Longitudinal Balance VS VT/R 12-2582.c (F) PSRR = 20log Figure 5. Metallic PSRR 600 VBAT OR VCC 100 4.7 F VS VBAT OR VCC 67.5 TIP 10 F + VM - 67.5 56.3 10 F PSRR = 20log VS VM 12-2583.b (F) PT VITR + VT/R BASIC TEST CIRCUIT PR RCV RCV VS - DISCONNECT BYPASS CAPACITOR GXMT = GRCV = VXMT VT/R VT/R VRCV 12-2587.G (F) BASIC TEST CIRCUIT Figure 8. ac Gains RING Figure 6. Longitudinal PSRR 20 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Thus, if the total power dissipated in the SLIC is less than 1.83 W, it will not enter the thermal shutdown state. Total SLIC power is calculated as: Total PD = maximum battery * maximum current limit + SLIC quiescent power. For the L9500A, the worst-case SLIC on-hook active power is 64 mW. Thus, Total off-hook power = (ILOOP)(current-limit tolerance) * (VBATAPPLIED) + SLIC on-hook power Total off-hook power = (0.030 A)(1.08) * (21) + 75 mW Total off-hook power = 744.4 mW The power dissipated in the SLIC is the total power dissipation less the power that is dissipated in the loop. SLIC PD = Total power - loop power Loop off-hook power = (ILOOP * 1.08)2 * (RLOOP(dc) min + 2RPROTECTION + RHANDSET) Loop off-hook power = ((0.030 A)(1.08))2 * (20 + 60 + 200 ) Loop off-hook power = 293.9 mW SLIC off-hook power = Total off-hook power - loop off-hook power SLIC off-hook power = 744.4 mW - 293.9 mW SLIC off-hook power = 450.5 mW < 1.83 W Thus, under the worst-case normal operating conditions of this example, the thermal design, using the auxiliary, is adequate to ensure the device is not driven into thermal shutdown under worst-case operating conditions. Applications Power Control Under normal device operating conditions, power dissipation on the device must be controlled to prevent the device temperature from rising above the thermal shutdown and causing the device to shut down. Power dissipation is highest with higher battery voltages, higher current limit, and under shorter dc loop conditions. Additionally, higher ambient temperature will also reduce thermal margin. To support required power ringing voltages, this device is meant to operate with a high-voltage primary battery (-65 V to -75 V typically). Thus, power control is normally achieved by use of the battery switch and an auxiliary lower absolute voltage battery. Operating temperature range, maximum current limit, maximum battery voltage, minimum dc loop length and protection resistors values, airflow, and number of PC board layers will influence the overall thermal performance. The following example illustrates typical thermal design considerations. The thermal resistance of the 28-pin PLCC package is typically 35.5 C/W, which is representative of the natural airflow as seen in a typical switch cabinet with a multilayer board. The L9500 will enter thermal shutdown at a typical temperature of 150C. The thermal design should ensure that the SLIC does not reach this temperature under normal operating conditions. For this example, assume a maximum ambient operating temperature of 85 C, a designed current limit of 30 mA, a maximum battery of -75 V, and an auxiliary battery of -21 V. Assume a (worst-case) minimum dc loop of 20 of wire resistance, 30 protection resistors, and 200 for the handset. Additionally, include the effects of parameter tolerance. 1. TTSD - TAMBIENT(max) = allowed thermal rise. 150C - 85 C = 65 C. 2. Allowed thermal rise = package thermal impedance * SLIC power dissipation. 65 C = 35.5C/W * SLIC power dissipation SLIC power dissipation (PD) = 1.83 W. Agere Systems Inc. 21 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Applications (continued) dc Loop Current Limit Current limit may be chosen from two discrete values, 25 mA or 40 mA, depending on if VPROG is grounded (25 mA) or left floating (40 mA). Note that there is a 12.5 k slope to the I/V characteristic in the currentlimit region; thus, once in current limit, the actual loop current will increase slightly, as loop length decreases. The above describes the active mode steady-state current-limit response. There will be a transient response of the current-limit circuit upon an on- to off-hook transition. Typical active mode transient current-limit response is given in Table 19. Table 19. Typical Active Mode On- to Off-Hook Tip/ Ring Current-Limit Transient Response Parameter dc Loop Current: Active Mode RLOOP = 100 On- to Off-hook Transition t < 5 ms dc Loop Current: Active Mode RLOOP = 100 On- to Off-hook Transition t < 50 ms dc Loop Current: Active Mode RLOOP = 100 On- to Off-hook Transition t < 300 ms Value ILIM + 60 Unit mA On-Hook Transmission Mode If the magnitude of the primary battery is greater than 51 V, the magnitude of the open loop tip-to-ring open loop voltage is clamped typically between 41 V and 49 V. If the magnitude of the primary battery is less than a nominal 51 V, the overhead voltage will track the magnitude of the battery voltage, i.e., the magnitude of the open circuit tip-to-ring voltage will be 6 V to 8 V less than battery. In the scan mode, overhead is unaffected by VOVH. Ring Mode In the ring mode, to maximize ringing loop length, the overhead is decreased to the saturation of the tip ring drive amplifiers, a nominal 4 V. The tip to ground voltage is 1 V, and the ring to VBAT1 voltage is 3 V. In the ring mode, overhead is unaffected by VOVH. During the ring mode, to conserve power, the receive input at RCVN/RCVP is deactivated. During the ring mode, to conserve power, the ACC amplifier in the transmit direction at VITR is deactivated. However, the AX amplifier at VTX is active during the ring mode; differential ring current may be sensed at VTX during the ring mode. ILIM + 20 mA Loop Range ILIM mA The dc loop range is calculated using: VBAT2 - VOH RL = ------------------------------------- - 2RP - RDC ILIMIT Overhead Voltage Active Mode Overhead is fixed to a nominal 7.0 V, which is adequate for an on-hook transmission of 3.14 dBm into 900 with additional head room for a 500 mV PPM signal. Scan Mode If the magnitude of the primary battery is greater than 51 V, the magnitude of the open loop tip-to-ring open loop voltage is clamped typically between 44 V and 51 V. If the magnitude of the primary battery is less than a nominal 51 V, the overhead voltage will track the magnitude of the battery voltage, i.e., the magnitude of the open circuit tip-to-ring voltage will be 4 V to 6 V less than battery. In the scan mode, overhead is unaffected by VOVH. VBAT2 is typically applied under off-hook conditions for power conservation and SLIC thermal considerations. The L9500 is intended for short-loop applications and, therefore, will always be in current limit during off-hook conditions. However, note that the ringing loop length rather than the dc loop length will be the factor to determine operating loop length. 22 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Loop Closure The loop closure has a fixed typical 10.5 mA on- to offhook threshold in the active mode and a fixed 11.5 mA on- to off-hook threshold from the scan mode. In either case, there is a 2 mA hysteresis with VCC = 5 V and a 2 mA hysteresis with VCC = 3.3 V. Applications (continued) Battery Reversal Rate The rate of battery reverse is controlled or ramped by capacitors FB1 and FB2. A chart showing FB1 and FB2 values vs. typical ramp time is given below. Leave FB1 and FB2 open if it is not desired to ramp the rate of battery reversal. Table 20. FB1 and FB2 Values vs. Typical Ramp Time CFB1 and CFB2 0.01 F 0.1 F 0.22 F 0.47 F 1.0 F 1.22 F 1.3 F 1.4 F 1.6 F Transition Time 20 ms 220 ms 440 ms 900 ms 1.8 s 2.25 s 2.5 s 2.7 s 3.2 s Ring Trip The ring trip detector requires only a single-pole filter at the input, minimizing external components. An R/C combination of 383 k and 0.1 F, for a filter pole at 5.15 Hz, is recommended. The ring trip threshold is internally fixed as a function of battery voltage and is given by: RT (mA) = 67 * {(0.0045 * VBAT1) + 0.317} where: RT is ring trip current in mA. VBAT1 is the magnitude of the ring battery in V. There is a 6 mA to 8 mA hysteresis. Supervision Ground Start The L9500 offers the loop closure and ring trip supervision functions. Internal to the device, the outputs of these detectors are multiplexed into a single package output (NSTAT). The ring trip detector is valid on NSTAT during the ring mode and loop closure detector is valid on NSTAT during active and on-hook transmission modes. Additionally, common-mode current is detected for ground start applications. This status is output onto NSTAT and is valid during ground start mode. In the ground start applications, the loop closure detector detector is also used to indicate that ring-ground has occurred. During ground start mode, loop current will be common mode, rather than differential as in loop start mode. Thus, in ground start the threshold of the loop closure detector is reduced by one half the threshold seen in the loop start mode.This ouput is seen at the NSTAT output pin. Agere Systems Inc. 23 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Applications (continued) Power Ring The device offers a ring mode, in which a balanced power ring signal is provided to the tip/ring pair. During the ring mode, a user-supplied low-voltage ring signal is input to the device's RINGIN input. This signal is amplified to produce the balanced power ring signal. The user may supply a sine wave input, PWM input, or a square wave to produce sinusoidal or trapezoidal ringing at tip and ring. Various crest factors are shown below for illustrative purposes. 80 60 VOLTS (V) 40 20 0 -20 -40 -60 -80 0.00 0.04 0.08 0.12 0.16 0.20 0.02 0.06 0.10 0.14 0.18 TIME (s) 12-3346a (F) Sine Wave Input Signal and Sine Wave Power Ring Signal Output The low-voltage sine wave input is applied differentially or single ended to the L9500 at pins RINGINP and RINGINN. During the ring mode, the signals at pins RINGINP and RINGINN are amplified and presented to the subscriber loop. The differential gain from RINGIN to tip and ring is a nominal 70. When the device enters the ring mode, the tip/ring overhead set at OVH and the scan clamp circuit are disabled, allowing the voltage magnitude of the power ring signal to be maximized. Additionally, in the ring mode, the loop current limit is increased 2.5X the value set by the VPROG voltage. The magnitude of the power ring voltage will be a function of the gain of the ring amplifier, the high-voltage battery, and the input signal at RINGIN. The input range of the signal at RINGIN is 0 V to Vcc. As the input voltage at RINGIN is increased, the magnitude of the power ring voltage at tip and ring will increase linearly, per the gain of 70, until the tip and ring drive amplifiers begin to saturate. Once the tip and ring amplifiers reach saturation, further increases of the input signal will cause clipping distortion of the power ring signal at tip and ring. The ring signal will appear balanced on tip and ring. That is, the power ring signal is applied to both tip and ring, with the signal on tip 180 out of phase from the signal on ring. It is recommended that the input level at RINGIN be adjusted so that the power ring signal at tip and ring is just at the edge or slightly clipping. This gives maximum power transfer with minimal distortion of the sine wave. The tip side will saturate at a nominal 1 V above ground. The ring side will saturate at a nominal 3 V above battery. The input circuit for a sine wave along with waveforms to illustrate the tip and ring saturation is shown in Figure 9. The point at which clipping of the power ring signal begins at tip and ring is a function of the battery voltage, the input capacitor at RINGIN, and the input signal at RINGIN and Vcc. During nonring modes, the sinusoidal ringing waveform may be left on at RINGIN. Via the state table, the ring signal will be removed from tip and ring even if the low-voltage input is still present at RINGIN. Note: Slew rate = 5.65 V/ms; trise = tfall = 23 ms; pwidth = 2 ms; period = 50 ms. Figure 9. Ringing Waveform Crest Factor = 1.6 80 60 VOLTS (V) 40 20 0 -20 -40 -60 -80 0.00 0.04 0.08 0.12 0.16 0.20 0.02 0.06 0.10 0.14 0.18 TIME (s) 12-3347a (F) Note: Slew rate = 10.83 V/ms; trise = tfall = 12 ms; pwidth = 13 ms; period = 50 ms. Figure 10. Ringing Waveform Crest Factor = 1.2 24 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Applications (continued) L9500 GND 1.0 V VTIP 71 V 3.0 V VBAT VRING PT +1 RINGINP 35x RINGINN PR -1 VBAT = -75 V Figure 11. RINGIN Operation ac Applications ac Parameters There are four key ac design parameters. Termination impedance is the impedance looking into the 2-wire port of the line card. It is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. Transmit gain is measured from the 2-wire port to the PCM highway, while receive gain is done from the PCM highway to the transmit port. Transmit and receive gains may be specified in terms of an actual gain, or in terms of a transmission level point (TLP), that is the actual ac transmission level in dBm. Finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the CODEC input. Agere Systems Inc. 25 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 ac Applications (continued) Design Examples Broadcom 3352 Interface Network The following reference circuit shows the complete SLIC schematic for interface to the Broadcom BCM3352 as designed on the Broadcom BCM93352SV application reference design and board. VCC = 3.3 V VBAT1 CBAT1 DBAT1 0.1 F VBAT2 CCC CBAT2 0.1 F VBAT2 0.1 F AGND VCC C9 R3 VDDCORE CMLEVEL CRT 0.1 F RRT 383 k RTFLT VCM C4 VREF_IO R1 20 k C5 150 pF FERRITE BEAD 600 VBAT1 BGND VDDI/O DCOUT FUSIBLE OR PTC 50 VBAT1 AGERE L7591 50 FUSIBLE OR PTC R4 78.7 k VPROG TXI CTX 0.47 F RGX 4750 ITR RINGINN C10 68 nF RINGINP CF1 CF1 0.22 F CF2 0.1 F CF2 NSTAT B2 B1 B0 C9 68 nF RCVN C3 3.3 nF VREF R7 54.9 k R8 88.7 k 0.1 F VTXP CC1 R2 20 k C6 150 pF PR VITR R5 174 k C7 150 pF VTXN PT L9500 R6 88.7 k C1 3.3 nF RCVP BROADCOM BCM3351 BCM3352 VRXP BCM6352 BCM1101 C2 3.3 nF VTX VRXN RINGREFN RINGREFP D0 D1 D2 DET RDET 10 k VCC Figure 12. Reference Schematic with Broadcom BCM Embedded Codec Devices and Agere L9500 SLIC 26 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications ac Applications (continued) Design Examples (continued) Table 21. Parts List L9500; Agere L9500 and Broadcom BCM3352 (per Broadcom BCM93552SV Application Board--SLIC Daughter Boad Components); Fully Programmable Name Value Fault Protection RPT 50 RPR 50 Protector Agere L7591 Power Supply CBAT1 0.1 F CBAT2 0.1 F DBAT1 1N4004 CCC 0.47 F Ferrite 600 , Murata(R) Bead BLM11A601SPB CF1 0.22 F CF2 0.1 F Ring Trip CRT 0.1 F RRT 383 k ac Interface RGX 4750 CTX 0.47 F CC1 0.1 F R4 78.7 k R5 174 k R6 88.7 k R7 54.9 k R8 88.7 k RDET 10 k Tolerance 1% 1% -- 20% 20% -- 20% -- 20% 20% 20% 1% 1% 20% 20% 1% 1% 1% 1% 1% 1% Rating Function Fusible or PTC Protection resistor. Fusible or PTC Protection resistor. -- Secondary protection. 100 V 50 V -- 10 V -- 100 V 100 V 10 V 1/16 W 1/16 W 10 V 10 V 1/16 W 1/16 W 1/16 W 1/16 W 1/16 W 1/16 W VBAT filter capacitor. VBAT filter capacitor. |VBAT2| < |VBAT1|. Reverse current. Ceramic bypass capacitor. Filtering. Filter capacitor. Filter capacitor. Ring trip filter capacitor. Ring trip filter resistor. Sets T/R to VITR transconductance. ac/dc separation. dc blocking capacitor. ac interface. ac interface. ac interface. ac interface. ac interface. Control. Agere Systems Inc. 27 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Outline Diagrams 28-Pin PLCC Dimensions are in millimeters. 12.446 0.127 11.506 0.076 PIN #1 IDENTIFIER ZONE 4 1 26 5 25 11.506 0.076 12.446 0.127 11 19 12 18 4.572 MAX SEATING PLANE 1.27 TYP 0.51 MIN TYP 0.330/0.533 5-2506r.8(F) 0.10 28 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Outline Diagrams (continued) 48-Pin MLCC Dimensions are in millimeters. Notes: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Agere Sales Representative. The exposed pad on the bottom of the package will be at VBAT1 potential. 7.00 3.50 6.75 3.375 0.50 BSC 1 2 3 C C CL DETAIL A VIEW FOR EVEN TERMINAL/SIDE 6.75 7.00 0.18/0.30 PIN #1 IDENTIFIER ZONE 0.00/0.05 SECTION C-C DETAIL A 12 SEATING PLANE 0.20 REF 11 SPACES @ 0.50 = 5.50 0.24/0.60 0.18/0.30 0.08 0.01/0.05 0.65/0.80 1.00 MAX 0.24/0.60 5.10 0.15 3 2 1 0.30/0.45 EXPOSED PAD 0.50 BSC 0195mod Agere Systems Inc. 29 L9500A High-Voltage Ringing SLIC for VoIP Applications Preliminary Data Sheet September 2001 Outline Diagrams (continued) 48-Pin MLCC, JEDEC MO-220 VKKD-2 Dimensions are in millimeters. Notes: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts, please contact your Agere Sales Representative. The exposed pad on the bottom of the package will be at VBAT1 potential. 7.00 3.50 PIN #1 IDENTIFIER ZONE CL 0.50 BSC 3.50 INDEX AREA (7.00/2 x 7.00/2) 7.00 DETAIL A VIEW FOR EVEN TERMINAL/SIDE 0.18 0.23 TOP VIEW 1.00 MAX SEATING PLANE 0.20 REF 0.08 0.02/0.05 DETAIL B 0.23 0.18 SIDE VIEW 11 SPACES @ 0.50 = 5.50 DETAIL A 0.18/0.30 0.30/0.50 2.50/2.625 5.00/5.25 3 2 1 EXPOSED PAD 0.50 BSC DETAIL B BOTTOM VIEW 0195a 30 Agere Systems Inc. Preliminary Data Sheet September 2001 L9500A High-Voltage Ringing SLIC for VoIP Applications Ordering Information Device Part Number LUCL9500AGF-D LUCL9500AGF-DT LUCL9500ARG-D Description SLIC SLIC SLIC Package 28-Pin PLCC, dry-bagged 28-Pin PLCC, dry-bagged, tape and reel 48-Pin MLF, dry-bagged Comcode 108955501 108955519 108955485 Agere Systems Inc. 31 Broadcom is a registered trademark of Broadcom Corporation. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. Murata is a registered trademark of Murata Manufacturing Company LTD. For additional information, contact your Agere Systems Account Manager or the following: INTERNET: http://www.agere.com E-MAIL: docmaster@agere.com N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA: Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon Tel. (852) 3129-2000, FAX (852) 3129-2020 CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen) JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 778-8833, TAIWAN: (886) 2-2725-5858 (Taipei) EUROPE: Tel. (44) 7000 624624, FAX (44) 1344 488 045 Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. Copyright (c) 2001 Agere Systems Inc. All Rights Reserved September 2001 DS01-303ALC (Replaces DS01-081ALC) |
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